@@ -50,30 +50,20 @@ define i64 @combine_psadbw_demandedelt(<16 x i8> %0, <16 x i8> %1) nounwind {
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define <2 x i64 > @combine_psadbw_cmp_knownbits (<16 x i8 > %a0 ) nounwind {
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; X86-SSE-LABEL: combine_psadbw_cmp_knownbits:
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; X86-SSE: # %bb.0:
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- ; X86-SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
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- ; X86-SSE-NEXT: pxor %xmm1, %xmm1
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- ; X86-SSE-NEXT: psadbw %xmm0, %xmm1
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- ; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,0,2,2]
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- ; X86-SSE-NEXT: por {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
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- ; X86-SSE-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
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+ ; X86-SSE-NEXT: xorps %xmm0, %xmm0
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; X86-SSE-NEXT: retl
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;
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; X64-SSE-LABEL: combine_psadbw_cmp_knownbits:
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; X64-SSE: # %bb.0:
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; X64-SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; X64-SSE-NEXT: pxor %xmm1, %xmm1
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- ; X64-SSE-NEXT: psadbw %xmm0, %xmm1
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- ; X64-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,0,2,2]
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- ; X64-SSE-NEXT: por {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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+ ; X64-SSE-NEXT: psadbw %xmm1, %xmm0
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; X64-SSE-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; X64-SSE-NEXT: retq
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;
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; AVX2-LABEL: combine_psadbw_cmp_knownbits:
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; AVX2: # %bb.0:
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- ; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
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- ; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
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- ; AVX2-NEXT: vpsadbw %xmm1, %xmm0, %xmm0
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- ; AVX2-NEXT: vpcmpgtq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
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+ ; AVX2-NEXT: vxorps %xmm0, %xmm0, %xmm0
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; AVX2-NEXT: retq
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%mask = and <16 x i8 > %a0 , <i8 3 , i8 3 , i8 3 , i8 3 , i8 3 , i8 3 , i8 3 , i8 3 , i8 3 , i8 3 , i8 3 , i8 3 , i8 3 , i8 3 , i8 3 , i8 3 >
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%sad = tail call <2 x i64 > @llvm.x86.sse2.psad.bw (<16 x i8 > %mask , <16 x i8 > zeroinitializer )
@@ -82,96 +72,67 @@ define <2 x i64> @combine_psadbw_cmp_knownbits(<16 x i8> %a0) nounwind {
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ret <2 x i64 > %ext
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}
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- ; TODO: No need to scalarize the sitofp as the PSADBW results are smaller than i32.
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+ ; No need to scalarize the sitofp as the PSADBW results are smaller than i32.
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define <2 x double > @combine_psadbw_sitofp_knownbits (<16 x i8 > %a0 ) nounwind {
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; X86-SSE-LABEL: combine_psadbw_sitofp_knownbits:
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; X86-SSE: # %bb.0:
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- ; X86-SSE-NEXT: pushl %ebp
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- ; X86-SSE-NEXT: movl %esp, %ebp
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- ; X86-SSE-NEXT: andl $-8, %esp
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- ; X86-SSE-NEXT: subl $32, %esp
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; X86-SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
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; X86-SSE-NEXT: pxor %xmm1, %xmm1
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; X86-SSE-NEXT: psadbw %xmm0, %xmm1
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- ; X86-SSE-NEXT: movq %xmm1, {{[0-9]+}}(%esp)
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- ; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
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- ; X86-SSE-NEXT: movq %xmm0, {{[0-9]+}}(%esp)
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- ; X86-SSE-NEXT: fildll {{[0-9]+}}(%esp)
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- ; X86-SSE-NEXT: fstpl {{[0-9]+}}(%esp)
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- ; X86-SSE-NEXT: fildll {{[0-9]+}}(%esp)
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- ; X86-SSE-NEXT: fstpl (%esp)
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- ; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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- ; X86-SSE-NEXT: movhps {{.*#+}} xmm0 = xmm0[0,1],mem[0,1]
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- ; X86-SSE-NEXT: movl %ebp, %esp
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- ; X86-SSE-NEXT: popl %ebp
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+ ; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]
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+ ; X86-SSE-NEXT: cvtdq2pd %xmm0, %xmm0
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; X86-SSE-NEXT: retl
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;
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; X64-SSE-LABEL: combine_psadbw_sitofp_knownbits:
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; X64-SSE: # %bb.0:
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; X64-SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; X64-SSE-NEXT: pxor %xmm1, %xmm1
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; X64-SSE-NEXT: psadbw %xmm0, %xmm1
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- ; X64-SSE-NEXT: movd %xmm1, %eax
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- ; X64-SSE-NEXT: xorps %xmm0, %xmm0
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- ; X64-SSE-NEXT: cvtsi2sd %eax, %xmm0
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- ; X64-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]
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- ; X64-SSE-NEXT: movd %xmm1, %eax
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- ; X64-SSE-NEXT: xorps %xmm1, %xmm1
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- ; X64-SSE-NEXT: cvtsi2sd %eax, %xmm1
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- ; X64-SSE-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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+ ; X64-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]
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+ ; X64-SSE-NEXT: cvtdq2pd %xmm0, %xmm0
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; X64-SSE-NEXT: retq
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;
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; AVX2-LABEL: combine_psadbw_sitofp_knownbits:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
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; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; AVX2-NEXT: vpsadbw %xmm1, %xmm0, %xmm0
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- ; AVX2-NEXT: vcvtdq2pd %xmm0, %xmm1
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- ; AVX2-NEXT: vpextrq $1, %xmm0, %rax
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- ; AVX2-NEXT: vcvtsi2sd %eax, %xmm2, %xmm0
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- ; AVX2-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm0[0]
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+ ; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
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+ ; AVX2-NEXT: vcvtdq2pd %xmm0, %xmm0
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; AVX2-NEXT: retq
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%mask = and <16 x i8 > %a0 , <i8 1 , i8 1 , i8 1 , i8 1 , i8 1 , i8 1 , i8 1 , i8 1 , i8 1 , i8 1 , i8 1 , i8 1 , i8 1 , i8 1 , i8 1 , i8 1 >
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%sad = tail call <2 x i64 > @llvm.x86.sse2.psad.bw (<16 x i8 > %mask , <16 x i8 > zeroinitializer )
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%cvt = sitofp <2 x i64 > %sad to <2 x double >
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ret <2 x double > %cvt
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}
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- ; TODO: Convert from uitofp to sitofp as the PSADBW results are zero-extended.
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+ ; Convert from uitofp to sitofp as the PSADBW results are zero-extended.
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define <2 x double > @combine_psadbw_uitofp_knownbits (<16 x i8 > %a0 ) nounwind {
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; X86-SSE-LABEL: combine_psadbw_uitofp_knownbits:
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; X86-SSE: # %bb.0:
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; X86-SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
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; X86-SSE-NEXT: pxor %xmm1, %xmm1
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- ; X86-SSE-NEXT: psadbw %xmm1, %xmm0
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- ; X86-SSE-NEXT: por {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
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- ; X86-SSE-NEXT: movapd {{.*#+}} xmm1 = [0,1160773632,0,1160773632]
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- ; X86-SSE-NEXT: subpd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1
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- ; X86-SSE-NEXT: addpd %xmm1, %xmm0
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+ ; X86-SSE-NEXT: psadbw %xmm0, %xmm1
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+ ; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]
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+ ; X86-SSE-NEXT: cvtdq2pd %xmm0, %xmm0
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; X86-SSE-NEXT: retl
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;
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; X64-SSE-LABEL: combine_psadbw_uitofp_knownbits:
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; X64-SSE: # %bb.0:
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; X64-SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; X64-SSE-NEXT: pxor %xmm1, %xmm1
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- ; X64-SSE-NEXT: psadbw %xmm1, %xmm0
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- ; X64-SSE-NEXT: por {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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- ; X64-SSE-NEXT: movapd {{.*#+}} xmm1 = [4985484787499139072,4985484787499139072]
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- ; X64-SSE-NEXT: subpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
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- ; X64-SSE-NEXT: addpd %xmm1, %xmm0
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+ ; X64-SSE-NEXT: psadbw %xmm0, %xmm1
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+ ; X64-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]
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+ ; X64-SSE-NEXT: cvtdq2pd %xmm0, %xmm0
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; X64-SSE-NEXT: retq
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;
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; AVX2-LABEL: combine_psadbw_uitofp_knownbits:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
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; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; AVX2-NEXT: vpsadbw %xmm1, %xmm0, %xmm0
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- ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]
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- ; AVX2-NEXT: vpor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
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- ; AVX2-NEXT: vmovddup {{.*#+}} xmm1 = [4985484787499139072,4985484787499139072]
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- ; AVX2-NEXT: # xmm1 = mem[0,0]
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- ; AVX2-NEXT: vsubpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
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- ; AVX2-NEXT: vaddpd %xmm1, %xmm0, %xmm0
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+ ; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
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+ ; AVX2-NEXT: vcvtdq2pd %xmm0, %xmm0
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; AVX2-NEXT: retq
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%mask = and <16 x i8 > %a0 , <i8 1 , i8 1 , i8 1 , i8 1 , i8 1 , i8 1 , i8 1 , i8 1 , i8 1 , i8 1 , i8 1 , i8 1 , i8 1 , i8 1 , i8 1 , i8 1 >
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%sad = tail call <2 x i64 > @llvm.x86.sse2.psad.bw (<16 x i8 > %mask , <16 x i8 > zeroinitializer )
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