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[test] Replace aarch64-*-{eabi,gnueabi}{,hf} with aarch64
Similar to d39b4ce Using "eabi" or "gnueabi" for aarch64 targets is a common mistake and warned by Clang Driver. We want to avoid them elsewhere as well. Just use the common "aarch64" without other triple components.
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‎llvm/test/Analysis/CostModel/AArch64/cast.ll

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,9 @@
11
; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
2-
; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=aarch64-none-linux-gnueabi %s | FileCheck --check-prefixes=CHECK,CHECK-NOFP16 %s
3-
; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=aarch64-none-linux-gnueabi -mattr=+sve -force-streaming-compatible-sve %s | FileCheck --check-prefixes=SVE,SVE128-NO-NEON %s
4-
; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=aarch64-none-linux-gnueabi -mattr=+fullfp16 %s | FileCheck --check-prefixes=CHECK,CHECK-FP16 %s
5-
; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=aarch64-none-linux-gnueabi -mattr=+sve -aarch64-sve-vector-bits-min=256 %s | FileCheck --check-prefixes=SVE,FIXED-MIN-256 %s
6-
; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=aarch64-none-linux-gnueabi -mattr=+sve -aarch64-sve-vector-bits-min=2048 %s | FileCheck --check-prefixes=SVE,FIXED-MIN-2048 %s
2+
; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=aarch64 %s | FileCheck --check-prefixes=CHECK,CHECK-NOFP16 %s
3+
; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=aarch64 -mattr=+sve -force-streaming-compatible-sve %s | FileCheck --check-prefixes=SVE,SVE128-NO-NEON %s
4+
; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=aarch64 -mattr=+fullfp16 %s | FileCheck --check-prefixes=CHECK,CHECK-FP16 %s
5+
; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=aarch64 -mattr=+sve -aarch64-sve-vector-bits-min=256 %s | FileCheck --check-prefixes=SVE,FIXED-MIN-256 %s
6+
; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=aarch64 -mattr=+sve -aarch64-sve-vector-bits-min=2048 %s | FileCheck --check-prefixes=SVE,FIXED-MIN-2048 %s
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
99

‎llvm/test/Analysis/CostModel/AArch64/fptoi_sat.ll

Lines changed: 2 additions & 2 deletions
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@@ -1,6 +1,6 @@
11
; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
2-
; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=aarch64-none-linux-gnueabi %s | FileCheck --check-prefixes=CHECK,CHECK-NOFP16 %s
3-
; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=aarch64-none-linux-gnueabi -mattr=+fullfp16 %s | FileCheck --check-prefixes=CHECK,CHECK-FP16 %s
2+
; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=aarch64 %s | FileCheck --check-prefixes=CHECK,CHECK-NOFP16 %s
3+
; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=aarch64 -mattr=+fullfp16 %s | FileCheck --check-prefixes=CHECK,CHECK-FP16 %s
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
66

‎llvm/test/Analysis/LoopAccessAnalysis/number-of-memchecks.ll

Lines changed: 1 addition & 1 deletion
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@@ -1,7 +1,7 @@
11
; RUN: opt -passes='print<access-info>' -disable-output < %s 2>&1 | FileCheck %s
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target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
4-
target triple = "aarch64--linux-gnueabi"
4+
target triple = "aarch64"
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; 3 reads and 3 writes should need 12 memchecks
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; CHECK: function 'testf':

‎llvm/test/Analysis/LoopAccessAnalysis/reverse-memcheck-bounds.ll

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@@ -12,7 +12,7 @@
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; }
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target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
15-
target triple = "aarch64--linux-gnueabi"
15+
target triple = "aarch64"
1616

1717
; CHECK: function 'f':
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; CHECK: (Low: (20000 + %a)<nuw> High: (60004 + %a))

‎llvm/test/CodeGen/AArch64/Redundantstore.ll

Lines changed: 1 addition & 1 deletion
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1-
; RUN: llc < %s -O3 -mtriple=aarch64-eabi | FileCheck %s
1+
; RUN: llc < %s -O3 -mtriple=aarch64 | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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@end_of_array = common global ptr null, align 8

‎llvm/test/CodeGen/AArch64/aarch64-a57-fp-load-balancing.ll

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; The following tests use the balance-fp-ops feature, and should be independent of
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; the target cpu.
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9-
; RUN: llc < %s -mtriple=aarch64-linux-gnueabi -mattr=+balance-fp-ops -aarch64-a57-fp-load-balancing-override=1 -aarch64-a57-fp-load-balancing-force-all -enable-misched=false -enable-post-misched=false | FileCheck %s --check-prefix CHECK --check-prefix CHECK-EVEN
10-
; RUN: llc < %s -mtriple=aarch64-linux-gnueabi -mattr=+balance-fp-ops -aarch64-a57-fp-load-balancing-override=2 -aarch64-a57-fp-load-balancing-force-all -enable-misched=false -enable-post-misched=false | FileCheck %s --check-prefix CHECK --check-prefix CHECK-ODD
9+
; RUN: llc < %s -mtriple=aarch64 -mattr=+balance-fp-ops -aarch64-a57-fp-load-balancing-override=1 -aarch64-a57-fp-load-balancing-force-all -enable-misched=false -enable-post-misched=false | FileCheck %s --check-prefix CHECK --check-prefix CHECK-EVEN
10+
; RUN: llc < %s -mtriple=aarch64 -mattr=+balance-fp-ops -aarch64-a57-fp-load-balancing-override=2 -aarch64-a57-fp-load-balancing-force-all -enable-misched=false -enable-post-misched=false | FileCheck %s --check-prefix CHECK --check-prefix CHECK-ODD
1111

1212
; Test the AArch64A57FPLoadBalancing pass. This pass relies heavily on register allocation, so
1313
; our test strategy is to:

‎llvm/test/CodeGen/AArch64/aarch64-addv.ll

Lines changed: 2 additions & 2 deletions
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2-
; RUN: llc < %s -mtriple=aarch64-eabi -aarch64-neon-syntax=generic | FileCheck %s -check-prefixes=CHECK,SDAG
3-
; RUN: llc < %s -global-isel=1 -global-isel-abort=2 -mtriple=aarch64-eabi -aarch64-neon-syntax=generic 2>&1 | FileCheck %s --check-prefixes=CHECK,GISEL
2+
; RUN: llc < %s -mtriple=aarch64 -aarch64-neon-syntax=generic | FileCheck %s -check-prefixes=CHECK,SDAG
3+
; RUN: llc < %s -global-isel=1 -global-isel-abort=2 -mtriple=aarch64 -aarch64-neon-syntax=generic 2>&1 | FileCheck %s --check-prefixes=CHECK,GISEL
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; Function Attrs: nounwind readnone
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declare i8 @llvm.vector.reduce.add.v2i8(<2 x i8>)

‎llvm/test/CodeGen/AArch64/aarch64-tbz.ll

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1-
; RUN: llc -verify-machineinstrs -mtriple=aarch64-linux-gnueabi < %s | FileCheck %s
2-
; RUN: llc -verify-machineinstrs -mtriple=aarch64-linux-gnueabi -cgp-verify-bfi-updates=true < %s | FileCheck %s
1+
; RUN: llc -verify-machineinstrs -mtriple=aarch64 < %s | FileCheck %s
2+
; RUN: llc -verify-machineinstrs -mtriple=aarch64 -cgp-verify-bfi-updates=true < %s | FileCheck %s
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44
; CHECK-LABEL: test1
55
; CHECK: tbz {{w[0-9]}}, #3, {{.LBB0_3}}

‎llvm/test/CodeGen/AArch64/aarch64-unroll-and-jam.ll

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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2-
; RUN: opt -passes='loop-unroll-and-jam' < %s -mcpu=cortex-a55 -mtriple=aarch64-none-linux-eabi -S | FileCheck %s
2+
; RUN: opt -passes='loop-unroll-and-jam' < %s -mcpu=cortex-a55 -mtriple=aarch64 -S | FileCheck %s
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target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
55

‎llvm/test/CodeGen/AArch64/aarch64-vcvtfp2fxs-combine.ll

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1-
; RUN: llc < %s -mtriple=aarch64-linux-eabi -o - | FileCheck %s
1+
; RUN: llc < %s -mtriple=aarch64 -o - | FileCheck %s
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%struct.a= type { i64, i64, i64, i64 }
44

‎llvm/test/CodeGen/AArch64/arm64-build-vector.ll

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@@ -1,5 +1,5 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2-
; RUN: llc < %s -mtriple=aarch64-eabi -mattr=+fullfp16,+bf16 | FileCheck %s
2+
; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16,+bf16 | FileCheck %s
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; Check that building a vector from floats doesn't insert an unnecessary
55
; copy for lane zero.

‎llvm/test/CodeGen/AArch64/arm64-movi.ll

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2-
; RUN: llc < %s -mtriple=aarch64-eabi | FileCheck %s
2+
; RUN: llc < %s -mtriple=aarch64 | FileCheck %s
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;==--------------------------------------------------------------------------==
55
; Tests for MOV-immediate implemented with ORR-immediate.

‎llvm/test/CodeGen/AArch64/arm64-popcnt.ll

Lines changed: 2 additions & 2 deletions
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
22
; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple | FileCheck %s
3-
; RUN: llc < %s -mtriple=aarch64-eabi -mattr -neon -aarch64-neon-syntax=apple | FileCheck -check-prefix=CHECK-NONEON %s
4-
; RUN: llc < %s -mtriple=aarch64-eabi -mattr +cssc -aarch64-neon-syntax=apple | FileCheck -check-prefix=CHECK-CSSC %s
3+
; RUN: llc < %s -mtriple=aarch64 -mattr -neon -aarch64-neon-syntax=apple | FileCheck -check-prefix=CHECK-NONEON %s
4+
; RUN: llc < %s -mtriple=aarch64 -mattr +cssc -aarch64-neon-syntax=apple | FileCheck -check-prefix=CHECK-CSSC %s
55

66
define i32 @cnt32_advsimd(i32 %x) nounwind readnone {
77
; CHECK-LABEL: cnt32_advsimd:

‎llvm/test/CodeGen/AArch64/arm64-rev.ll

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2-
; RUN: llc < %s -mtriple=aarch64-eabi -aarch64-neon-syntax=apple | FileCheck %s --check-prefixes=CHECK,CHECK-SD
3-
; RUN: llc < %s -mtriple=aarch64-eabi -aarch64-neon-syntax=apple -global-isel | FileCheck %s --check-prefixes=CHECK,CHECK-GI
2+
; RUN: llc < %s -mtriple=aarch64 -aarch64-neon-syntax=apple | FileCheck %s --check-prefixes=CHECK,CHECK-SD
3+
; RUN: llc < %s -mtriple=aarch64 -aarch64-neon-syntax=apple -global-isel | FileCheck %s --check-prefixes=CHECK,CHECK-GI
44

55
define i32 @test_rev_w(i32 %a) nounwind {
66
; CHECK-LABEL: test_rev_w:

‎llvm/test/CodeGen/AArch64/asm-large-immediate.ll

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@@ -1,4 +1,4 @@
1-
; RUN: llc < %s -mtriple=aarch64-eabi -no-integrated-as | FileCheck %s
1+
; RUN: llc < %s -mtriple=aarch64 -no-integrated-as | FileCheck %s
22

33
define void @test() {
44
entry:

‎llvm/test/CodeGen/AArch64/bf16-shuffle.ll

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2-
; RUN: llc -mtriple=aarch64-eabi -mattr=+v8.6a,+neon < %s | FileCheck %s
3-
; RUN: llc -mtriple=aarch64-eabi -mattr=+v8.6a,+neon,+bf16 < %s | FileCheck %s
4-
; RUN: llc -mtriple=aarch64-eabi -mattr=+v8.6a,+neon,+fullfp16,+bf16 < %s | FileCheck %s
2+
; RUN: llc -mtriple=aarch64 -mattr=+v8.6a,+neon < %s | FileCheck %s
3+
; RUN: llc -mtriple=aarch64 -mattr=+v8.6a,+neon,+bf16 < %s | FileCheck %s
4+
; RUN: llc -mtriple=aarch64 -mattr=+v8.6a,+neon,+fullfp16,+bf16 < %s | FileCheck %s
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%struct.float16x4x2_t = type { [2 x <4 x bfloat>] }
77
%struct.float16x8x2_t = type { [2 x <8 x bfloat>] }

‎llvm/test/CodeGen/AArch64/bf16.ll

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; RUN: llc < %s -asm-verbose=0 -mtriple=arm64-eabi -mattr=+bf16 | FileCheck %s
2-
; RUN: llc < %s -asm-verbose=0 -mtriple=aarch64-eabi -mattr=+bf16 | FileCheck %s
2+
; RUN: llc < %s -asm-verbose=0 -mtriple=aarch64 -mattr=+bf16 | FileCheck %s
33

44
; test argument passing and simple load/store
55

‎llvm/test/CodeGen/AArch64/bitreverse.ll

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2-
; RUN: llc -mtriple=aarch64-eabi %s -o - | FileCheck %s
2+
; RUN: llc -mtriple=aarch64 %s -o - | FileCheck %s
33

44
; These tests just check that the plumbing is in place for @llvm.bitreverse.
55

‎llvm/test/CodeGen/AArch64/cmpwithshort.ll

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1-
; RUN: llc < %s -O3 -mtriple=aarch64-eabi | FileCheck %s
1+
; RUN: llc < %s -O3 -mtriple=aarch64 | FileCheck %s
22

33
define i16 @test_1cmp_signed_1(ptr %ptr1) {
44
; CHECK-LABEL: @test_1cmp_signed_1

‎llvm/test/CodeGen/AArch64/complex-deinterleaving-i16-add-scalable.ll

Lines changed: 1 addition & 1 deletion
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
22
; RUN: llc < %s --mattr=+sve2 -o - | FileCheck %s
33

4-
target triple = "aarch64-arm-none-eabi"
4+
target triple = "aarch64"
55

66
; Expected to not transform as the type's minimum size is less than 128 bits.
77
define <vscale x 4 x i16> @complex_add_v4i16(<vscale x 4 x i16> %a, <vscale x 4 x i16> %b) {

‎llvm/test/CodeGen/AArch64/complex-deinterleaving-i16-mul-scalable.ll

Lines changed: 1 addition & 1 deletion
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
22
; RUN: llc < %s --mattr=+sve2 -o - | FileCheck %s
33

4-
target triple = "aarch64-arm-none-eabi"
4+
target triple = "aarch64"
55

66
; Expected to not transform as the type's minimum size is less than 128 bits.
77
define <vscale x 4 x i16> @complex_mul_v4i16(<vscale x 4 x i16> %a, <vscale x 4 x i16> %b) {

‎llvm/test/CodeGen/AArch64/complex-deinterleaving-i32-add-scalable.ll

Lines changed: 1 addition & 1 deletion
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
22
; RUN: llc < %s --mattr=+sve2 -o - | FileCheck %s
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4-
target triple = "aarch64-arm-none-eabi"
4+
target triple = "aarch64"
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; Expected to transform
77
define <vscale x 4 x i32> @complex_add_v4i32(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {

‎llvm/test/CodeGen/AArch64/complex-deinterleaving-i32-mul-scalable.ll

Lines changed: 1 addition & 1 deletion
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s --mattr=+sve2 -o - | FileCheck %s
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4-
target triple = "aarch64-arm-none-eabi"
4+
target triple = "aarch64"
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; Expected to transform
77
define <vscale x 4 x i32> @complex_mul_v4i32(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {

‎llvm/test/CodeGen/AArch64/complex-deinterleaving-i64-add-scalable.ll

Lines changed: 1 addition & 1 deletion
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s --mattr=+sve2 -o - | FileCheck %s
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4-
target triple = "aarch64-arm-none-eabi"
4+
target triple = "aarch64"
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; Expected to transform
77
define <vscale x 2 x i64> @complex_add_v2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b) {

‎llvm/test/CodeGen/AArch64/complex-deinterleaving-i64-mul-scalable.ll

Lines changed: 1 addition & 1 deletion
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s --mattr=+sve2 -o - | FileCheck %s
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4-
target triple = "aarch64-arm-none-eabi"
4+
target triple = "aarch64"
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; Expected to transform
77
define <vscale x 2 x i64> @complex_mul_v2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b) {

‎llvm/test/CodeGen/AArch64/complex-deinterleaving-i8-add-scalable.ll

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s --mattr=+sve2 -o - | FileCheck %s
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4-
target triple = "aarch64-arm-none-eabi"
4+
target triple = "aarch64"
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; Expected to not transform as the type's minimum size is less than 128 bits.
77
define <vscale x 8 x i8> @complex_add_v8i8(<vscale x 8 x i8> %a, <vscale x 8 x i8> %b) {

‎llvm/test/CodeGen/AArch64/complex-deinterleaving-splat-scalable.ll

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s --mattr=+sve -o - | FileCheck %s
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4-
target triple = "aarch64-arm-none-eabi"
4+
target triple = "aarch64"
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; a[i] * b[i] * (11.0 + 3.0.i);
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;

‎llvm/test/CodeGen/AArch64/complex-deinterleaving-splat.ll

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s --mattr=+complxnum -o - | FileCheck %s
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4-
target triple = "aarch64-arm-none-eabi"
4+
target triple = "aarch64"
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; a[i] * b[i] * (11.0 + 3.0.i);

‎llvm/test/CodeGen/AArch64/cond-br-tuning.ll

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2-
; RUN: llc -debugify-and-strip-all-safe < %s -O3 -mtriple=aarch64-eabi -verify-machineinstrs | FileCheck %s
2+
; RUN: llc -debugify-and-strip-all-safe < %s -O3 -mtriple=aarch64 -verify-machineinstrs | FileCheck %s
33

44
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
55
target triple = "aarch64-linaro-linux-gnueabi"

‎llvm/test/CodeGen/AArch64/consthoist-gep.ll

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@@ -1,5 +1,5 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2-
; RUN: llc -mtriple=aarch64-none-unknown-linuxeabi -consthoist-gep %s -o - | FileCheck %s
2+
; RUN: llc -mtriple=aarch64 -consthoist-gep %s -o - | FileCheck %s
33

44
%struct.blam = type { %struct.bar, %struct.bar.0, %struct.wobble, %struct.wombat, i8, i16, %struct.snork.2, %struct.foo, %struct.snork.3, %struct.wobble.4, %struct.quux, [9 x i16], %struct.spam, %struct.zot }
55
%struct.bar = type { i8, i8, %struct.snork }

‎llvm/test/CodeGen/AArch64/extbinopload.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2-
; RUN: llc -mtriple=aarch64-none-eabi -verify-machineinstrs %s -o - | FileCheck %s
2+
; RUN: llc -mtriple=aarch64 -verify-machineinstrs %s -o - | FileCheck %s
33

44
define <4 x i16> @normal_load_v4i8(ptr %p) {
55
; CHECK-LABEL: normal_load_v4i8:

‎llvm/test/CodeGen/AArch64/extract-sext-zext.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2-
; RUN: llc -mtriple=aarch64-eabi %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-ISEL
3-
; RUN: llc -mtriple=aarch64-eabi -global-isel %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GLOBAL
2+
; RUN: llc -mtriple=aarch64 %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-ISEL
3+
; RUN: llc -mtriple=aarch64 -global-isel %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GLOBAL
44

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define i64 @extract_v2i64(<2 x i64> %x, i32 %y) {
66
; CHECK-ISEL-LABEL: extract_v2i64:

‎llvm/test/CodeGen/AArch64/fabs.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,8 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2-
; RUN: llc -mtriple=aarch64-none-eabi -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-NOFP16
3-
; RUN: llc -mtriple=aarch64-none-eabi -mattr=+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-FP16
4-
; RUN: llc -mtriple=aarch64-none-eabi -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-NOFP16
5-
; RUN: llc -mtriple=aarch64-none-eabi -mattr=+fullfp16 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-FP16
2+
; RUN: llc -mtriple=aarch64 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-NOFP16
3+
; RUN: llc -mtriple=aarch64 -mattr=+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-FP16
4+
; RUN: llc -mtriple=aarch64 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-NOFP16
5+
; RUN: llc -mtriple=aarch64 -mattr=+fullfp16 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-FP16
66

77
define double @fabs_f64(double %a) {
88
; CHECK-LABEL: fabs_f64:

‎llvm/test/CodeGen/AArch64/faddsub.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,8 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2-
; RUN: llc -mtriple=aarch64-none-eabi -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-NOFP16
3-
; RUN: llc -mtriple=aarch64-none-eabi -mattr=+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-FP16
4-
; RUN: llc -mtriple=aarch64-none-eabi -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-NOFP16
5-
; RUN: llc -mtriple=aarch64-none-eabi -mattr=+fullfp16 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-FP16
2+
; RUN: llc -mtriple=aarch64 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-NOFP16
3+
; RUN: llc -mtriple=aarch64 -mattr=+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-FP16
4+
; RUN: llc -mtriple=aarch64 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-NOFP16
5+
; RUN: llc -mtriple=aarch64 -mattr=+fullfp16 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-FP16
66

77
define double @fadd_f64(double %a, double %b) {
88
; CHECK-LABEL: fadd_f64:

‎llvm/test/CodeGen/AArch64/fcmp.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,8 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
2-
; RUN: llc -mtriple=aarch64-none-eabi -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-NOFP16
3-
; RUN: llc -mtriple=aarch64-none-eabi -mattr=+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-FP16
4-
; RUN: llc -mtriple=aarch64-none-eabi -global-isel -global-isel-abort=2 -verify-machineinstrs %s -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-NOFP16
5-
; RUN: llc -mtriple=aarch64-none-eabi -mattr=+fullfp16 -global-isel -global-isel-abort=2 -verify-machineinstrs %s -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-FP16
2+
; RUN: llc -mtriple=aarch64 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-NOFP16
3+
; RUN: llc -mtriple=aarch64 -mattr=+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-FP16
4+
; RUN: llc -mtriple=aarch64 -global-isel -global-isel-abort=2 -verify-machineinstrs %s -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-NOFP16
5+
; RUN: llc -mtriple=aarch64 -mattr=+fullfp16 -global-isel -global-isel-abort=2 -verify-machineinstrs %s -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-FP16
66

77
define double @f64_double(double %a, double %b, double %d, double %e) {
88
; CHECK-LABEL: f64_double:

‎llvm/test/CodeGen/AArch64/fcopysign.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
2-
; RUN: llc -mtriple=aarch64-none-eabi -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD
3-
; RUN: llc -mtriple=aarch64-none-eabi -global-isel -global-isel-abort=2 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI
2+
; RUN: llc -mtriple=aarch64 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD
3+
; RUN: llc -mtriple=aarch64 -global-isel -global-isel-abort=2 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI
44

55
define double @copysign_f64(double %a, double %b) {
66
; CHECK-SD-LABEL: copysign_f64:

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