Skip to content

Commit 3dc28e6

Browse files
committed
[SLp]Fix a crash because of wrong deps between vectorized nodes.
Need to change the order of the nodes vectorization to avoid too early insertion of the first node.
1 parent 3b3ff5c commit 3dc28e6

File tree

2 files changed

+41
-1
lines changed

2 files changed

+41
-1
lines changed

llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

+1-1
Original file line numberDiff line numberDiff line change
@@ -8959,7 +8959,7 @@ BoUpSLP::isGatherShuffledEntry(const TreeEntry *TE, ArrayRef<Value *> VL,
89598959
// vectorized nodes - make it depend on index.
89608960
if (TE->UserTreeIndices.front().UserTE !=
89618961
TEPtr->UserTreeIndices.front().UserTE &&
8962-
TE->Idx > TEPtr->Idx)
8962+
TE->Idx < TEPtr->Idx)
89638963
continue;
89648964
}
89658965
// Check if the user node of the TE comes after user node of EntryPtr,
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,40 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3
2+
; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-pc-linux-gnu < %s | FileCheck %s
3+
4+
define void @test(double %add) {
5+
; CHECK-LABEL: define void @test(
6+
; CHECK-SAME: double [[ADD:%.*]]) {
7+
; CHECK-NEXT: entry:
8+
; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> <double poison, double 0.000000e+00>, double [[ADD]], i32 0
9+
; CHECK-NEXT: [[TMP1:%.*]] = fmul <2 x double> [[TMP0]], zeroinitializer
10+
; CHECK-NEXT: [[TMP2:%.*]] = fmul <2 x double> [[TMP0]], zeroinitializer
11+
; CHECK-NEXT: br label [[COND_TRUE45:%.*]]
12+
; CHECK: cond.true45:
13+
; CHECK-NEXT: [[TMP3:%.*]] = fmul <2 x double> [[TMP1]], zeroinitializer
14+
; CHECK-NEXT: [[TMP4:%.*]] = fmul <2 x double> [[TMP2]], zeroinitializer
15+
; CHECK-NEXT: [[TMP5:%.*]] = fadd <2 x double> zeroinitializer, [[TMP3]]
16+
; CHECK-NEXT: [[TMP6:%.*]] = fsub <2 x double> [[TMP5]], zeroinitializer
17+
; CHECK-NEXT: [[TMP7:%.*]] = fsub <2 x double> [[TMP6]], [[TMP4]]
18+
; CHECK-NEXT: ret void
19+
;
20+
entry:
21+
%mul1 = fmul double %add, 0.000000e+00
22+
%mul2 = fmul double %add, 0.000000e+00
23+
%mul3 = fmul double 0.000000e+00, 0.000000e+00
24+
br label %cond.true45
25+
26+
cond.true45:
27+
%mul26 = fmul double %mul1, 0.000000e+00
28+
%add27 = fadd double 0.000000e+00, %mul26
29+
%sub28 = fsub double %add27, 0.000000e+00
30+
%mul30 = fmul double %mul2, 0.000000e+00
31+
%sub31 = fsub double %sub28, %mul30
32+
%mul7 = fmul double %mul3, 0.000000e+00
33+
%add8 = fadd double %mul7, 0.000000e+00
34+
%sub9 = fsub double %add8, 0.000000e+00
35+
%mul11 = fmul double %mul3, 0.000000e+00
36+
%sub12 = fsub double %sub9, %mul11
37+
%0 = insertelement <2 x double> zeroinitializer, double %sub31, i32 0
38+
%1 = insertelement <2 x double> %0, double %sub12, i32 1
39+
ret void
40+
}

0 commit comments

Comments
 (0)