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fixup! [SPARC] Support reserving arbitrary general purpose registers
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4 files changed

+13
-22
lines changed

4 files changed

+13
-22
lines changed

clang/include/clang/Driver/Options.td

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -5730,16 +5730,16 @@ def mvis3 : Flag<["-"], "mvis3">, Group<m_sparc_Features_Group>;
57305730
def mno_vis3 : Flag<["-"], "mno-vis3">, Group<m_sparc_Features_Group>;
57315731
def mhard_quad_float : Flag<["-"], "mhard-quad-float">, Group<m_sparc_Features_Group>;
57325732
def msoft_quad_float : Flag<["-"], "msoft-quad-float">, Group<m_sparc_Features_Group>;
5733-
foreach i = {1-7} in
5733+
foreach i = 1 ... 7 in
57345734
def ffixed_g#i : Flag<["-"], "ffixed-g"#i>, Group<m_sparc_Features_Group>,
57355735
HelpText<"Reserve the G"#i#" register (SPARC only)">;
5736-
foreach i = {0-5} in
5736+
foreach i = 0 ... 5 in
57375737
def ffixed_o#i : Flag<["-"], "ffixed-o"#i>, Group<m_sparc_Features_Group>,
57385738
HelpText<"Reserve the O"#i#" register (SPARC only)">;
5739-
foreach i = {0-7} in
5739+
foreach i = 0 ... 7 in
57405740
def ffixed_l#i : Flag<["-"], "ffixed-l"#i>, Group<m_sparc_Features_Group>,
57415741
HelpText<"Reserve the L"#i#" register (SPARC only)">;
5742-
foreach i = {0-5} in
5742+
foreach i = 0 ... 5 in
57435743
def ffixed_i#i : Flag<["-"], "ffixed-i"#i>, Group<m_sparc_Features_Group>,
57445744
HelpText<"Reserve the I"#i#" register (SPARC only)">;
57455745
} // let Flags = [TargetSpecific]

llvm/lib/Target/Sparc/Sparc.td

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -66,16 +66,16 @@ def FeatureSoftFloat : SubtargetFeature<"soft-float", "UseSoftFloat", "true",
6666
include "LeonFeatures.td"
6767

6868
//==== Register allocation tweaks needed by some low-level software
69-
foreach i = {1-7} in
69+
foreach i = 1 ... 7 in
7070
def FeatureReserveG#i : SubtargetFeature<"reserve-g"#i, "ReserveGRegister["#i#"]", "true",
7171
"Reserve G"#i#", making it unavailable as a GPR">;
72-
foreach i = {0-5} in
72+
foreach i = 0 ... 5 in
7373
def FeatureReserveO#i : SubtargetFeature<"reserve-o"#i, "ReserveORegister["#i#"]", "true",
7474
"Reserve O"#i#", making it unavailable as a GPR">;
75-
foreach i = {0-7} in
75+
foreach i = 0 ... 7 in
7676
def FeatureReserveL#i : SubtargetFeature<"reserve-l"#i, "ReserveLRegister["#i#"]", "true",
7777
"Reserve L"#i#", making it unavailable as a GPR">;
78-
foreach i = {0-5} in
78+
foreach i = 0 ... 5 in
7979
def FeatureReserveI#i : SubtargetFeature<"reserve-i"#i, "ReserveIRegister["#i#"]", "true",
8080
"Reserve I"#i#", making it unavailable as a GPR">;
8181

llvm/lib/Target/Sparc/SparcISelLowering.cpp

Lines changed: 3 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1130,18 +1130,9 @@ Register SparcTargetLowering::getRegisterByName(const char* RegName, LLT VT,
11301130
.Case("g4", SP::G4).Case("g5", SP::G5).Case("g6", SP::G6).Case("g7", SP::G7)
11311131
.Default(0);
11321132

1133-
const SparcRegisterInfo *MRI = Subtarget->getRegisterInfo();
1134-
unsigned DwarfRegNum = MRI->getDwarfRegNum(Reg, false);
1135-
if (!MRI->isReservedReg(MF, Reg)) {
1136-
bool IsG = DwarfRegNum < 8, IsO = DwarfRegNum >= 8 && DwarfRegNum < 16,
1137-
IsL = DwarfRegNum >= 16 && DwarfRegNum < 24, IsI = DwarfRegNum >= 24;
1138-
unsigned NumInBank = DwarfRegNum % 8;
1139-
if ((IsG && !Subtarget->isGRegisterReserved(NumInBank)) ||
1140-
(IsO && !Subtarget->isORegisterReserved(NumInBank)) ||
1141-
(IsL && !Subtarget->isLRegisterReserved(NumInBank)) ||
1142-
(IsI && !Subtarget->isIRegisterReserved(NumInBank)))
1143-
Reg = 0;
1144-
}
1133+
const SparcRegisterInfo *TRI = Subtarget->getRegisterInfo();
1134+
if (!TRI->isReservedReg(MF, Reg))
1135+
Reg = 0;
11451136

11461137
if (Reg)
11471138
return Reg;

llvm/lib/Target/Sparc/SparcRegisterInfo.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -128,10 +128,10 @@ bool SparcRegisterInfo::isReservedReg(const MachineFunction &MF,
128128

129129
bool SparcRegisterInfo::isAnyArgRegReserved(const MachineFunction &MF) const {
130130
bool Outgoing =
131-
llvm::any_of(*SP::GPROutgoingArgRegClass.MC,
131+
llvm::any_of(SP::GPROutgoingArgRegClass,
132132
[this, &MF](MCPhysReg r) { return isReservedReg(MF, r); });
133133
bool Incoming =
134-
llvm::any_of(*SP::GPRIncomingArgRegClass.MC,
134+
llvm::any_of(SP::GPRIncomingArgRegClass,
135135
[this, &MF](MCPhysReg r) { return isReservedReg(MF, r); });
136136
return Outgoing || Incoming;
137137
}

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