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[ARM] Fix -mno-omit-leaf-frame-pointer flag doesn't works on 32-bit ARM (#109628)
The -mno-omit-leaf-frame-pointer flag works on 32-bit ARM architectures and addresses the bug reported in #108019
1 parent c980a20 commit 4a2bd78

29 files changed

+234
-244
lines changed

‎clang/docs/ReleaseNotes.rst

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -612,6 +612,11 @@ X86 Support
612612
Arm and AArch64 Support
613613
^^^^^^^^^^^^^^^^^^^^^^^
614614

615+
- In the ARM Target, the frame pointer (FP) of a leaf function can be retained
616+
by using the ``-fno-omit-frame-pointer`` option. If you want to eliminate the FP
617+
in leaf functions after enabling ``-fno-omit-frame-pointer``, you can do so by adding
618+
the ``-momit-leaf-frame-pointer`` option.
619+
615620
Android Support
616621
^^^^^^^^^^^^^^^
617622

‎llvm/docs/ReleaseNotes.md

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -125,6 +125,12 @@ Changes to the ARM Backend
125125
the required alignment space with a sequence of `0x0` bytes (the requested
126126
fill value) rather than NOPs.
127127

128+
* The default behavior for frame pointers in leaf functions has been updated.
129+
When the `-fno-omit-frame-pointer` option is specified, `FPKeepKindStr` is
130+
set to `-mframe-pointer=all`, meaning the frame pointer (FP) is now retained
131+
in leaf functions by default. To eliminate the frame pointer in leaf functions,
132+
you must explicitly use the `-momit-leaf-frame-pointer` option.
133+
128134
Changes to the AVR Backend
129135
--------------------------
130136

‎llvm/include/llvm/CodeGen/TargetFrameLowering.h

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -277,12 +277,6 @@ class TargetFrameLowering {
277277
return false;
278278
}
279279

280-
/// Return true if the target wants to keep the frame pointer regardless of
281-
/// the function attribute "frame-pointer".
282-
virtual bool keepFramePointer(const MachineFunction &MF) const {
283-
return false;
284-
}
285-
286280
/// hasFP - Return true if the specified function should have a dedicated
287281
/// frame pointer register. For most targets this is true only if the function
288282
/// has variable sized allocas or if frame pointer elimination is disabled.

‎llvm/lib/CodeGen/TargetOptionsImpl.cpp

Lines changed: 0 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -22,10 +22,6 @@ using namespace llvm;
2222
/// DisableFramePointerElim - This returns true if frame pointer elimination
2323
/// optimization should be disabled for the given machine function.
2424
bool TargetOptions::DisableFramePointerElim(const MachineFunction &MF) const {
25-
// Check to see if the target want to forcibly keep frame pointer.
26-
if (MF.getSubtarget().getFrameLowering()->keepFramePointer(MF))
27-
return true;
28-
2925
const Function &F = MF.getFunction();
3026

3127
if (!F.hasFnAttribute("frame-pointer"))
@@ -41,10 +37,6 @@ bool TargetOptions::DisableFramePointerElim(const MachineFunction &MF) const {
4137
}
4238

4339
bool TargetOptions::FramePointerIsReserved(const MachineFunction &MF) const {
44-
// Check to see if the target want to forcibly keep frame pointer.
45-
if (MF.getSubtarget().getFrameLowering()->keepFramePointer(MF))
46-
return true;
47-
4840
const Function &F = MF.getFunction();
4941

5042
if (!F.hasFnAttribute("frame-pointer"))

‎llvm/lib/Target/ARM/ARMFrameLowering.cpp

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -330,6 +330,10 @@ bool ARMFrameLowering::hasFP(const MachineFunction &MF) const {
330330
const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
331331
const MachineFrameInfo &MFI = MF.getFrameInfo();
332332

333+
// Check to see if the target want to forcibly keep frame pointer.
334+
if (keepFramePointer(MF))
335+
return true;
336+
333337
// ABI-required frame pointer.
334338
if (MF.getTarget().Options.DisableFramePointerElim(MF))
335339
return true;
@@ -2403,7 +2407,8 @@ void ARMFrameLowering::determineCalleeSaves(MachineFunction &MF,
24032407
// to take advantage the eliminateFrameIndex machinery. This also ensures it
24042408
// is spilled in the order specified by getCalleeSavedRegs() to make it easier
24052409
// to combine multiple loads / stores.
2406-
bool CanEliminateFrame = !(requiresAAPCSFrameRecord(MF) && hasFP(MF));
2410+
bool CanEliminateFrame = !(requiresAAPCSFrameRecord(MF) && hasFP(MF)) &&
2411+
!MF.getTarget().Options.DisableFramePointerElim(MF);
24072412
bool CS1Spilled = false;
24082413
bool LRSpilled = false;
24092414
unsigned NumGPRSpills = 0;

‎llvm/lib/Target/ARM/ARMFrameLowering.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -41,7 +41,7 @@ class ARMFrameLowering : public TargetFrameLowering {
4141
MutableArrayRef<CalleeSavedInfo> CSI,
4242
const TargetRegisterInfo *TRI) const override;
4343

44-
bool keepFramePointer(const MachineFunction &MF) const override;
44+
bool keepFramePointer(const MachineFunction &MF) const;
4545

4646
bool enableCalleeSaveSkip(const MachineFunction &MF) const override;
4747

‎llvm/test/CodeGen/ARM/2011-03-15-LdStMultipleBug.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,7 @@
99

1010
@oStruct = external global %struct.Outer, align 4
1111

12-
define void @main(i8 %val8) nounwind {
12+
define void @main(i8 %val8) nounwind "frame-pointer"="none" {
1313
; CHECK-LABEL: main:
1414
; CHECK: @ %bb.0: @ %for.body.lr.ph
1515
; CHECK-NEXT: movw r0, :lower16:(L_oStruct$non_lazy_ptr-(LPC0_0+4))

‎llvm/test/CodeGen/ARM/2011-12-19-sjlj-clobber.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@
33
; Radar 10567930: Make sure that all the caller-saved registers are saved and
44
; restored in a function with setjmp/longjmp EH. In particular, r6 was not
55
; being saved here.
6-
; CHECK: push {r4, r5, r6, r7, lr}
6+
; CHECK: push.w {r4, r5, r6, r7, r8, r10, r11, lr}
77

88
%0 = type opaque
99
%struct.NSConstantString = type { ptr, i32, ptr, i32 }

‎llvm/test/CodeGen/ARM/arm-shrink-wrapping.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1732,7 +1732,7 @@ if.end:
17321732
; Another infinite loop test this time with two nested infinite loop.
17331733
; infiniteloop3
17341734
; bx lr
1735-
define void @infiniteloop3() "frame-pointer"="all" {
1735+
define void @infiniteloop3() "frame-pointer"="none" {
17361736
; ARM-LABEL: infiniteloop3:
17371737
; ARM: @ %bb.0: @ %entry
17381738
; ARM-NEXT: mov r0, #0

‎llvm/test/CodeGen/ARM/atomic-load-store.ll

Lines changed: 26 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -324,18 +324,17 @@ define void @test_old_store_64bit(ptr %p, i64 %v) {
324324
;
325325
; ARMOPTNONE-LABEL: test_old_store_64bit:
326326
; ARMOPTNONE: @ %bb.0:
327-
; ARMOPTNONE-NEXT: push {r4, r5, r7, lr}
328-
; ARMOPTNONE-NEXT: add r7, sp, #8
329-
; ARMOPTNONE-NEXT: push {r8, r10, r11}
330-
; ARMOPTNONE-NEXT: sub sp, sp, #24
331-
; ARMOPTNONE-NEXT: str r0, [sp, #4] @ 4-byte Spill
332-
; ARMOPTNONE-NEXT: str r2, [sp, #8] @ 4-byte Spill
333-
; ARMOPTNONE-NEXT: str r1, [sp, #12] @ 4-byte Spill
334-
; ARMOPTNONE-NEXT: dmb ish
335-
; ARMOPTNONE-NEXT: ldr r1, [r0]
336-
; ARMOPTNONE-NEXT: ldr r0, [r0, #4]
337-
; ARMOPTNONE-NEXT: str r1, [sp, #16] @ 4-byte Spill
338-
; ARMOPTNONE-NEXT: str r0, [sp, #20] @ 4-byte Spill
327+
; ARMOPTNONE-NEXT: push {r4, r5, r7, r8, r10, r11, lr}
328+
; ARMOPTNONE-NEXT: add r7, sp, #20
329+
; ARMOPTNONE-NEXT: sub sp, sp, #24
330+
; ARMOPTNONE-NEXT: str r0, [sp, #4] @ 4-byte Spill
331+
; ARMOPTNONE-NEXT: str r2, [sp, #8] @ 4-byte Spill
332+
; ARMOPTNONE-NEXT: str r1, [sp, #12] @ 4-byte Spill
333+
; ARMOPTNONE-NEXT: dmb ish
334+
; ARMOPTNONE-NEXT: ldr r1, [r0]
335+
; ARMOPTNONE-NEXT: ldr r0, [r0, #4]
336+
; ARMOPTNONE-NEXT: str r1, [sp, #16] @ 4-byte Spill
337+
; ARMOPTNONE-NEXT: str r0, [sp, #20] @ 4-byte Spill
339338
; ARMOPTNONE-NEXT: b LBB5_1
340339
; ARMOPTNONE-NEXT: LBB5_1: @ %atomicrmw.start
341340
; ARMOPTNONE-NEXT: @ =>This Loop Header: Depth=1
@@ -382,8 +381,7 @@ define void @test_old_store_64bit(ptr %p, i64 %v) {
382381
; ARMOPTNONE-NEXT: LBB5_5: @ %atomicrmw.end
383382
; ARMOPTNONE-NEXT: dmb ish
384383
; ARMOPTNONE-NEXT: sub sp, r7, #20
385-
; ARMOPTNONE-NEXT: pop {r8, r10, r11}
386-
; ARMOPTNONE-NEXT: pop {r4, r5, r7, pc}
384+
; ARMOPTNONE-NEXT: pop {r4, r5, r7, r8, r10, r11, pc}
387385
;
388386
; THUMBTWO-LABEL: test_old_store_64bit:
389387
; THUMBTWO: @ %bb.0:
@@ -864,20 +862,19 @@ define void @store_atomic_f64__seq_cst(ptr %ptr, double %val1) {
864862
;
865863
; ARMOPTNONE-LABEL: store_atomic_f64__seq_cst:
866864
; ARMOPTNONE: @ %bb.0:
867-
; ARMOPTNONE-NEXT: push {r4, r5, r7, lr}
868-
; ARMOPTNONE-NEXT: add r7, sp, #8
869-
; ARMOPTNONE-NEXT: push {r8, r10, r11}
870-
; ARMOPTNONE-NEXT: sub sp, sp, #24
871-
; ARMOPTNONE-NEXT: str r0, [sp, #4] @ 4-byte Spill
872-
; ARMOPTNONE-NEXT: vmov d16, r1, r2
873-
; ARMOPTNONE-NEXT: vmov r1, r2, d16
874-
; ARMOPTNONE-NEXT: str r2, [sp, #8] @ 4-byte Spill
875-
; ARMOPTNONE-NEXT: str r1, [sp, #12] @ 4-byte Spill
876-
; ARMOPTNONE-NEXT: dmb ish
877-
; ARMOPTNONE-NEXT: ldr r1, [r0]
878-
; ARMOPTNONE-NEXT: ldr r0, [r0, #4]
879-
; ARMOPTNONE-NEXT: str r1, [sp, #16] @ 4-byte Spill
880-
; ARMOPTNONE-NEXT: str r0, [sp, #20] @ 4-byte Spill
865+
; ARMOPTNONE-NEXT: push {r4, r5, r7, r8, r10, r11, lr}
866+
; ARMOPTNONE-NEXT: add r7, sp, #20
867+
; ARMOPTNONE-NEXT: sub sp, sp, #24
868+
; ARMOPTNONE-NEXT: str r0, [sp, #4] @ 4-byte Spill
869+
; ARMOPTNONE-NEXT: vmov d16, r1, r2
870+
; ARMOPTNONE-NEXT: vmov r1, r2, d16
871+
; ARMOPTNONE-NEXT: str r2, [sp, #8] @ 4-byte Spill
872+
; ARMOPTNONE-NEXT: str r1, [sp, #12] @ 4-byte Spill
873+
; ARMOPTNONE-NEXT: dmb ish
874+
; ARMOPTNONE-NEXT: ldr r1, [r0]
875+
; ARMOPTNONE-NEXT: ldr r0, [r0, #4]
876+
; ARMOPTNONE-NEXT: str r1, [sp, #16] @ 4-byte Spill
877+
; ARMOPTNONE-NEXT: str r0, [sp, #20] @ 4-byte Spill
881878
; ARMOPTNONE-NEXT: b LBB13_1
882879
; ARMOPTNONE-NEXT: LBB13_1: @ %atomicrmw.start
883880
; ARMOPTNONE-NEXT: @ =>This Loop Header: Depth=1
@@ -924,8 +921,7 @@ define void @store_atomic_f64__seq_cst(ptr %ptr, double %val1) {
924921
; ARMOPTNONE-NEXT: LBB13_5: @ %atomicrmw.end
925922
; ARMOPTNONE-NEXT: dmb ish
926923
; ARMOPTNONE-NEXT: sub sp, r7, #20
927-
; ARMOPTNONE-NEXT: pop {r8, r10, r11}
928-
; ARMOPTNONE-NEXT: pop {r4, r5, r7, pc}
924+
; ARMOPTNONE-NEXT: pop {r4, r5, r7, r8, r10, r11, pc}
929925
;
930926
; THUMBTWO-LABEL: store_atomic_f64__seq_cst:
931927
; THUMBTWO: @ %bb.0:

‎llvm/test/CodeGen/ARM/call-tc.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@ define void @t1() "frame-pointer"="all" {
1717
ret void
1818
}
1919

20-
define void @t2() "frame-pointer"="all" {
20+
define void @t2() "frame-pointer"="none" {
2121
; CHECKV6-LABEL: t2:
2222
; CHECKV6: bx r0
2323
; CHECKT2D-LABEL: t2:
@@ -102,7 +102,7 @@ bb:
102102

103103
; Make sure codegenprep is duplicating ret instructions to enable tail calls.
104104
; rdar://11140249
105-
define i32 @t8(i32 %x) nounwind ssp "frame-pointer"="all" {
105+
define i32 @t8(i32 %x) nounwind ssp "frame-pointer"="none" {
106106
entry:
107107
; CHECKT2D-LABEL: t8:
108108
; CHECKT2D-NOT: push

‎llvm/test/CodeGen/ARM/debug-frame.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -526,7 +526,7 @@ entry:
526526
; Test 4
527527
;-------------------------------------------------------------------------------
528528

529-
define void @test4() nounwind {
529+
define void @test4() nounwind "frame-pointer"="none" {
530530
entry:
531531
ret void
532532
}

‎llvm/test/CodeGen/ARM/ehabi.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -575,7 +575,7 @@ entry:
575575
; Test 4
576576
;-------------------------------------------------------------------------------
577577

578-
define void @test4() nounwind {
578+
define void @test4() nounwind "frame-pointer"="none" {
579579
entry:
580580
ret void
581581
}

‎llvm/test/CodeGen/ARM/fast-isel-frameaddr.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@ entry:
1616
; DARWIN-THUMB2: mov r0, r7
1717

1818
; LINUX-ARM-LABEL: frameaddr_index0:
19-
; LINUX-ARM: push {r11, lr}
19+
; LINUX-ARM: push {r11}
2020
; LINUX-ARM: mov r11, sp
2121
; LINUX-ARM: mov r0, r11
2222

@@ -42,7 +42,7 @@ entry:
4242
; DARWIN-THUMB2: ldr r0, [r7]
4343

4444
; LINUX-ARM-LABEL: frameaddr_index1:
45-
; LINUX-ARM: push {r11, lr}
45+
; LINUX-ARM: push {r11}
4646
; LINUX-ARM: mov r11, sp
4747
; LINUX-ARM: ldr r0, [r11]
4848

@@ -73,7 +73,7 @@ entry:
7373
; DARWIN-THUMB2: ldr r0, [r0]
7474

7575
; LINUX-ARM-LABEL: frameaddr_index3:
76-
; LINUX-ARM: push {r11, lr}
76+
; LINUX-ARM: push {r11}
7777
; LINUX-ARM: mov r11, sp
7878
; LINUX-ARM: ldr r0, [r11]
7979
; LINUX-ARM: ldr r0, [r0]

‎llvm/test/CodeGen/ARM/frame-chain.ll

Lines changed: 7 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -10,11 +10,14 @@
1010
define dso_local noundef i32 @leaf(i32 noundef %0) {
1111
; LEAF-FP-LABEL: leaf:
1212
; LEAF-FP: @ %bb.0:
13-
; LEAF-FP-NEXT: .pad #4
14-
; LEAF-FP-NEXT: sub sp, sp, #4
15-
; LEAF-FP-NEXT: str r0, [sp]
13+
; LEAF-FP-NEXT: .save {r11, lr}
14+
; LEAF-FP-NEXT: push {r11, lr}
15+
; LEAF-FP-NEXT: .setfp r11, sp
16+
; LEAF-FP-NEXT: mov r11, sp
17+
; LEAF-FP-NEXT: push {r0}
1618
; LEAF-FP-NEXT: add r0, r0, #4
17-
; LEAF-FP-NEXT: add sp, sp, #4
19+
; LEAF-FP-NEXT: mov sp, r11
20+
; LEAF-FP-NEXT: pop {r11, lr}
1821
; LEAF-FP-NEXT: mov pc, lr
1922
;
2023
; LEAF-FP-AAPCS-LABEL: leaf:

‎llvm/test/CodeGen/ARM/ifcvt5.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@
55

66
@x = external global ptr ; <ptr> [#uses=1]
77

8-
define void @foo(i32 %a) "frame-pointer"="all" {
8+
define void @foo(i32 %a) "frame-pointer"="none" {
99
; A8-LABEL: foo:
1010
; A8: @ %bb.0: @ %entry
1111
; A8-NEXT: movw r1, :lower16:(L_x$non_lazy_ptr-(LPC0_0+8))

‎llvm/test/CodeGen/ARM/ldrd.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -168,7 +168,7 @@ define void @ldrd_postupdate_inc(ptr %p0) "frame-pointer"="all" {
168168
; NORMAL: strd r1, r2, [r0], #-8
169169
; CONSERVATIVE-NOT: strd
170170
; CHECK: bx lr
171-
define ptr @strd_postupdate_dec(ptr %p0, i32 %v0, i32 %v1) "frame-pointer"="all" {
171+
define ptr @strd_postupdate_dec(ptr %p0, i32 %v0, i32 %v1) "frame-pointer"="none" {
172172
%p0.1 = getelementptr i32, ptr %p0, i32 1
173173
store i32 %v0, ptr %p0
174174
store i32 %v1, ptr %p0.1
@@ -180,7 +180,7 @@ define ptr @strd_postupdate_dec(ptr %p0, i32 %v0, i32 %v1) "frame-pointer"="all"
180180
; NORMAL: strd r1, r2, [r0], #8
181181
; CONSERVATIVE-NOT: strd
182182
; CHECK: bx lr
183-
define ptr @strd_postupdate_inc(ptr %p0, i32 %v0, i32 %v1) "frame-pointer"="all" {
183+
define ptr @strd_postupdate_inc(ptr %p0, i32 %v0, i32 %v1) "frame-pointer"="none" {
184184
%p0.1 = getelementptr i32, ptr %p0, i32 1
185185
store i32 %v0, ptr %p0
186186
store i32 %v1, ptr %p0.1

‎llvm/test/CodeGen/ARM/stack-frame-layout-remarks.ll

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -51,7 +51,7 @@ declare void @llvm.dbg.declare(metadata, metadata, metadata) #0
5151
; BOTH: [SP-8]{{.+}}8{{.+}}4
5252
; DEBUG: a @ dot.c:13
5353
; STRIPPED-NOT: a @ dot.c:13
54-
define void @cleanup_array(ptr %0) #1 {
54+
define void @cleanup_array(ptr %0) #3 {
5555
%2 = alloca ptr, align 8
5656
store ptr %0, ptr %2, align 8
5757
call void @llvm.dbg.declare(metadata ptr %2, metadata !41, metadata !DIExpression()), !dbg !46
@@ -62,7 +62,7 @@ define void @cleanup_array(ptr %0) #1 {
6262
; BOTH: [SP-8]{{.+}}8{{.+}}4
6363
; DEBUG: res @ dot.c:21
6464
; STRIPPED-NOT: res @ dot.c:21
65-
define void @cleanup_result(ptr %0) #1 {
65+
define void @cleanup_result(ptr %0) #3 {
6666
%2 = alloca ptr, align 8
6767
store ptr %0, ptr %2, align 8
6868
call void @llvm.dbg.declare(metadata ptr %2, metadata !47, metadata !DIExpression()), !dbg !51
@@ -92,7 +92,7 @@ define void @cleanup_result(ptr %0) #1 {
9292
; BOTH: [SP-40]{{.+}}4{{.+}}4
9393
; DEBUG: i @ dot.c:55
9494
; STRIPPED-NOT: i @ dot.c:55
95-
define i32 @do_work(ptr %0, ptr %1, ptr %2) #1 {
95+
define i32 @do_work(ptr %0, ptr %1, ptr %2) #3 {
9696
%4 = alloca i32, align 4
9797
%5 = alloca ptr, align 8
9898
%6 = alloca ptr, align 8
@@ -144,7 +144,7 @@ define i32 @do_work(ptr %0, ptr %1, ptr %2) #1 {
144144
; BOTH: [SP-20]{{.+}}4{{.*}}4
145145
; DEBUG: i @ dot.c:69
146146
; STRIPPED-NOT: i @ dot.c:69
147-
define ptr @gen_array(i32 %0) #1 {
147+
define ptr @gen_array(i32 %0) #3 {
148148
%2 = alloca ptr, align 8
149149
%3 = alloca i32, align 4
150150
%4 = alloca ptr, align 8
@@ -227,6 +227,7 @@ uselistorder ptr @llvm.dbg.declare, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,
227227
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
228228
attributes #1 = { "frame-pointer"="all" }
229229
attributes #2 = { ssp "stack-protector-buffer-size"="5" "frame-pointer"="all" }
230+
attributes #3 = { "frame-pointer"="none" }
230231

231232
!llvm.dbg.cu = !{!0, !2}
232233
!llvm.module.flags = !{!18, !19, !20, !21, !22, !23, !24}

‎llvm/test/CodeGen/ARM/stack-size-section.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -29,4 +29,4 @@ define void @dynalloc(i32 %N) #0 {
2929
ret void
3030
}
3131

32-
attributes #0 = { "frame-pointer"="all" }
32+
attributes #0 = { "frame-pointer"="none" }

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