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[RISCV][GISel] Support G_FPEXT/G_FPTRUNC for F and D extension.
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5 files changed

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‎llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -197,6 +197,17 @@ RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST) {
197197
(ST.hasStdExtD() && typeIs(0, s64)(Query));
198198
});
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200+
getActionDefinitionsBuilder(G_FPTRUNC).legalIf(
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[=, &ST](const LegalityQuery &Query) -> bool {
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return (ST.hasStdExtD() && typeIs(0, s32)(Query) &&
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typeIs(1, s64)(Query));
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});
205+
getActionDefinitionsBuilder(G_FPEXT).legalIf(
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[=, &ST](const LegalityQuery &Query) -> bool {
207+
return (ST.hasStdExtD() && typeIs(0, s64)(Query) &&
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typeIs(1, s32)(Query));
209+
});
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200211
getLegacyLegalizerInfo().computeTables();
201212
}
202213

‎llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp

Lines changed: 24 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -204,6 +204,30 @@ RISCVRegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
204204
&RISCV::ValueMappings[RISCV::FPR32Idx]});
205205
break;
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}
207+
case TargetOpcode::G_FPEXT: {
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LLT ToTy = MRI.getType(MI.getOperand(0).getReg());
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(void)ToTy;
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LLT FromTy = MRI.getType(MI.getOperand(1).getReg());
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(void)FromTy;
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assert(ToTy.getSizeInBits() == 64 && FromTy.getSizeInBits() == 32 &&
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"Unsupported size for G_FPEXT");
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OperandsMapping =
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getOperandsMapping({&RISCV::ValueMappings[RISCV::FPR64Idx],
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&RISCV::ValueMappings[RISCV::FPR32Idx]});
217+
break;
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}
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case TargetOpcode::G_FPTRUNC: {
220+
LLT ToTy = MRI.getType(MI.getOperand(0).getReg());
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(void)ToTy;
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LLT FromTy = MRI.getType(MI.getOperand(1).getReg());
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(void)FromTy;
224+
assert(ToTy.getSizeInBits() == 32 && FromTy.getSizeInBits() == 64 &&
225+
"Unsupported size for G_FPTRUNC");
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OperandsMapping =
227+
getOperandsMapping({&RISCV::ValueMappings[RISCV::FPR32Idx],
228+
&RISCV::ValueMappings[RISCV::FPR64Idx]});
229+
break;
230+
}
207231
default:
208232
return getInvalidInstructionMapping();
209233
}

‎llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/fp-ext-trunc.mir

Lines changed: 50 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,50 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=riscv32 -mattr=+d -run-pass=instruction-select \
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# RUN: -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s
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# RUN: llc -mtriple=riscv64 -mattr=+d -run-pass=instruction-select \
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# RUN: -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s
6+
7+
---
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name: fpext
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1:
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liveins: $f10_f
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; CHECK-LABEL: name: fpext
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; CHECK: liveins: $f10_f
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f
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; CHECK-NEXT: [[FCVT_D_S:%[0-9]+]]:fpr64 = nofpexcept FCVT_D_S [[COPY]], 0
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; CHECK-NEXT: $f10_d = COPY [[FCVT_D_S]]
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; CHECK-NEXT: PseudoRET implicit $f10_d
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%0:fprb(s32) = COPY $f10_f
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%1:fprb(s64) = G_FPEXT %0(s32)
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$f10_d = COPY %1(s64)
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PseudoRET implicit $f10_d
27+
28+
...
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---
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name: fptrunc
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1:
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liveins: $f10_d
37+
38+
; CHECK-LABEL: name: fptrunc
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; CHECK: liveins: $f10_d
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d
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; CHECK-NEXT: [[FCVT_S_D:%[0-9]+]]:fpr32 = nofpexcept FCVT_S_D [[COPY]], 7
43+
; CHECK-NEXT: $f10_f = COPY [[FCVT_S_D]]
44+
; CHECK-NEXT: PseudoRET implicit $f10_f
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%0:fprb(s64) = COPY $f10_d
46+
%1:fprb(s32) = G_FPTRUNC %0(s64)
47+
$f10_f = COPY %1(s32)
48+
PseudoRET implicit $f10_f
49+
50+
...

‎llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-fp-ext-trunc.mir

Lines changed: 44 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,44 @@
1+
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3
2+
# RUN: llc -mtriple=riscv32 -mattr=+d -run-pass=legalizer %s -o - \
3+
# RUN: | FileCheck %s
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# RUN: llc -mtriple=riscv64 -mattr=+d -run-pass=legalizer %s -o - \
5+
# RUN: | FileCheck %s
6+
7+
---
8+
name: fpext
9+
body: |
10+
bb.1:
11+
liveins: $f10_f
12+
13+
; CHECK-LABEL: name: fpext
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; CHECK: liveins: $f10_f
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $f10_f
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; CHECK-NEXT: [[FPEXT:%[0-9]+]]:_(s64) = G_FPEXT [[COPY]](s32)
18+
; CHECK-NEXT: $f10_d = COPY [[FPEXT]](s64)
19+
; CHECK-NEXT: PseudoRET implicit $f10_d
20+
%0:_(s32) = COPY $f10_f
21+
%1:_(s64) = G_FPEXT %0(s32)
22+
$f10_d = COPY %1(s64)
23+
PseudoRET implicit $f10_d
24+
25+
...
26+
---
27+
name: fptrunc
28+
body: |
29+
bb.1:
30+
liveins: $f10_d
31+
32+
; CHECK-LABEL: name: fptrunc
33+
; CHECK: liveins: $f10_d
34+
; CHECK-NEXT: {{ $}}
35+
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $f10_d
36+
; CHECK-NEXT: [[FPTRUNC:%[0-9]+]]:_(s32) = G_FPTRUNC [[COPY]](s64)
37+
; CHECK-NEXT: $f10_f = COPY [[FPTRUNC]](s32)
38+
; CHECK-NEXT: PseudoRET implicit $f10_f
39+
%0:_(s64) = COPY $f10_d
40+
%1:_(s32) = G_FPTRUNC %0(s64)
41+
$f10_f = COPY %1(s32)
42+
PseudoRET implicit $f10_f
43+
44+
...

‎llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/fp-ext-trunc.mir

Lines changed: 50 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,50 @@
1+
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2+
# RUN: llc -mtriple=riscv32 -mattr=+d -run-pass=regbankselect \
3+
# RUN: -simplify-mir -verify-machineinstrs %s \
4+
# RUN: -o - | FileCheck %s
5+
# RUN: llc -mtriple=riscv64 -mattr=+d -run-pass=regbankselect \
6+
# RUN: -simplify-mir -verify-machineinstrs %s \
7+
# RUN: -o - | FileCheck %s
8+
9+
---
10+
name: fpext
11+
legalized: true
12+
tracksRegLiveness: true
13+
body: |
14+
bb.1:
15+
liveins: $f10_f
16+
17+
; CHECK-LABEL: name: fpext
18+
; CHECK: liveins: $f10_f
19+
; CHECK-NEXT: {{ $}}
20+
; CHECK-NEXT: [[COPY:%[0-9]+]]:fprb(s32) = COPY $f10_f
21+
; CHECK-NEXT: [[FPEXT:%[0-9]+]]:fprb(s64) = G_FPEXT [[COPY]](s32)
22+
; CHECK-NEXT: $f10_d = COPY [[FPEXT]](s64)
23+
; CHECK-NEXT: PseudoRET implicit $f10_d
24+
%0:_(s32) = COPY $f10_f
25+
%1:_(s64) = G_FPEXT %0(s32)
26+
$f10_d = COPY %1(s64)
27+
PseudoRET implicit $f10_d
28+
29+
...
30+
---
31+
name: fptrunc
32+
legalized: true
33+
tracksRegLiveness: true
34+
body: |
35+
bb.1:
36+
liveins: $f10_d
37+
38+
; CHECK-LABEL: name: fptrunc
39+
; CHECK: liveins: $f10_d
40+
; CHECK-NEXT: {{ $}}
41+
; CHECK-NEXT: [[COPY:%[0-9]+]]:fprb(s64) = COPY $f10_d
42+
; CHECK-NEXT: [[FPTRUNC:%[0-9]+]]:fprb(s32) = G_FPTRUNC [[COPY]](s64)
43+
; CHECK-NEXT: $f10_f = COPY [[FPTRUNC]](s32)
44+
; CHECK-NEXT: PseudoRET implicit $f10_f
45+
%0:_(s64) = COPY $f10_d
46+
%1:_(s32) = G_FPTRUNC %0(s64)
47+
$f10_f = COPY %1(s32)
48+
PseudoRET implicit $f10_f
49+
50+
...

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