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2 files changed

+97
-92
lines changed

‎llvm/lib/Target/AMDGPU/AMDGPU.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -360,7 +360,8 @@ class SIModeRegisterPass : public PassInfoMixin<SIModeRegisterPass> {
360360

361361
class GCNCreateVOPDPass : public PassInfoMixin<GCNCreateVOPDPass> {
362362
public:
363-
PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &AM);
363+
PreservedAnalyses run(MachineFunction &MF,
364+
MachineFunctionAnalysisManager &AM);
364365
};
365366

366367
FunctionPass *createAMDGPUAnnotateUniformValuesLegacy();

‎llvm/lib/Target/AMDGPU/GCNCreateVOPD.cpp

Lines changed: 95 additions & 91 deletions
Original file line numberDiff line numberDiff line change
@@ -49,105 +49,108 @@ class GCNCreateVOPD {
4949
MachineInstr *SecondMI;
5050
};
5151

52-
public:
53-
const GCNSubtarget *ST = nullptr;
54-
55-
bool doReplace(const SIInstrInfo *SII, VOPDCombineInfo &CI) {
56-
auto *FirstMI = CI.FirstMI;
57-
auto *SecondMI = CI.SecondMI;
58-
unsigned Opc1 = FirstMI->getOpcode();
59-
unsigned Opc2 = SecondMI->getOpcode();
60-
unsigned EncodingFamily =
61-
AMDGPU::getVOPDEncodingFamily(SII->getSubtarget());
62-
int NewOpcode =
63-
AMDGPU::getVOPDFull(AMDGPU::getVOPDOpcode(Opc1),
64-
AMDGPU::getVOPDOpcode(Opc2), EncodingFamily);
65-
assert(NewOpcode != -1 &&
66-
"Should have previously determined this as a possible VOPD\n");
67-
68-
auto VOPDInst = BuildMI(*FirstMI->getParent(), FirstMI,
69-
FirstMI->getDebugLoc(), SII->get(NewOpcode))
70-
.setMIFlags(FirstMI->getFlags() | SecondMI->getFlags());
71-
72-
namespace VOPD = AMDGPU::VOPD;
73-
MachineInstr *MI[] = {FirstMI, SecondMI};
74-
auto InstInfo =
75-
AMDGPU::getVOPDInstInfo(FirstMI->getDesc(), SecondMI->getDesc());
76-
77-
for (auto CompIdx : VOPD::COMPONENTS) {
78-
auto MCOprIdx = InstInfo[CompIdx].getIndexOfDstInMCOperands();
79-
VOPDInst.add(MI[CompIdx]->getOperand(MCOprIdx));
80-
}
81-
82-
for (auto CompIdx : VOPD::COMPONENTS) {
83-
auto CompSrcOprNum = InstInfo[CompIdx].getCompSrcOperandsNum();
84-
for (unsigned CompSrcIdx = 0; CompSrcIdx < CompSrcOprNum; ++CompSrcIdx) {
85-
auto MCOprIdx = InstInfo[CompIdx].getIndexOfSrcInMCOperands(CompSrcIdx);
52+
public:
53+
const GCNSubtarget *ST = nullptr;
54+
55+
bool doReplace(const SIInstrInfo *SII, VOPDCombineInfo &CI) {
56+
auto *FirstMI = CI.FirstMI;
57+
auto *SecondMI = CI.SecondMI;
58+
unsigned Opc1 = FirstMI->getOpcode();
59+
unsigned Opc2 = SecondMI->getOpcode();
60+
unsigned EncodingFamily =
61+
AMDGPU::getVOPDEncodingFamily(SII->getSubtarget());
62+
int NewOpcode =
63+
AMDGPU::getVOPDFull(AMDGPU::getVOPDOpcode(Opc1),
64+
AMDGPU::getVOPDOpcode(Opc2), EncodingFamily);
65+
assert(NewOpcode != -1 &&
66+
"Should have previously determined this as a possible VOPD\n");
67+
68+
auto VOPDInst =
69+
BuildMI(*FirstMI->getParent(), FirstMI, FirstMI->getDebugLoc(),
70+
SII->get(NewOpcode))
71+
.setMIFlags(FirstMI->getFlags() | SecondMI->getFlags());
72+
73+
namespace VOPD = AMDGPU::VOPD;
74+
MachineInstr *MI[] = {FirstMI, SecondMI};
75+
auto InstInfo =
76+
AMDGPU::getVOPDInstInfo(FirstMI->getDesc(), SecondMI->getDesc());
77+
78+
for (auto CompIdx : VOPD::COMPONENTS) {
79+
auto MCOprIdx = InstInfo[CompIdx].getIndexOfDstInMCOperands();
8680
VOPDInst.add(MI[CompIdx]->getOperand(MCOprIdx));
8781
}
88-
}
8982

90-
SII->fixImplicitOperands(*VOPDInst);
91-
for (auto CompIdx : VOPD::COMPONENTS)
92-
VOPDInst.copyImplicitOps(*MI[CompIdx]);
83+
for (auto CompIdx : VOPD::COMPONENTS) {
84+
auto CompSrcOprNum = InstInfo[CompIdx].getCompSrcOperandsNum();
85+
for (unsigned CompSrcIdx = 0; CompSrcIdx < CompSrcOprNum;
86+
++CompSrcIdx) {
87+
auto MCOprIdx =
88+
InstInfo[CompIdx].getIndexOfSrcInMCOperands(CompSrcIdx);
89+
VOPDInst.add(MI[CompIdx]->getOperand(MCOprIdx));
90+
}
91+
}
9392

94-
LLVM_DEBUG(dbgs() << "VOPD Fused: " << *VOPDInst << " from\tX: "
95-
<< *CI.FirstMI << "\tY: " << *CI.SecondMI << "\n");
93+
SII->fixImplicitOperands(*VOPDInst);
94+
for (auto CompIdx : VOPD::COMPONENTS)
95+
VOPDInst.copyImplicitOps(*MI[CompIdx]);
9696

97-
for (auto CompIdx : VOPD::COMPONENTS)
98-
MI[CompIdx]->eraseFromParent();
97+
LLVM_DEBUG(dbgs() << "VOPD Fused: " << *VOPDInst << " from\tX: "
98+
<< *CI.FirstMI << "\tY: " << *CI.SecondMI << "\n");
9999

100-
++NumVOPDCreated;
101-
return true;
102-
}
100+
for (auto CompIdx : VOPD::COMPONENTS)
101+
MI[CompIdx]->eraseFromParent();
103102

104-
bool run(MachineFunction &MF) {
105-
ST = &MF.getSubtarget<GCNSubtarget>();
106-
if (!AMDGPU::hasVOPD(*ST) || !ST->isWave32())
107-
return false;
108-
LLVM_DEBUG(dbgs() << "CreateVOPD Pass:\n");
109-
110-
const SIInstrInfo *SII = ST->getInstrInfo();
111-
bool Changed = false;
112-
113-
SmallVector<VOPDCombineInfo> ReplaceCandidates;
114-
115-
for (auto &MBB : MF) {
116-
auto MII = MBB.begin(), E = MBB.end();
117-
while (MII != E) {
118-
auto *FirstMI = &*MII;
119-
MII = next_nodbg(MII, MBB.end());
120-
if (MII == MBB.end())
121-
break;
122-
if (FirstMI->isDebugInstr())
123-
continue;
124-
auto *SecondMI = &*MII;
125-
unsigned Opc = FirstMI->getOpcode();
126-
unsigned Opc2 = SecondMI->getOpcode();
127-
llvm::AMDGPU::CanBeVOPD FirstCanBeVOPD = AMDGPU::getCanBeVOPD(Opc);
128-
llvm::AMDGPU::CanBeVOPD SecondCanBeVOPD = AMDGPU::getCanBeVOPD(Opc2);
129-
VOPDCombineInfo CI;
130-
131-
if (FirstCanBeVOPD.X && SecondCanBeVOPD.Y)
132-
CI = VOPDCombineInfo(FirstMI, SecondMI);
133-
else if (FirstCanBeVOPD.Y && SecondCanBeVOPD.X)
134-
CI = VOPDCombineInfo(SecondMI, FirstMI);
135-
else
136-
continue;
137-
// checkVOPDRegConstraints cares about program order, but doReplace
138-
// cares about X-Y order in the constituted VOPD
139-
if (llvm::checkVOPDRegConstraints(*SII, *FirstMI, *SecondMI)) {
140-
ReplaceCandidates.push_back(CI);
141-
++MII;
103+
++NumVOPDCreated;
104+
return true;
105+
}
106+
107+
bool run(MachineFunction &MF) {
108+
ST = &MF.getSubtarget<GCNSubtarget>();
109+
if (!AMDGPU::hasVOPD(*ST) || !ST->isWave32())
110+
return false;
111+
LLVM_DEBUG(dbgs() << "CreateVOPD Pass:\n");
112+
113+
const SIInstrInfo *SII = ST->getInstrInfo();
114+
bool Changed = false;
115+
116+
SmallVector<VOPDCombineInfo> ReplaceCandidates;
117+
118+
for (auto &MBB : MF) {
119+
auto MII = MBB.begin(), E = MBB.end();
120+
while (MII != E) {
121+
auto *FirstMI = &*MII;
122+
MII = next_nodbg(MII, MBB.end());
123+
if (MII == MBB.end())
124+
break;
125+
if (FirstMI->isDebugInstr())
126+
continue;
127+
auto *SecondMI = &*MII;
128+
unsigned Opc = FirstMI->getOpcode();
129+
unsigned Opc2 = SecondMI->getOpcode();
130+
llvm::AMDGPU::CanBeVOPD FirstCanBeVOPD = AMDGPU::getCanBeVOPD(Opc);
131+
llvm::AMDGPU::CanBeVOPD SecondCanBeVOPD = AMDGPU::getCanBeVOPD(Opc2);
132+
VOPDCombineInfo CI;
133+
134+
if (FirstCanBeVOPD.X && SecondCanBeVOPD.Y)
135+
CI = VOPDCombineInfo(FirstMI, SecondMI);
136+
else if (FirstCanBeVOPD.Y && SecondCanBeVOPD.X)
137+
CI = VOPDCombineInfo(SecondMI, FirstMI);
138+
else
139+
continue;
140+
// checkVOPDRegConstraints cares about program order, but doReplace
141+
// cares about X-Y order in the constituted VOPD
142+
if (llvm::checkVOPDRegConstraints(*SII, *FirstMI, *SecondMI)) {
143+
ReplaceCandidates.push_back(CI);
144+
++MII;
145+
}
142146
}
143147
}
144-
}
145-
for (auto &CI : ReplaceCandidates) {
146-
Changed |= doReplace(SII, CI);
147-
}
148+
for (auto &CI : ReplaceCandidates) {
149+
Changed |= doReplace(SII, CI);
150+
}
148151

149-
return Changed;
150-
}
152+
return Changed;
153+
}
151154
};
152155

153156
class GCNCreateVOPDLegacy : public MachineFunctionPass {
@@ -173,8 +176,9 @@ class GCNCreateVOPDLegacy : public MachineFunctionPass {
173176

174177
} // namespace
175178

176-
PreservedAnalyses llvm::GCNCreateVOPDPass::run(MachineFunction &MF,
177-
MachineFunctionAnalysisManager &AM) {
179+
PreservedAnalyses
180+
llvm::GCNCreateVOPDPass::run(MachineFunction &MF,
181+
MachineFunctionAnalysisManager &AM) {
178182
if (!GCNCreateVOPD().run(MF))
179183
return PreservedAnalyses::all();
180184
return getMachineFunctionPassPreservedAnalyses().preserveSet<CFGAnalyses>();

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