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[AMDGPU][NPM] Port SIMemoryLegalizer to NPM
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4 files changed

+44
-14
lines changed

4 files changed

+44
-14
lines changed

llvm/lib/Target/AMDGPU/AMDGPU.h

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -363,6 +363,12 @@ class GCNCreateVOPDPass : public PassInfoMixin<GCNCreateVOPDPass> {
363363
PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &AM);
364364
};
365365

366+
class SIMemoryLegalizerPass : public PassInfoMixin<SIMemoryLegalizerPass> {
367+
public:
368+
PreservedAnalyses run(MachineFunction &MF,
369+
MachineFunctionAnalysisManager &MFAM);
370+
};
371+
366372
FunctionPass *createAMDGPUAnnotateUniformValuesLegacy();
367373

368374
ModulePass *createAMDGPUPrintfRuntimeBinding();
@@ -427,7 +433,7 @@ class SIAnnotateControlFlowPass
427433
void initializeSIAnnotateControlFlowLegacyPass(PassRegistry &);
428434
extern char &SIAnnotateControlFlowLegacyPassID;
429435

430-
void initializeSIMemoryLegalizerPass(PassRegistry&);
436+
void initializeSIMemoryLegalizerLegacyPass(PassRegistry &);
431437
extern char &SIMemoryLegalizerID;
432438

433439
void initializeSIModeRegisterLegacyPass(PassRegistry &);

llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -113,6 +113,7 @@ MACHINE_FUNCTION_PASS("si-load-store-opt", SILoadStoreOptimizerPass())
113113
MACHINE_FUNCTION_PASS("si-lower-control-flow", SILowerControlFlowPass())
114114
MACHINE_FUNCTION_PASS("si-lower-sgpr-spills", SILowerSGPRSpillsPass())
115115
MACHINE_FUNCTION_PASS("si-lower-wwm-copies", SILowerWWMCopiesPass())
116+
MACHINE_FUNCTION_PASS("si-memory-legalizer", SIMemoryLegalizerPass())
116117
MACHINE_FUNCTION_PASS("si-mode-register", SIModeRegisterPass())
117118
MACHINE_FUNCTION_PASS("si-opt-vgpr-liverange", SIOptimizeVGPRLiveRangePass())
118119
MACHINE_FUNCTION_PASS("si-optimize-exec-masking", SIOptimizeExecMaskingPass())
@@ -132,7 +133,6 @@ DUMMY_MACHINE_FUNCTION_PASS("amdgpu-set-wave-priority", AMDGPUSetWavePriorityPas
132133
DUMMY_MACHINE_FUNCTION_PASS("si-insert-hard-clauses", SIInsertHardClausesPass())
133134
DUMMY_MACHINE_FUNCTION_PASS("si-insert-waitcnts", SIInsertWaitcntsPass())
134135
DUMMY_MACHINE_FUNCTION_PASS("si-late-branch-lowering", SILateBranchLoweringPass())
135-
DUMMY_MACHINE_FUNCTION_PASS("si-memory-legalizer", SIMemoryLegalizerPass())
136136
DUMMY_MACHINE_FUNCTION_PASS("si-pre-emit-peephole", SIPreEmitPeepholePass())
137137
// TODO: Move amdgpu-preload-kern-arg-prolog to MACHINE_FUNCTION_PASS since it
138138
// already exists.

llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -541,7 +541,7 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUTarget() {
541541
initializeSILowerControlFlowLegacyPass(*PR);
542542
initializeSIPreEmitPeepholePass(*PR);
543543
initializeSILateBranchLoweringPass(*PR);
544-
initializeSIMemoryLegalizerPass(*PR);
544+
initializeSIMemoryLegalizerLegacyPass(*PR);
545545
initializeSIOptimizeExecMaskingLegacyPass(*PR);
546546
initializeSIPreAllocateWWMRegsLegacyPass(*PR);
547547
initializeSIFormMemoryClausesLegacyPass(*PR);
@@ -2151,7 +2151,8 @@ void AMDGPUCodeGenPassBuilder::addPreEmitPass(AddMachinePass &addPass) const {
21512151
if (isPassEnabled(EnableVOPD, CodeGenOptLevel::Less)) {
21522152
addPass(GCNCreateVOPDPass());
21532153
}
2154-
// TODO: addPass(SIMemoryLegalizerPass());
2154+
2155+
addPass(SIMemoryLegalizerPass());
21552156
// TODO: addPass(SIInsertWaitcntsPass());
21562157

21572158
// TODO: addPass(SIModeRegisterPass());

llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp

Lines changed: 33 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -21,8 +21,10 @@
2121
#include "llvm/ADT/StringExtras.h"
2222
#include "llvm/CodeGen/MachineBasicBlock.h"
2323
#include "llvm/CodeGen/MachineFunctionPass.h"
24+
#include "llvm/CodeGen/MachinePassManager.h"
2425
#include "llvm/IR/DiagnosticInfo.h"
2526
#include "llvm/IR/MemoryModelRelaxationAnnotations.h"
27+
#include "llvm/IR/PassManager.h"
2628
#include "llvm/Support/AtomicOrdering.h"
2729
#include "llvm/TargetParser/TargetParser.h"
2830

@@ -625,9 +627,9 @@ class SIGfx12CacheControl : public SIGfx11CacheControl {
625627
}
626628
};
627629

628-
class SIMemoryLegalizer final : public MachineFunctionPass {
630+
class SIMemoryLegalizer final {
629631
private:
630-
632+
const MachineModuleInfo &MMI;
631633
/// Cache Control.
632634
std::unique_ptr<SICacheControl> CC = nullptr;
633635

@@ -661,10 +663,16 @@ class SIMemoryLegalizer final : public MachineFunctionPass {
661663
bool expandAtomicCmpxchgOrRmw(const SIMemOpInfo &MOI,
662664
MachineBasicBlock::iterator &MI);
663665

666+
public:
667+
SIMemoryLegalizer(const MachineModuleInfo &MMI) : MMI(MMI) {};
668+
bool run(MachineFunction &MF);
669+
};
670+
671+
class SIMemoryLegalizerLegacy final : public MachineFunctionPass {
664672
public:
665673
static char ID;
666674

667-
SIMemoryLegalizer() : MachineFunctionPass(ID) {}
675+
SIMemoryLegalizerLegacy() : MachineFunctionPass(ID) {}
668676

669677
void getAnalysisUsage(AnalysisUsage &AU) const override {
670678
AU.setPreservesCFG();
@@ -2767,11 +2775,26 @@ bool SIMemoryLegalizer::expandAtomicCmpxchgOrRmw(const SIMemOpInfo &MOI,
27672775
return Changed;
27682776
}
27692777

2770-
bool SIMemoryLegalizer::runOnMachineFunction(MachineFunction &MF) {
2771-
bool Changed = false;
2772-
2778+
bool SIMemoryLegalizerLegacy::runOnMachineFunction(MachineFunction &MF) {
27732779
const MachineModuleInfo &MMI =
27742780
getAnalysis<MachineModuleInfoWrapperPass>().getMMI();
2781+
return SIMemoryLegalizer(MMI).run(MF);
2782+
}
2783+
2784+
PreservedAnalyses
2785+
SIMemoryLegalizerPass::run(MachineFunction &MF,
2786+
MachineFunctionAnalysisManager &MFAM) {
2787+
auto *MMI = MFAM.getResult<ModuleAnalysisManagerFunctionProxy>(MF)
2788+
.getCachedResult<MachineModuleAnalysis>(
2789+
*MF.getFunction().getParent());
2790+
assert(MMI && "MachineModuleAnalysis must be available");
2791+
if (!SIMemoryLegalizer(MMI->getMMI()).run(MF))
2792+
return PreservedAnalyses::all();
2793+
return getMachineFunctionPassPreservedAnalyses().preserveSet<CFGAnalyses>();
2794+
}
2795+
2796+
bool SIMemoryLegalizer::run(MachineFunction &MF) {
2797+
bool Changed = false;
27752798

27762799
SIMemOpAccess MOA(MMI.getObjFileInfo<AMDGPUMachineModuleInfo>());
27772800
CC = SICacheControl::create(MF.getSubtarget<GCNSubtarget>());
@@ -2812,11 +2835,11 @@ bool SIMemoryLegalizer::runOnMachineFunction(MachineFunction &MF) {
28122835
return Changed;
28132836
}
28142837

2815-
INITIALIZE_PASS(SIMemoryLegalizer, DEBUG_TYPE, PASS_NAME, false, false)
2838+
INITIALIZE_PASS(SIMemoryLegalizerLegacy, DEBUG_TYPE, PASS_NAME, false, false)
28162839

2817-
char SIMemoryLegalizer::ID = 0;
2818-
char &llvm::SIMemoryLegalizerID = SIMemoryLegalizer::ID;
2840+
char SIMemoryLegalizerLegacy::ID = 0;
2841+
char &llvm::SIMemoryLegalizerID = SIMemoryLegalizerLegacy::ID;
28192842

28202843
FunctionPass *llvm::createSIMemoryLegalizerPass() {
2821-
return new SIMemoryLegalizer();
2844+
return new SIMemoryLegalizerLegacy();
28222845
}

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