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[ConstraintElim] Add multi-exit tests for #94610.
Additional test coverage with multi-exit loops for #94610.
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‎llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit.ll

+286
Original file line numberDiff line numberDiff line change
@@ -481,4 +481,290 @@ exit:
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ret i1 %u
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}
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484+
define i1 @multi_exiting_loop_eq_different_exits_const_compare_known(ptr %s) {
485+
; CHECK-LABEL: define i1 @multi_exiting_loop_eq_different_exits_const_compare_known(
486+
; CHECK-SAME: ptr [[S:%.*]]) {
487+
; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: br label %[[LOOP_HEADER:.*]]
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; CHECK: [[LOOP_HEADER]]:
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; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ]
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; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i32 [[IV]], 1234
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; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT_1:.*]], label %[[LOOP_LATCH]]
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; CHECK: [[LOOP_LATCH]]:
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; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[S]], i32 [[IV]]
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; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[ARRAYIDX]], align 1
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; CHECK-NEXT: [[LATCH_C:%.*]] = icmp ult i8 [[TMP0]], 10
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; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
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; CHECK-NEXT: br i1 [[LATCH_C]], label %[[LOOP_HEADER]], label %[[EXIT_2:.*]]
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; CHECK: [[EXIT_1]]:
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; CHECK-NEXT: ret i1 true
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; CHECK: [[EXIT_2]]:
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; CHECK-NEXT: ret i1 true
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;
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entry:
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br label %loop.header
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loop.header:
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%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
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%exitcond.not = icmp eq i32 %iv, 1234
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br i1 %exitcond.not, label %exit.1, label %loop.latch
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loop.latch:
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%arrayidx = getelementptr inbounds i8, ptr %s, i32 %iv
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%0 = load i8, ptr %arrayidx, align 1
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%latch.c = icmp ult i8 %0, 10
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%iv.next = add nuw nsw i32 %iv, 1
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br i1 %latch.c, label %loop.header, label %exit.2
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exit.1:
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%t.1 = icmp ult i32 %iv, 1235
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ret i1 %t.1
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exit.2:
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%t.2 = icmp ult i32 %iv, 1235
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ret i1 %t.2
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}
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define i1 @multi_exiting_loop_eq_different_exits_2_const_compare_known(ptr %s, i1 %c.1, i1 %c.2) {
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; CHECK-LABEL: define i1 @multi_exiting_loop_eq_different_exits_2_const_compare_known(
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; CHECK-SAME: ptr [[S:%.*]], i1 [[C_1:%.*]], i1 [[C_2:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: br label %[[LOOP_HEADER:.*]]
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; CHECK: [[LOOP_HEADER]]:
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; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ]
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; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i32 [[IV]], 1234
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; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT_1:.*]], label %[[ELSE_1:.*]]
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; CHECK: [[ELSE_1]]:
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; CHECK-NEXT: br i1 [[C_1]], label %[[EXIT_1]], label %[[ELSE_2:.*]]
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; CHECK: [[ELSE_2]]:
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; CHECK-NEXT: br i1 [[C_2]], label %[[EXIT_2:.*]], label %[[LOOP_LATCH]]
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; CHECK: [[LOOP_LATCH]]:
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; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[S]], i32 [[IV]]
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; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[ARRAYIDX]], align 1
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; CHECK-NEXT: [[LATCH_C:%.*]] = icmp ult i8 [[TMP0]], 10
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; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
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; CHECK-NEXT: br i1 [[LATCH_C]], label %[[LOOP_HEADER]], label %[[EXIT_2]]
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; CHECK: [[EXIT_1]]:
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; CHECK-NEXT: [[T_1:%.*]] = icmp ult i32 [[IV]], 1235
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; CHECK-NEXT: ret i1 [[T_1]]
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; CHECK: [[EXIT_2]]:
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; CHECK-NEXT: ret i1 true
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;
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entry:
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br label %loop.header
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loop.header:
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%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
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%exitcond.not = icmp eq i32 %iv, 1234
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br i1 %exitcond.not, label %exit.1, label %else.1
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else.1:
562+
br i1 %c.1, label %exit.1, label %else.2
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else.2:
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br i1 %c.2, label %exit.2, label %loop.latch
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loop.latch:
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%arrayidx = getelementptr inbounds i8, ptr %s, i32 %iv
569+
%0 = load i8, ptr %arrayidx, align 1
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%latch.c = icmp ult i8 %0, 10
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%iv.next = add nuw nsw i32 %iv, 1
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br i1 %latch.c, label %loop.header, label %exit.2
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exit.1:
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%t.1 = icmp ult i32 %iv, 1235
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ret i1 %t.1
577+
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exit.2:
579+
%t.2 = icmp ult i32 %iv, 1235
580+
ret i1 %t.2
581+
}
582+
583+
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define i1 @multi_exiting_loop_eq_different_exits_compare_not_known(ptr %s, i32 %N) {
585+
; CHECK-LABEL: define i1 @multi_exiting_loop_eq_different_exits_compare_not_known(
586+
; CHECK-SAME: ptr [[S:%.*]], i32 [[N:%.*]]) {
587+
; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: br label %[[LOOP_HEADER:.*]]
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; CHECK: [[LOOP_HEADER]]:
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; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ]
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; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i32 [[IV]], [[N]]
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; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT_1:.*]], label %[[LOOP_LATCH]]
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; CHECK: [[LOOP_LATCH]]:
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; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[S]], i32 [[IV]]
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; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[ARRAYIDX]], align 1
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; CHECK-NEXT: [[LATCH_C:%.*]] = icmp ult i8 [[TMP0]], 10
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; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
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; CHECK-NEXT: br i1 [[LATCH_C]], label %[[LOOP_HEADER]], label %[[EXIT_2:.*]]
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; CHECK: [[EXIT_1]]:
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; CHECK-NEXT: ret i1 false
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; CHECK: [[EXIT_2]]:
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; CHECK-NEXT: ret i1 true
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;
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entry:
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br label %loop.header
484606

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loop.header:
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%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
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%exitcond.not = icmp eq i32 %iv, %N
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br i1 %exitcond.not, label %exit.1, label %loop.latch
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loop.latch:
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%arrayidx = getelementptr inbounds i8, ptr %s, i32 %iv
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%0 = load i8, ptr %arrayidx, align 1
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%latch.c = icmp ult i8 %0, 10
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%iv.next = add nuw nsw i32 %iv, 1
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br i1 %latch.c, label %loop.header, label %exit.2
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619+
exit.1:
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%t.1 = icmp ult i32 %iv, %N
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ret i1 %t.1
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exit.2:
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%t.2 = icmp ult i32 %iv, %N
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ret i1 %t.2
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}
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define i1 @multi_exiting_loop_eq_different_exits_2_compare_not_known(ptr %s, i32 %N, i1 %c.1, i1 %c.2) {
629+
; CHECK-LABEL: define i1 @multi_exiting_loop_eq_different_exits_2_compare_not_known(
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; CHECK-SAME: ptr [[S:%.*]], i32 [[N:%.*]], i1 [[C_1:%.*]], i1 [[C_2:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: br label %[[LOOP_HEADER:.*]]
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; CHECK: [[LOOP_HEADER]]:
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; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ]
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; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i32 [[IV]], [[N]]
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; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT_1:.*]], label %[[ELSE_1:.*]]
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; CHECK: [[ELSE_1]]:
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; CHECK-NEXT: br i1 [[C_1]], label %[[EXIT_1]], label %[[ELSE_2:.*]]
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; CHECK: [[ELSE_2]]:
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; CHECK-NEXT: br i1 [[C_2]], label %[[EXIT_2:.*]], label %[[LOOP_LATCH]]
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; CHECK: [[LOOP_LATCH]]:
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; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[S]], i32 [[IV]]
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; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[ARRAYIDX]], align 1
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; CHECK-NEXT: [[LATCH_C:%.*]] = icmp ult i8 [[TMP0]], 10
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; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
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; CHECK-NEXT: br i1 [[LATCH_C]], label %[[LOOP_HEADER]], label %[[EXIT_2]]
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; CHECK: [[EXIT_1]]:
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; CHECK-NEXT: [[T_1:%.*]] = icmp ult i32 [[IV]], [[N]]
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; CHECK-NEXT: ret i1 [[T_1]]
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; CHECK: [[EXIT_2]]:
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; CHECK-NEXT: ret i1 true
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;
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entry:
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br label %loop.header
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loop.header:
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%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
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%exitcond.not = icmp eq i32 %iv, %N
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br i1 %exitcond.not, label %exit.1, label %else.1
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else.1:
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br i1 %c.1, label %exit.1, label %else.2
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else.2:
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br i1 %c.2, label %exit.2, label %loop.latch
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loop.latch:
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%arrayidx = getelementptr inbounds i8, ptr %s, i32 %iv
669+
%0 = load i8, ptr %arrayidx, align 1
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%latch.c = icmp ult i8 %0, 10
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%iv.next = add nuw nsw i32 %iv, 1
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br i1 %latch.c, label %loop.header, label %exit.2
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exit.1:
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%t.1 = icmp ult i32 %iv, %N
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ret i1 %t.1
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exit.2:
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%t.2 = icmp ult i32 %iv, %N
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ret i1 %t.2
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}
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define i1 @multi_exiting_loop_ne_different_exits_const_compare_known(ptr %s) {
684+
; CHECK-LABEL: define i1 @multi_exiting_loop_ne_different_exits_const_compare_known(
685+
; CHECK-SAME: ptr [[S:%.*]]) {
686+
; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: br label %[[LOOP_HEADER:.*]]
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; CHECK: [[LOOP_HEADER]]:
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; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 1, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ]
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; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp ne i32 [[IV]], 1234
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; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[LOOP_LATCH]], label %[[EXIT_1:.*]]
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; CHECK: [[LOOP_LATCH]]:
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; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[S]], i32 [[IV]]
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; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[ARRAYIDX]], align 1
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; CHECK-NEXT: [[LATCH_C:%.*]] = icmp ult i8 [[TMP0]], 10
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; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
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; CHECK-NEXT: br i1 [[LATCH_C]], label %[[LOOP_HEADER]], label %[[EXIT_2:.*]]
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; CHECK: [[EXIT_1]]:
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; CHECK-NEXT: ret i1 true
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; CHECK: [[EXIT_2]]:
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; CHECK-NEXT: ret i1 true
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;
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entry:
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br label %loop.header
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loop.header:
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%iv = phi i32 [ 1, %entry ], [ %iv.next, %loop.latch ]
708+
%exitcond.not = icmp ne i32 %iv, 1234
709+
br i1 %exitcond.not, label %loop.latch, label %exit.1
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711+
loop.latch:
712+
%arrayidx = getelementptr inbounds i8, ptr %s, i32 %iv
713+
%0 = load i8, ptr %arrayidx, align 1
714+
%latch.c = icmp ult i8 %0, 10
715+
%iv.next = add nuw nsw i32 %iv, 1
716+
br i1 %latch.c, label %loop.header, label %exit.2
717+
718+
exit.1:
719+
%t.1 = icmp ult i32 %iv, 1235
720+
ret i1 %t.1
721+
722+
exit.2:
723+
%t.2 = icmp ult i32 %iv, 1235
724+
ret i1 %t.2
725+
}
726+
727+
define i1 @multi_exiting_loop_ne_different_exits_compare_not_known(ptr %s, i32 %N) {
728+
; CHECK-LABEL: define i1 @multi_exiting_loop_ne_different_exits_compare_not_known(
729+
; CHECK-SAME: ptr [[S:%.*]], i32 [[N:%.*]]) {
730+
; CHECK-NEXT: [[ENTRY:.*]]:
731+
; CHECK-NEXT: br label %[[LOOP_HEADER:.*]]
732+
; CHECK: [[LOOP_HEADER]]:
733+
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 1, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ]
734+
; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp ne i32 [[IV]], [[N]]
735+
; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[LOOP_LATCH]], label %[[EXIT_1:.*]]
736+
; CHECK: [[LOOP_LATCH]]:
737+
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[S]], i32 [[IV]]
738+
; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[ARRAYIDX]], align 1
739+
; CHECK-NEXT: [[LATCH_C:%.*]] = icmp ult i8 [[TMP0]], 10
740+
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
741+
; CHECK-NEXT: br i1 [[LATCH_C]], label %[[LOOP_HEADER]], label %[[EXIT_2:.*]]
742+
; CHECK: [[EXIT_1]]:
743+
; CHECK-NEXT: ret i1 false
744+
; CHECK: [[EXIT_2]]:
745+
; CHECK-NEXT: [[T_2:%.*]] = icmp ult i32 [[IV]], [[N]]
746+
; CHECK-NEXT: ret i1 [[T_2]]
747+
;
748+
entry:
749+
br label %loop.header
750+
751+
loop.header:
752+
%iv = phi i32 [ 1, %entry ], [ %iv.next, %loop.latch ]
753+
%exitcond.not = icmp ne i32 %iv, %N
754+
br i1 %exitcond.not, label %loop.latch, label %exit.1
755+
756+
loop.latch:
757+
%arrayidx = getelementptr inbounds i8, ptr %s, i32 %iv
758+
%0 = load i8, ptr %arrayidx, align 1
759+
%latch.c = icmp ult i8 %0, 10
760+
%iv.next = add nuw nsw i32 %iv, 1
761+
br i1 %latch.c, label %loop.header, label %exit.2
762+
763+
exit.1:
764+
%t.1 = icmp ult i32 %iv, %N
765+
ret i1 %t.1
766+
767+
exit.2:
768+
%t.2 = icmp ult i32 %iv, %N
769+
ret i1 %t.2
770+
}

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