@@ -781,6 +781,9 @@ class TargetTransformInfo {
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// / Return true if the target supports masked expand load.
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bool isLegalMaskedExpandLoad (Type *DataType) const ;
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+ // / Return true if the target supports strided load.
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+ bool isLegalStridedLoadStore (Type *DataType, Align Alignment) const ;
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+
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// / Return true if this is an alternating opcode pattern that can be lowered
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// / to a single instruction on the target. In X86 this is for the addsub
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// / instruction which corrsponds to a Shuffle + Fadd + FSub pattern in IR.
@@ -1412,6 +1415,20 @@ class TargetTransformInfo {
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Align Alignment, TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput,
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const Instruction *I = nullptr ) const ;
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+ // / \return The cost of strided memory operations.
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+ // / \p Opcode - is a type of memory access Load or Store
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+ // / \p DataTy - a vector type of the data to be loaded or stored
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+ // / \p Ptr - pointer [or vector of pointers] - address[es] in memory
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+ // / \p VariableMask - true when the memory access is predicated with a mask
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+ // / that is not a compile-time constant
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+ // / \p Alignment - alignment of single element
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+ // / \p I - the optional original context instruction, if one exists, e.g. the
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+ // / load/store to transform or the call to the gather/scatter intrinsic
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+ InstructionCost getStridedMemoryOpCost (
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+ unsigned Opcode, Type *DataTy, const Value *Ptr , bool VariableMask,
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+ Align Alignment, TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput,
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+ const Instruction *I = nullptr ) const ;
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+
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// / \return The cost of the interleaved memory operation.
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// / \p Opcode is the memory operation code
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// / \p VecTy is the vector type of the interleaved access.
@@ -1848,6 +1865,7 @@ class TargetTransformInfo::Concept {
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Align Alignment) = 0;
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virtual bool isLegalMaskedCompressStore (Type *DataType) = 0;
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virtual bool isLegalMaskedExpandLoad (Type *DataType) = 0;
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+ virtual bool isLegalStridedLoadStore (Type *DataType, Align Alignment) = 0;
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virtual bool isLegalAltInstr (VectorType *VecTy, unsigned Opcode0,
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unsigned Opcode1,
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const SmallBitVector &OpcodeMask) const = 0;
@@ -2023,6 +2041,11 @@ class TargetTransformInfo::Concept {
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bool VariableMask, Align Alignment,
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TTI::TargetCostKind CostKind,
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const Instruction *I = nullptr ) = 0 ;
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+ virtual InstructionCost
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+ getStridedMemoryOpCost (unsigned Opcode, Type *DataTy, const Value *Ptr ,
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+ bool VariableMask, Align Alignment,
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+ TTI::TargetCostKind CostKind,
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+ const Instruction *I = nullptr ) = 0 ;
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virtual InstructionCost getInterleavedMemoryOpCost (
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unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned > Indices,
@@ -2341,6 +2364,9 @@ class TargetTransformInfo::Model final : public TargetTransformInfo::Concept {
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bool isLegalMaskedExpandLoad (Type *DataType) override {
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return Impl.isLegalMaskedExpandLoad (DataType);
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}
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+ bool isLegalStridedLoadStore (Type *DataType, Align Alignment) override {
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+ return Impl.isLegalStridedLoadStore (DataType, Alignment);
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+ }
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bool isLegalAltInstr (VectorType *VecTy, unsigned Opcode0, unsigned Opcode1,
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const SmallBitVector &OpcodeMask) const override {
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return Impl.isLegalAltInstr (VecTy, Opcode0, Opcode1, OpcodeMask);
@@ -2671,6 +2697,14 @@ class TargetTransformInfo::Model final : public TargetTransformInfo::Concept {
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return Impl.getGatherScatterOpCost (Opcode, DataTy, Ptr , VariableMask,
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Alignment, CostKind, I);
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}
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+ InstructionCost
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+ getStridedMemoryOpCost (unsigned Opcode, Type *DataTy, const Value *Ptr ,
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+ bool VariableMask, Align Alignment,
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+ TTI::TargetCostKind CostKind,
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+ const Instruction *I = nullptr ) override {
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+ return Impl.getStridedMemoryOpCost (Opcode, DataTy, Ptr , VariableMask,
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+ Alignment, CostKind, I);
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+ }
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InstructionCost getInterleavedMemoryOpCost (
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unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned > Indices,
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Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
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