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[AMDGPU] Rewrite getVOPSrc0ForVT with !cond (#81956)
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+19
-31
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1 file changed

+19
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llvm/lib/Target/AMDGPU/SIInstrInfo.td

Lines changed: 19 additions & 31 deletions
Original file line numberDiff line numberDiff line change
@@ -1488,37 +1488,25 @@ class getSDWADstForVT<ValueType VT> {
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// instructions for the given VT.
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class getVOPSrc0ForVT<ValueType VT, bit IsTrue16, bit IsFake16 = 1> {
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RegisterOperand ret =
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!if(VT.isFP,
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!if(!eq(VT.Size, 64),
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VSrc_f64,
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!if(!or(!eq(VT.Value, f16.Value), !eq(VT.Value, bf16.Value)),
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!if(IsTrue16,
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!if(IsFake16, VSrcFake16_f16_Lo128, VSrcT_f16_Lo128),
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VSrc_f16
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),
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!if(!or(!eq(VT.Value, v2f16.Value), !eq(VT.Value, v2bf16.Value)),
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VSrc_v2f16,
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!if(!or(!eq(VT.Value, v4f16.Value), !eq(VT.Value, v4bf16.Value)),
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AVSrc_64,
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VSrc_f32
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)
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)
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)
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),
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!if(!eq(VT.Size, 64),
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VSrc_b64,
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!if(!eq(VT.Value, i16.Value),
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!if(IsTrue16,
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!if(IsFake16, VSrcFake16_b16_Lo128, VSrcT_b16_Lo128),
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VSrc_b16
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),
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!if(!eq(VT.Value, v2i16.Value),
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VSrc_v2b16,
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VSrc_b32
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)
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)
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)
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);
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!cond(!eq(VT, i64) : VSrc_b64,
1492+
!eq(VT, f64) : VSrc_f64,
1493+
!eq(VT, i32) : VSrc_b32,
1494+
!eq(VT, f32) : VSrc_f32,
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!eq(VT, i16) : !if(IsTrue16,
1496+
!if(IsFake16, VSrcFake16_b16_Lo128, VSrcT_b16_Lo128),
1497+
VSrc_b16),
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!eq(VT, f16) : !if(IsTrue16,
1499+
!if(IsFake16, VSrcFake16_f16_Lo128, VSrcT_f16_Lo128),
1500+
VSrc_f16),
1501+
!eq(VT, bf16) : !if(IsTrue16,
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!if(IsFake16, VSrcFake16_f16_Lo128, VSrcT_f16_Lo128),
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VSrc_f16),
1504+
!eq(VT, v2i16) : VSrc_v2b16,
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!eq(VT, v2f16) : VSrc_v2f16,
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!eq(VT, v2bf16) : VSrc_v2f16,
1507+
!eq(VT, v4f16) : AVSrc_64,
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!eq(VT, v4bf16) : AVSrc_64,
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1 : VSrc_b32);
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}
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class getSOPSrcForVT<ValueType VT> {

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