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| 1 | +; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 < %s | FileCheck -check-prefixes=CHECK,GFX908 %s |
| 2 | +; RUN: not llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a < %s 2> %t.err | FileCheck -check-prefixes=CHECK,GFX90A %s |
| 3 | +; RUN: FileCheck -check-prefix=ERR < %t.err %s |
| 4 | + |
| 5 | +; Test undefined behavior where a function ends up needing AGPRs that |
| 6 | +; was marked with "amdgpu-num-agpr="="0". There should be no asserts. |
| 7 | + |
| 8 | +; TODO: Should this be an error, or let UB happen? |
| 9 | + |
| 10 | +; ERR: error: <unknown>:0:0: no registers from class available to allocate in function 'kernel_illegal_agpr_use_asm' |
| 11 | +; ERR: error: <unknown>:0:0: no registers from class available to allocate in function 'func_illegal_agpr_use_asm' |
| 12 | +; ERR: error: <unknown>:0:0: no registers from class available to allocate in function 'kernel_calls_mfma.f32.32x32x1f32' |
| 13 | + |
| 14 | +; CHECK: {{^}}kernel_illegal_agpr_use_asm: |
| 15 | +; CHECK: ; use a0 |
| 16 | + |
| 17 | +; CHECK: NumVgprs: 0 |
| 18 | +; CHECK: NumAgprs: 1 |
| 19 | +define amdgpu_kernel void @kernel_illegal_agpr_use_asm() #0 { |
| 20 | + call void asm sideeffect "; use $0", "a"(i32 poison) |
| 21 | + ret void |
| 22 | +} |
| 23 | + |
| 24 | +; CHECK: {{^}}func_illegal_agpr_use_asm: |
| 25 | +; CHECK: ; use a0 |
| 26 | + |
| 27 | +; CHECK: NumVgprs: 0 |
| 28 | +; CHECK: NumAgprs: 1 |
| 29 | +define void @func_illegal_agpr_use_asm() #0 { |
| 30 | + call void asm sideeffect "; use $0", "a"(i32 poison) |
| 31 | + ret void |
| 32 | +} |
| 33 | + |
| 34 | +; CHECK-LABEL: {{^}}kernel_calls_mfma.f32.32x32x1f32: |
| 35 | +; CHECK: v_accvgpr_write_b32 |
| 36 | +; CHECK: v_accvgpr_read_b32 |
| 37 | + |
| 38 | +; GFX908: NumVgprs: 5 |
| 39 | +; GFX90A: NumVgprs: 36 |
| 40 | +; CHECK: NumAgprs: 32 |
| 41 | + |
| 42 | +; GFX908: TotalNumVgprs: 32 |
| 43 | +; GFX90A: TotalNumVgprs: 68 |
| 44 | +define amdgpu_kernel void @kernel_calls_mfma.f32.32x32x1f32(ptr addrspace(1) %out, float %a, float %b, <32 x float> %c) #0 { |
| 45 | + %result = call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float %a, float %b, <32 x float> %c, i32 0, i32 0, i32 0) |
| 46 | + store <32 x float> %result, ptr addrspace(1) %out |
| 47 | + ret void |
| 48 | +} |
| 49 | + |
| 50 | +attributes #0 = { "amdgpu-num-agpr"="0" } |
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