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799 | 799 | // CHECK_KNL_M32: #define __AVX__ 1
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800 | 800 | // CHECK_KNL_M32: #define __BMI2__ 1
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801 | 801 | // CHECK_KNL_M32: #define __BMI__ 1
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| 802 | +// CHECK_KNL_M32-NOT: #define __EVEX256__ 1 |
802 | 803 | // CHECK_KNL_M32: #define __EVEX512__ 1
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803 | 804 | // CHECK_KNL_M32: #define __F16C__ 1
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804 | 805 | // CHECK_KNL_M32: #define __FMA__ 1
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|
837 | 838 | // CHECK_KNL_M64: #define __AVX__ 1
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838 | 839 | // CHECK_KNL_M64: #define __BMI2__ 1
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839 | 840 | // CHECK_KNL_M64: #define __BMI__ 1
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| 841 | +// CHECK_KNL_M64-NOT: #define __EVEX256__ 1 |
840 | 842 | // CHECK_KNL_M64: #define __EVEX512__ 1
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841 | 843 | // CHECK_KNL_M64: #define __F16C__ 1
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842 | 844 | // CHECK_KNL_M64: #define __FMA__ 1
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|
879 | 881 | // CHECK_KNM_M32: #define __AVX__ 1
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880 | 882 | // CHECK_KNM_M32: #define __BMI2__ 1
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881 | 883 | // CHECK_KNM_M32: #define __BMI__ 1
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| 884 | +// CHECK_KNM_M32-NOT: #define __EVEX256__ 1 |
882 | 885 | // CHECK_KNM_M32: #define __EVEX512__ 1
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883 | 886 | // CHECK_KNM_M32: #define __F16C__ 1
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884 | 887 | // CHECK_KNM_M32: #define __FMA__ 1
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|
915 | 918 | // CHECK_KNM_M64: #define __AVX__ 1
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916 | 919 | // CHECK_KNM_M64: #define __BMI2__ 1
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917 | 920 | // CHECK_KNM_M64: #define __BMI__ 1
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| 921 | +// CHECK_KNM_M64-NOT: #define __EVEX256__ 1 |
918 | 922 | // CHECK_KNM_M64: #define __EVEX512__ 1
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919 | 923 | // CHECK_KNM_M64: #define __F16C__ 1
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920 | 924 | // CHECK_KNM_M64: #define __FMA__ 1
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|
956 | 960 | // CHECK_SKX_M32: #define __BMI__ 1
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957 | 961 | // CHECK_SKX_M32: #define __CLFLUSHOPT__ 1
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958 | 962 | // CHECK_SKX_M32: #define __CLWB__ 1
|
| 963 | +// CHECK_SKX_M32: #define __EVEX256__ 1 |
959 | 964 | // CHECK_SKX_M32: #define __EVEX512__ 1
|
960 | 965 | // CHECK_SKX_M32: #define __F16C__ 1
|
961 | 966 | // CHECK_SKX_M32: #define __FMA__ 1
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|
1002 | 1007 | // CHECK_SKX_M64: #define __BMI__ 1
|
1003 | 1008 | // CHECK_SKX_M64: #define __CLFLUSHOPT__ 1
|
1004 | 1009 | // CHECK_SKX_M64: #define __CLWB__ 1
|
| 1010 | +// CHECK_SKX_M64: #define __EVEX256__ 1 |
1005 | 1011 | // CHECK_SKX_M64: #define __EVEX512__ 1
|
1006 | 1012 | // CHECK_SKX_M64: #define __F16C__ 1
|
1007 | 1013 | // CHECK_SKX_M64: #define __FMA__ 1
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|
1052 | 1058 | // CHECK_CLX_M32: #define __BMI__ 1
|
1053 | 1059 | // CHECK_CLX_M32: #define __CLFLUSHOPT__ 1
|
1054 | 1060 | // CHECK_CLX_M32: #define __CLWB__ 1
|
| 1061 | +// CHECK_CLX_M32: #define __EVEX256__ 1 |
1055 | 1062 | // CHECK_CLX_M32: #define __EVEX512__ 1
|
1056 | 1063 | // CHECK_CLX_M32: #define __F16C__ 1
|
1057 | 1064 | // CHECK_CLX_M32: #define __FMA__ 1
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|
1099 | 1106 | // CHECK_CLX_M64: #define __BMI__ 1
|
1100 | 1107 | // CHECK_CLX_M64: #define __CLFLUSHOPT__ 1
|
1101 | 1108 | // CHECK_CLX_M64: #define __CLWB__ 1
|
| 1109 | +// CHECK_CLX_M64: #define __EVEX256__ 1 |
1102 | 1110 | // CHECK_CLX_M64: #define __EVEX512__ 1
|
1103 | 1111 | // CHECK_CLX_M64: #define __F16C__ 1
|
1104 | 1112 | // CHECK_CLX_M64: #define __FMA__ 1
|
|
1150 | 1158 | // CHECK_CPX_M32: #define __BMI__ 1
|
1151 | 1159 | // CHECK_CPX_M32: #define __CLFLUSHOPT__ 1
|
1152 | 1160 | // CHECK_CPX_M32: #define __CLWB__ 1
|
| 1161 | +// CHECK_CPX_M32: #define __EVEX256__ 1 |
1153 | 1162 | // CHECK_CPX_M32: #define __EVEX512__ 1
|
1154 | 1163 | // CHECK_CPX_M32: #define __F16C__ 1
|
1155 | 1164 | // CHECK_CPX_M32: #define __FMA__ 1
|
|
1198 | 1207 | // CHECK_CPX_M64: #define __BMI__ 1
|
1199 | 1208 | // CHECK_CPX_M64: #define __CLFLUSHOPT__ 1
|
1200 | 1209 | // CHECK_CPX_M64: #define __CLWB__ 1
|
| 1210 | +// CHECK_CPX_M64: #define __EVEX256__ 1 |
1201 | 1211 | // CHECK_CPX_M64: #define __EVEX512__ 1
|
1202 | 1212 | // CHECK_CPX_M64: #define __F16C__ 1
|
1203 | 1213 | // CHECK_CPX_M64: #define __FMA__ 1
|
|
1249 | 1259 | // CHECK_CNL_M32: #define __BMI__ 1
|
1250 | 1260 | // CHECK_CNL_M32: #define __CLFLUSHOPT__ 1
|
1251 | 1261 | // CHECK_CNL_M32-NOT: #define __CLWB__ 1
|
| 1262 | +// CHECK_CNL_M32: #define __EVEX256__ 1 |
1252 | 1263 | // CHECK_CNL_M32: #define __EVEX512__ 1
|
1253 | 1264 | // CHECK_CNL_M32: #define __F16C__ 1
|
1254 | 1265 | // CHECK_CNL_M32: #define __FMA__ 1
|
|
1298 | 1309 | // CHECK_CNL_M64: #define __BMI__ 1
|
1299 | 1310 | // CHECK_CNL_M64: #define __CLFLUSHOPT__ 1
|
1300 | 1311 | // CHECK_CNL_M64-NOT: #define __CLWB__ 1
|
| 1312 | +// CHECK_CNL_M64: #define __EVEX256__ 1 |
1301 | 1313 | // CHECK_CNL_M64: #define __EVEX512__ 1
|
1302 | 1314 | // CHECK_CNL_M64: #define __F16C__ 1
|
1303 | 1315 | // CHECK_CNL_M64: #define __FMA__ 1
|
|
1355 | 1367 | // CHECK_ICL_M32: #define __BMI__ 1
|
1356 | 1368 | // CHECK_ICL_M32: #define __CLFLUSHOPT__ 1
|
1357 | 1369 | // CHECK_ICL_M32-NOT: #define __CLWB__ 1
|
| 1370 | +// CHECK_ICL_M32: #define __EVEX256__ 1 |
1358 | 1371 | // CHECK_ICL_M32: #define __EVEX512__ 1
|
1359 | 1372 | // CHECK_ICL_M32: #define __F16C__ 1
|
1360 | 1373 | // CHECK_ICL_M32: #define __FMA__ 1
|
|
1417 | 1430 | // CHECK_ICL_M64: #define __BMI__ 1
|
1418 | 1431 | // CHECK_ICL_M64: #define __CLFLUSHOPT__ 1
|
1419 | 1432 | // CHECK_ICL_M64-NOT: #define __CLWB__ 1
|
| 1433 | +// CHECK_ICL_M64: #define __EVEX256__ 1 |
1420 | 1434 | // CHECK_ICL_M64: #define __EVEX512__ 1
|
1421 | 1435 | // CHECK_ICL_M64: #define __F16C__ 1
|
1422 | 1436 | // CHECK_ICL_M64: #define __FMA__ 1
|
|
1477 | 1491 | // CHECK_ICX_M32: #define __BMI__ 1
|
1478 | 1492 | // CHECK_ICX_M32: #define __CLFLUSHOPT__ 1
|
1479 | 1493 | // CHECK_ICX_M32: #define __CLWB__ 1
|
| 1494 | +// CHECK_ICX_M32: #define __EVEX256__ 1 |
1480 | 1495 | // CHECK_ICX_M32: #define __EVEX512__ 1
|
1481 | 1496 | // CHECK_ICX_M32: #define __F16C__ 1
|
1482 | 1497 | // CHECK_ICX_M32: #define __FMA__ 1
|
|
1536 | 1551 | // CHECK_ICX_M64: #define __BMI__ 1
|
1537 | 1552 | // CHECK_ICX_M64: #define __CLFLUSHOPT__ 1
|
1538 | 1553 | // CHECK_ICX_M64: #define __CLWB__ 1
|
| 1554 | +// CHECK_ICX_M64: #define __EVEX256__ 1 |
1539 | 1555 | // CHECK_ICX_M64: #define __EVEX512__ 1
|
1540 | 1556 | // CHECK_ICX_M64: #define __F16C__ 1
|
1541 | 1557 | // CHECK_ICX_M64: #define __FMA__ 1
|
|
1597 | 1613 | // CHECK_TGL_M32: #define __BMI__ 1
|
1598 | 1614 | // CHECK_TGL_M32: #define __CLFLUSHOPT__ 1
|
1599 | 1615 | // CHECK_TGL_M32: #define __CLWB__ 1
|
| 1616 | +// CHECK_TGL_M32: #define __EVEX256__ 1 |
1600 | 1617 | // CHECK_TGL_M32: #define __EVEX512__ 1
|
1601 | 1618 | // CHECK_TGL_M32: #define __F16C__ 1
|
1602 | 1619 | // CHECK_TGL_M32: #define __FMA__ 1
|
|
1660 | 1677 | // CHECK_TGL_M64: #define __BMI__ 1
|
1661 | 1678 | // CHECK_TGL_M64: #define __CLFLUSHOPT__ 1
|
1662 | 1679 | // CHECK_TGL_M64: #define __CLWB__ 1
|
| 1680 | +// CHECK_TGL_M64: #define __EVEX256__ 1 |
1663 | 1681 | // CHECK_TGL_M64: #define __EVEX512__ 1
|
1664 | 1682 | // CHECK_TGL_M64: #define __F16C__ 1
|
1665 | 1683 | // CHECK_TGL_M64: #define __FMA__ 1
|
|
1734 | 1752 | // CHECK_SPR_M32: #define __CLFLUSHOPT__ 1
|
1735 | 1753 | // CHECK_SPR_M32: #define __CLWB__ 1
|
1736 | 1754 | // CHECK_SPR_M32: #define __ENQCMD__ 1
|
| 1755 | +// CHECK_SPR_M32: #define __EVEX256__ 1 |
1737 | 1756 | // CHECK_SPR_M32: #define __EVEX512__ 1
|
1738 | 1757 | // CHECK_SPR_M32: #define __F16C__ 1
|
1739 | 1758 | // CHECK_SPR_M32: #define __FMA__ 1
|
|
1810 | 1829 | // CHECK_SPR_M64: #define __CLFLUSHOPT__ 1
|
1811 | 1830 | // CHECK_SPR_M64: #define __CLWB__ 1
|
1812 | 1831 | // CHECK_SPR_M64: #define __ENQCMD__ 1
|
| 1832 | +// CHECK_SPR_M64: #define __EVEX256__ 1 |
1813 | 1833 | // CHECK_SPR_M64: #define __EVEX512__ 1
|
1814 | 1834 | // CHECK_SPR_M64: #define __F16C__ 1
|
1815 | 1835 | // CHECK_SPR_M64: #define __FMA__ 1
|
|
1890 | 1910 | // CHECK_GNR_M32: #define __CLFLUSHOPT__ 1
|
1891 | 1911 | // CHECK_GNR_M32: #define __CLWB__ 1
|
1892 | 1912 | // CHECK_GNR_M32: #define __ENQCMD__ 1
|
| 1913 | +// CHECK_GNR_M32: #define __EVEX256__ 1 |
1893 | 1914 | // CHECK_GNR_M32: #define __EVEX512__ 1
|
1894 | 1915 | // CHECK_GNR_M32: #define __F16C__ 1
|
1895 | 1916 | // CHECK_GNR_M32: #define __FMA__ 1
|
|
1970 | 1991 | // CHECK_GNR_M64: #define __CLFLUSHOPT__ 1
|
1971 | 1992 | // CHECK_GNR_M64: #define __CLWB__ 1
|
1972 | 1993 | // CHECK_GNR_M64: #define __ENQCMD__ 1
|
| 1994 | +// CHECK_GNR_M64: #define __EVEX256__ 1 |
1973 | 1995 | // CHECK_GNR_M64: #define __EVEX512__ 1
|
1974 | 1996 | // CHECK_GNR_M64: #define __F16C__ 1
|
1975 | 1997 | // CHECK_GNR_M64: #define __FMA__ 1
|
|
3893 | 3915 | // CHECK_ZNVER4_M32: #define __CLFLUSHOPT__ 1
|
3894 | 3916 | // CHECK_ZNVER4_M32: #define __CLWB__ 1
|
3895 | 3917 | // CHECK_ZNVER4_M32: #define __CLZERO__ 1
|
| 3918 | +// CHECK_ZNVER4_M32: #define __EVEX256__ 1 |
3896 | 3919 | // CHECK_ZNVER4_M32: #define __EVEX512__ 1
|
3897 | 3920 | // CHECK_ZNVER4_M32: #define __F16C__ 1
|
3898 | 3921 | // CHECK_ZNVER4_M32-NOT: #define __FMA4__ 1
|
|
3958 | 3981 | // CHECK_ZNVER4_M64: #define __CLFLUSHOPT__ 1
|
3959 | 3982 | // CHECK_ZNVER4_M64: #define __CLWB__ 1
|
3960 | 3983 | // CHECK_ZNVER4_M64: #define __CLZERO__ 1
|
| 3984 | +// CHECK_ZNVER4_M64: #define __EVEX256__ 1 |
3961 | 3985 | // CHECK_ZNVER4_M64: #define __EVEX512__ 1
|
3962 | 3986 | // CHECK_ZNVER4_M64: #define __F16C__ 1
|
3963 | 3987 | // CHECK_ZNVER4_M64-NOT: #define __FMA4__ 1
|
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