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MachineRegisterInfo: Introduce isPhysRegUsed()
This method checks whether a physical regiser or any of its aliases are used in the function. Using this function in SIRegisterInfo::findUnusedReg() should also fix this reported failure: http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20150803/292143.html http://reviews.llvm.org/rL242173#inline-533 The report doesn't come with a testcase and I don't know enough about AMDGPU to create one myself. llvm-svn: 245329
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4 files changed

+29
-14
lines changed

4 files changed

+29
-14
lines changed

llvm/include/llvm/CodeGen/MachineRegisterInfo.h

+8-1
Original file line numberDiff line numberDiff line change
@@ -644,9 +644,16 @@ class MachineRegisterInfo {
644644
/// Return true if the specified register is modified in this function.
645645
/// This checks that no defining machine operands exist for the register or
646646
/// any of its aliases. Definitions found on functions marked noreturn are
647-
/// ignored.
647+
/// ignored. The register is also considered modified when it is set in the
648+
/// UsedPhysRegMask.
648649
bool isPhysRegModified(unsigned PhysReg) const;
649650

651+
/// Return true if the specified register is modified or read in this
652+
/// function. This checks that no machine operands exist for the register or
653+
/// any of its aliases. The register is also considered used when it is set
654+
/// in the UsedPhysRegMask.
655+
bool isPhysRegUsed(unsigned PhysReg) const;
656+
650657
/// addPhysRegsUsedFromRegMask - Mark any registers not in RegMask as used.
651658
/// This corresponds to the bit mask attached to register mask operands.
652659
void addPhysRegsUsedFromRegMask(const uint32_t *RegMask) {

llvm/lib/CodeGen/ExecutionDepsFix.cpp

+6-7
Original file line numberDiff line numberDiff line change
@@ -733,13 +733,12 @@ bool ExeDepsFix::runOnMachineFunction(MachineFunction &mf) {
733733
// completely.
734734
bool anyregs = false;
735735
const MachineRegisterInfo &MRI = mf.getRegInfo();
736-
for (TargetRegisterClass::const_iterator I = RC->begin(), E = RC->end();
737-
I != E && !anyregs; ++I)
738-
for (MCRegAliasIterator AI(*I, TRI, true); AI.isValid(); ++AI)
739-
if (!MRI.reg_nodbg_empty(*AI)) {
740-
anyregs = true;
741-
break;
742-
}
736+
for (unsigned Reg : *RC) {
737+
if (MRI.isPhysRegUsed(Reg)) {
738+
anyregs = true;
739+
break;
740+
}
741+
}
743742
if (!anyregs) return false;
744743

745744
// Initialize the AliasMap on the first use.

llvm/lib/CodeGen/MachineRegisterInfo.cpp

+12
Original file line numberDiff line numberDiff line change
@@ -489,3 +489,15 @@ bool MachineRegisterInfo::isPhysRegModified(unsigned PhysReg) const {
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}
490490
return false;
491491
}
492+
493+
bool MachineRegisterInfo::isPhysRegUsed(unsigned PhysReg) const {
494+
if (UsedPhysRegMask.test(PhysReg))
495+
return true;
496+
const TargetRegisterInfo *TRI = getTargetRegisterInfo();
497+
for (MCRegAliasIterator AliasReg(PhysReg, TRI, true); AliasReg.isValid();
498+
++AliasReg) {
499+
if (!reg_nodbg_empty(*AliasReg))
500+
return true;
501+
}
502+
return false;
503+
}

llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp

+3-6
Original file line numberDiff line numberDiff line change
@@ -495,12 +495,9 @@ unsigned SIRegisterInfo::getPreloadedValue(const MachineFunction &MF,
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// AMDGPU::NoRegister.
496496
unsigned SIRegisterInfo::findUnusedRegister(const MachineRegisterInfo &MRI,
497497
const TargetRegisterClass *RC) const {
498-
499-
for (TargetRegisterClass::iterator I = RC->begin(), E = RC->end();
500-
I != E; ++I) {
501-
if (MRI.reg_nodbg_empty(*I))
502-
return *I;
503-
}
498+
for (unsigned Reg : *RC)
499+
if (!MRI.isPhysRegUsed(Reg))
500+
return Reg;
504501
return AMDGPU::NoRegister;
505502
}
506503

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