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[X86][NFC] Remove class ADCOXOp(RR|RM) and redundant let statements
1. Remove these two classes b/c opcode is changed from 0xF6 to 0x66 after promotion, then the classes become useless. 2. Remove `OpSize = OpSizeFixed` b/c the default value is OpSizeFixed. 3. Remove `let isCommutable = 1` b/c ADCX/ADOX is not VEX-encoding, we can not apply VEX3ToVEX2 optimization for it and the compiler never emits it. 4. Remove predicate `HasADX` due to no pattern This patch is to extract the NFC in #76319 into a separate commit.
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lines changed

2 files changed

+13
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lines changed

llvm/lib/Target/X86/X86InstrArithmetic.td

Lines changed: 13 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -1188,25 +1188,17 @@ let Uses = [RDX] in
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//
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// We don't have patterns for these as there is no advantage over ADC for
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// most code.
1191-
class ADCOXOpRR <string m, X86TypeInfo t>
1192-
: BinOpRRF_RF<0xF6, m, t, null_frag> {
1193-
let Form = MRMSrcReg;
1194-
let isCommutable = 1;
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}
1196-
1197-
class ADCOXOpRM <string m, X86TypeInfo t>
1198-
: BinOpRMF_RF<0xF6, m, t, null_frag> {
1199-
let Form = MRMSrcMem;
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}
1201-
1202-
let OpSize = OpSizeFixed, Constraints = "$src1 = $dst",
1203-
Predicates = [HasADX] in {
1204-
def ADCX32rr : ADCOXOpRR<"adcx", Xi32>, T8, PD;
1205-
def ADCX64rr : ADCOXOpRR<"adcx", Xi64>, T8, PD;
1206-
def ADOX32rr : ADCOXOpRR<"adox", Xi32>, T8, XS;
1207-
def ADOX64rr : ADCOXOpRR<"adox", Xi64>, T8, XS;
1208-
def ADCX32rm : ADCOXOpRM<"adcx", Xi32>, T8, PD;
1209-
def ADCX64rm : ADCOXOpRM<"adcx", Xi64>, T8, PD;
1210-
def ADOX32rm : ADCOXOpRM<"adox", Xi32>, T8, XS;
1211-
def ADOX64rm : ADCOXOpRM<"adox", Xi64>, T8, XS;
1191+
let Constraints = "$src1 = $dst" in {
1192+
let Form = MRMSrcReg in {
1193+
def ADCX32rr : BinOpRRF_RF<0xF6, "adcx", Xi32, null_frag>, T8, PD;
1194+
def ADCX64rr : BinOpRRF_RF<0xF6, "adcx", Xi64, null_frag>, T8, PD;
1195+
def ADOX32rr : BinOpRRF_RF<0xF6, "adox", Xi32, null_frag>, T8, XS;
1196+
def ADOX64rr : BinOpRRF_RF<0xF6, "adox", Xi64, null_frag>, T8, XS;
1197+
}
1198+
let Form = MRMSrcMem in {
1199+
def ADCX32rm : BinOpRMF_RF<0xF6, "adcx", Xi32, null_frag>, T8, PD;
1200+
def ADCX64rm : BinOpRMF_RF<0xF6, "adcx", Xi64, null_frag>, T8, PD;
1201+
def ADOX32rm : BinOpRMF_RF<0xF6, "adox", Xi32, null_frag>, T8, XS;
1202+
def ADOX64rm : BinOpRMF_RF<0xF6, "adox", Xi64, null_frag>, T8, XS;
1203+
}
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}

llvm/lib/Target/X86/X86InstrPredicates.td

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -100,7 +100,6 @@ def HasIFMA : Predicate<"Subtarget->hasIFMA()">;
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def HasAVXIFMA : Predicate<"Subtarget->hasAVXIFMA()">;
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def NoVLX_Or_NoIFMA : Predicate<"!Subtarget->hasVLX() || !Subtarget->hasIFMA()">;
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def HasRTM : Predicate<"Subtarget->hasRTM()">;
103-
def HasADX : Predicate<"Subtarget->hasADX()">;
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def HasSHA : Predicate<"Subtarget->hasSHA()">;
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def HasSHA512 : Predicate<"Subtarget->hasSHA512()">;
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def HasSGX : Predicate<"Subtarget->hasSGX()">;

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