Merge ac97562c99c3ae97f063048ccaf08ebdae60ac30 into 18.x

[brad0]

[OpenMP][AIX]Define struct kmp_base_tas_lock with the order
of two members swapped for big-endian (#79188)

The direct lock data structure has bit 0 (the least significant bit)
of the first 32-bit word set to 1 to indicate it is a direct lock. On
the other hand, the first word (in 32-bit mode) or first two words (in
64-bit mode) of an indirect lock are the address of the entry allocated
from the indirect lock table. The runtime checks bit 0 of the first
32-bit word to tell if this is a direct or an indirect lock. This works
fine for 32-bit and 64-bit little-endian because its memory layout of a
64-bit address is (low word, high word). However, this causes
problems for big-endian where the memory layout of a 64-bit address is
(high word, low word). If an address of the indirect lock table
entry is something like 0x110035300, i.e., (0x1, 0x10035300), it
is treated as a direct lock. This patch defines struct kmp_base_tas_lock with the ordering of the two 32-bit members flipped
for big-endian PPC64 so that when checking/setting tags in member
poll, the second word (the low word) is used. This patch also changes
places where poll is not already explicitly specified for
checking/setting tags.

[brad0]

/cherry-pick 7a9b0e4 ac97562

[llvmbot]

/pull-request #81743

[llvmbot]

@llvm/issue-subscribers-openmp

Author: Brad Smith (brad0)

[OpenMP][AIX]Define struct kmp_base_tas_lock with the order of two members swapped for big-endian (#79188)

The direct lock data structure has bit 0 (the least significant bit)
of the first 32-bit word set to 1 to indicate it is a direct lock. On
the other hand, the first word (in 32-bit mode) or first two words (in
64-bit mode) of an indirect lock are the address of the entry allocated
from the indirect lock table. The runtime checks bit 0 of the first
32-bit word to tell if this is a direct or an indirect lock. This works
fine for 32-bit and 64-bit little-endian because its memory layout of a
64-bit address is (low word, high word). However, this causes
problems for big-endian where the memory layout of a 64-bit address is
(high word, low word). If an address of the indirect lock table
entry is something like 0x110035300, i.e., (0x1, 0x10035300), it
is treated as a direct lock. This patch defines struct kmp_base_tas_lock with the ordering of the two 32-bit members flipped
for big-endian PPC64 so that when checking/setting tags in member
poll, the second word (the low word) is used. This patch also changes
places where poll is not already explicitly specified for
checking/setting tags.