@@ -1130,8 +1130,8 @@ impl<T> (T,) {}
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/// A 16-bit floating point type (specifically, the "binary16" type defined in IEEE 754-2008).
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///
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/// This type is very similar to [`prim@f32`] but has decreased precision because it uses half as many
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- /// bits. Please see [the documentation for [`prim@ f32`] or [Wikipedia on
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- /// half-precision values][wikipedia] for more information.
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+ /// bits. Please see [the documentation for ` f32`](prim@f32) or [Wikipedia on half-precision
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+ /// values][wikipedia] for more information.
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///
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/// Note that most common platforms will not support `f16` in hardware without enabling extra target
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/// features, with the notable exception of Apple Silicon (also known as M1, M2, etc.) processors.
@@ -1296,14 +1296,12 @@ mod prim_f32 {}
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#[ doc( alias = "double" ) ]
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/// A 64-bit floating point type (specifically, the "binary64" type defined in IEEE 754-2008).
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///
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- /// This type is very similar to [`f32`], but has increased
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- /// precision by using twice as many bits. Please see [the documentation for
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- /// `f32`][`f32`] or [Wikipedia on double precision
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+ /// This type is very similar to [`prim@f32`], but has increased precision by using twice as many
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+ /// bits. Please see [the documentation for `f32`](prim@f32) or [Wikipedia on double-precision
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/// values][wikipedia] for more information.
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///
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/// *[See also the `std::f64::consts` module](crate::f64::consts).*
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///
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- /// [`f32`]: prim@f32
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/// [wikipedia]: https://en.wikipedia.org/wiki/Double-precision_floating-point_format
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#[ stable( feature = "rust1" , since = "1.0.0" ) ]
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mod prim_f64 { }
@@ -1313,12 +1311,12 @@ mod prim_f64 {}
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/// A 128-bit floating point type (specifically, the "binary128" type defined in IEEE 754-2008).
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///
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/// This type is very similar to [`prim@f32`] and [`prim@f64`], but has increased precision by using twice
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- /// as many bits as `f64`. Please see [the documentation for [`prim@ f32`] or [Wikipedia on
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+ /// as many bits as `f64`. Please see [the documentation for ` f32`](prim@f32) or [Wikipedia on
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/// quad-precision values][wikipedia] for more information.
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///
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/// Note that no platforms have hardware support for `f128` without enabling target specific features,
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/// as for all instruction set architectures `f128` is considered an optional feature.
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- /// Only Power ISA ("PowerPC") and RISCV specify it, and only certain microarchitectures
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+ /// Only Power ISA ("PowerPC") and RISC-V specify it, and only certain microarchitectures
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/// actually implement it. For x86-64 and AArch64, ISA support is not even specified,
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/// so it will always be a software implementation significantly slower than `f64`.
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///
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