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DanielKristofKissDanielKristofKiss
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[Clang][ARM] Make CRC and DSP intrinsics always available. (llvm#107417)
Both feature has target feature so can be checked if the usage is valid.
1 parent e88b7ff commit cf2122c

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+91
-24
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2 files changed

+91
-24
lines changed

‎clang/lib/Headers/arm_acle.h

+18-21
Original file line numberDiff line numberDiff line change
@@ -264,28 +264,28 @@ __rbitl(unsigned long __t) {
264264
}
265265

266266
/* 8.3 16-bit multiplications */
267-
#if defined(__ARM_FEATURE_DSP) && __ARM_FEATURE_DSP
268-
static __inline__ int32_t __attribute__((__always_inline__,__nodebug__))
267+
#if defined(__ARM_32BIT_STATE) && __ARM_32BIT_STATE
268+
static __inline__ int32_t __attribute__((__always_inline__,__nodebug__, target("dsp")))
269269
__smulbb(int32_t __a, int32_t __b) {
270270
return __builtin_arm_smulbb(__a, __b);
271271
}
272-
static __inline__ int32_t __attribute__((__always_inline__,__nodebug__))
272+
static __inline__ int32_t __attribute__((__always_inline__,__nodebug__, target("dsp")))
273273
__smulbt(int32_t __a, int32_t __b) {
274274
return __builtin_arm_smulbt(__a, __b);
275275
}
276-
static __inline__ int32_t __attribute__((__always_inline__,__nodebug__))
276+
static __inline__ int32_t __attribute__((__always_inline__,__nodebug__, target("dsp")))
277277
__smultb(int32_t __a, int32_t __b) {
278278
return __builtin_arm_smultb(__a, __b);
279279
}
280-
static __inline__ int32_t __attribute__((__always_inline__,__nodebug__))
280+
static __inline__ int32_t __attribute__((__always_inline__,__nodebug__, target("dsp")))
281281
__smultt(int32_t __a, int32_t __b) {
282282
return __builtin_arm_smultt(__a, __b);
283283
}
284-
static __inline__ int32_t __attribute__((__always_inline__,__nodebug__))
284+
static __inline__ int32_t __attribute__((__always_inline__,__nodebug__, target("dsp")))
285285
__smulwb(int32_t __a, int32_t __b) {
286286
return __builtin_arm_smulwb(__a, __b);
287287
}
288-
static __inline__ int32_t __attribute__((__always_inline__,__nodebug__))
288+
static __inline__ int32_t __attribute__((__always_inline__,__nodebug__, target("dsp")))
289289
__smulwt(int32_t __a, int32_t __b) {
290290
return __builtin_arm_smulwt(__a, __b);
291291
}
@@ -304,46 +304,46 @@ __smulwt(int32_t __a, int32_t __b) {
304304
#endif
305305

306306
/* 8.4.2 Saturating addition and subtraction intrinsics */
307-
#if defined(__ARM_FEATURE_DSP) && __ARM_FEATURE_DSP
308-
static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
307+
#if defined(__ARM_32BIT_STATE) && __ARM_32BIT_STATE
308+
static __inline__ int32_t __attribute__((__always_inline__, __nodebug__, target("dsp")))
309309
__qadd(int32_t __t, int32_t __v) {
310310
return __builtin_arm_qadd(__t, __v);
311311
}
312312

313-
static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
313+
static __inline__ int32_t __attribute__((__always_inline__, __nodebug__, target("dsp")))
314314
__qsub(int32_t __t, int32_t __v) {
315315
return __builtin_arm_qsub(__t, __v);
316316
}
317317

318-
static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
318+
static __inline__ int32_t __attribute__((__always_inline__, __nodebug__, target("dsp")))
319319
__qdbl(int32_t __t) {
320320
return __builtin_arm_qadd(__t, __t);
321321
}
322322
#endif
323323

324324
/* 8.4.3 Accumulating multiplications */
325-
#if defined(__ARM_FEATURE_DSP) && __ARM_FEATURE_DSP
326-
static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
325+
#if defined(__ARM_32BIT_STATE) && __ARM_32BIT_STATE
326+
static __inline__ int32_t __attribute__((__always_inline__, __nodebug__, target("dsp")))
327327
__smlabb(int32_t __a, int32_t __b, int32_t __c) {
328328
return __builtin_arm_smlabb(__a, __b, __c);
329329
}
330-
static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
330+
static __inline__ int32_t __attribute__((__always_inline__, __nodebug__, target("dsp")))
331331
__smlabt(int32_t __a, int32_t __b, int32_t __c) {
332332
return __builtin_arm_smlabt(__a, __b, __c);
333333
}
334-
static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
334+
static __inline__ int32_t __attribute__((__always_inline__, __nodebug__, target("dsp")))
335335
__smlatb(int32_t __a, int32_t __b, int32_t __c) {
336336
return __builtin_arm_smlatb(__a, __b, __c);
337337
}
338-
static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
338+
static __inline__ int32_t __attribute__((__always_inline__, __nodebug__, target("dsp")))
339339
__smlatt(int32_t __a, int32_t __b, int32_t __c) {
340340
return __builtin_arm_smlatt(__a, __b, __c);
341341
}
342-
static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
342+
static __inline__ int32_t __attribute__((__always_inline__, __nodebug__, target("dsp")))
343343
__smlawb(int32_t __a, int32_t __b, int32_t __c) {
344344
return __builtin_arm_smlawb(__a, __b, __c);
345345
}
346-
static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
346+
static __inline__ int32_t __attribute__((__always_inline__, __nodebug__, target("dsp")))
347347
__smlawt(int32_t __a, int32_t __b, int32_t __c) {
348348
return __builtin_arm_smlawt(__a, __b, __c);
349349
}
@@ -621,8 +621,6 @@ __rintnf(float __a) {
621621
#endif
622622

623623
/* 8.8 CRC32 intrinsics */
624-
#if (defined(__ARM_FEATURE_CRC32) && __ARM_FEATURE_CRC32) || \
625-
(defined(__ARM_64BIT_STATE) && __ARM_64BIT_STATE)
626624
static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__, target("crc")))
627625
__crc32b(uint32_t __a, uint8_t __b) {
628626
return __builtin_arm_crc32b(__a, __b);
@@ -662,7 +660,6 @@ static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__, target
662660
__crc32cd(uint32_t __a, uint64_t __b) {
663661
return __builtin_arm_crc32cd(__a, __b);
664662
}
665-
#endif
666663

667664
/* 8.6 Floating-point data-processing intrinsics */
668665
/* Armv8.3-A Javascript conversion intrinsic */

‎clang/test/CodeGen/arm_acle.c

+73-3
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,5 @@
11
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2+
// RUN: %clang_cc1 -ffreestanding -triple armv8a-none-eabi -O0 -disable-O0-optnone -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s -check-prefixes=ARM,AArch32
23
// RUN: %clang_cc1 -ffreestanding -triple armv8a-none-eabi -target-feature +crc -target-feature +dsp -O0 -disable-O0-optnone -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s -check-prefixes=ARM,AArch32
34
// RUN: %clang_cc1 -ffreestanding -Wno-error=implicit-function-declaration -triple aarch64-none-elf -target-feature +neon -target-feature +crc -target-feature +crypto -O0 -disable-O0-optnone -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s -check-prefixes=ARM,AArch64
45
// RUN: %clang_cc1 -ffreestanding -triple aarch64-none-elf -target-feature +v8.3a -target-feature +crc -O0 -disable-O0-optnone -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s -check-prefixes=ARM,AArch64,AArch6483
@@ -638,12 +639,15 @@ uint32_t test_usat(int32_t t) {
638639
#endif
639640

640641
/* 9.4.2 Saturating addition and subtraction intrinsics */
641-
#ifdef __ARM_FEATURE_DSP
642+
#ifdef __ARM_32BIT_STATE
642643
// AArch32-LABEL: @test_qadd(
643644
// AArch32-NEXT: entry:
644645
// AArch32-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.qadd(i32 [[A:%.*]], i32 [[B:%.*]])
645646
// AArch32-NEXT: ret i32 [[TMP0]]
646647
//
648+
#ifndef __ARM_FEATURE_DSP
649+
__attribute__((target("dsp")))
650+
#endif
647651
int32_t test_qadd(int32_t a, int32_t b) {
648652
return __qadd(a, b);
649653
}
@@ -653,6 +657,9 @@ int32_t test_qadd(int32_t a, int32_t b) {
653657
// AArch32-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.qsub(i32 [[A:%.*]], i32 [[B:%.*]])
654658
// AArch32-NEXT: ret i32 [[TMP0]]
655659
//
660+
#ifndef __ARM_FEATURE_DSP
661+
__attribute__((target("dsp")))
662+
#endif
656663
int32_t test_qsub(int32_t a, int32_t b) {
657664
return __qsub(a, b);
658665
}
@@ -664,6 +671,9 @@ extern int32_t f();
664671
// AArch32-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.qadd(i32 [[CALL]], i32 [[CALL]])
665672
// AArch32-NEXT: ret i32 [[TMP0]]
666673
//
674+
#ifndef __ARM_FEATURE_DSP
675+
__attribute__((target("dsp")))
676+
#endif
667677
int32_t test_qdbl() {
668678
return __qdbl(f());
669679
}
@@ -672,12 +682,15 @@ int32_t test_qdbl() {
672682
/*
673683
* 9.3 16-bit multiplications
674684
*/
675-
#if __ARM_FEATURE_DSP
685+
#ifdef __ARM_32BIT_STATE
676686
// AArch32-LABEL: @test_smulbb(
677687
// AArch32-NEXT: entry:
678688
// AArch32-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.smulbb(i32 [[A:%.*]], i32 [[B:%.*]])
679689
// AArch32-NEXT: ret i32 [[TMP0]]
680690
//
691+
#ifndef __ARM_FEATURE_DSP
692+
__attribute__((target("dsp")))
693+
#endif
681694
int32_t test_smulbb(int32_t a, int32_t b) {
682695
return __smulbb(a, b);
683696
}
@@ -687,6 +700,9 @@ int32_t test_smulbb(int32_t a, int32_t b) {
687700
// AArch32-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.smulbt(i32 [[A:%.*]], i32 [[B:%.*]])
688701
// AArch32-NEXT: ret i32 [[TMP0]]
689702
//
703+
#ifndef __ARM_FEATURE_DSP
704+
__attribute__((target("dsp")))
705+
#endif
690706
int32_t test_smulbt(int32_t a, int32_t b) {
691707
return __smulbt(a, b);
692708
}
@@ -696,6 +712,9 @@ int32_t test_smulbt(int32_t a, int32_t b) {
696712
// AArch32-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.smultb(i32 [[A:%.*]], i32 [[B:%.*]])
697713
// AArch32-NEXT: ret i32 [[TMP0]]
698714
//
715+
#ifndef __ARM_FEATURE_DSP
716+
__attribute__((target("dsp")))
717+
#endif
699718
int32_t test_smultb(int32_t a, int32_t b) {
700719
return __smultb(a, b);
701720
}
@@ -705,6 +724,9 @@ int32_t test_smultb(int32_t a, int32_t b) {
705724
// AArch32-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.smultt(i32 [[A:%.*]], i32 [[B:%.*]])
706725
// AArch32-NEXT: ret i32 [[TMP0]]
707726
//
727+
#ifndef __ARM_FEATURE_DSP
728+
__attribute__((target("dsp")))
729+
#endif
708730
int32_t test_smultt(int32_t a, int32_t b) {
709731
return __smultt(a, b);
710732
}
@@ -714,6 +736,9 @@ int32_t test_smultt(int32_t a, int32_t b) {
714736
// AArch32-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.smulwb(i32 [[A:%.*]], i32 [[B:%.*]])
715737
// AArch32-NEXT: ret i32 [[TMP0]]
716738
//
739+
#ifndef __ARM_FEATURE_DSP
740+
__attribute__((target("dsp")))
741+
#endif
717742
int32_t test_smulwb(int32_t a, int32_t b) {
718743
return __smulwb(a, b);
719744
}
@@ -723,18 +748,24 @@ int32_t test_smulwb(int32_t a, int32_t b) {
723748
// AArch32-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.smulwt(i32 [[A:%.*]], i32 [[B:%.*]])
724749
// AArch32-NEXT: ret i32 [[TMP0]]
725750
//
751+
#ifndef __ARM_FEATURE_DSP
752+
__attribute__((target("dsp")))
753+
#endif
726754
int32_t test_smulwt(int32_t a, int32_t b) {
727755
return __smulwt(a, b);
728756
}
729757
#endif
730758

731759
/* 9.4.3 Accumultating multiplications */
732-
#if __ARM_FEATURE_DSP
760+
#ifdef __ARM_32BIT_STATE
733761
// AArch32-LABEL: @test_smlabb(
734762
// AArch32-NEXT: entry:
735763
// AArch32-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.smlabb(i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]])
736764
// AArch32-NEXT: ret i32 [[TMP0]]
737765
//
766+
#ifndef __ARM_FEATURE_DSP
767+
__attribute__((target("dsp")))
768+
#endif
738769
int32_t test_smlabb(int32_t a, int32_t b, int32_t c) {
739770
return __smlabb(a, b, c);
740771
}
@@ -744,6 +775,9 @@ int32_t test_smlabb(int32_t a, int32_t b, int32_t c) {
744775
// AArch32-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.smlabt(i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]])
745776
// AArch32-NEXT: ret i32 [[TMP0]]
746777
//
778+
#ifndef __ARM_FEATURE_DSP
779+
__attribute__((target("dsp")))
780+
#endif
747781
int32_t test_smlabt(int32_t a, int32_t b, int32_t c) {
748782
return __smlabt(a, b, c);
749783
}
@@ -753,6 +787,9 @@ int32_t test_smlabt(int32_t a, int32_t b, int32_t c) {
753787
// AArch32-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.smlatb(i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]])
754788
// AArch32-NEXT: ret i32 [[TMP0]]
755789
//
790+
#ifndef __ARM_FEATURE_DSP
791+
__attribute__((target("dsp")))
792+
#endif
756793
int32_t test_smlatb(int32_t a, int32_t b, int32_t c) {
757794
return __smlatb(a, b, c);
758795
}
@@ -762,6 +799,9 @@ int32_t test_smlatb(int32_t a, int32_t b, int32_t c) {
762799
// AArch32-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.smlatt(i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]])
763800
// AArch32-NEXT: ret i32 [[TMP0]]
764801
//
802+
#ifndef __ARM_FEATURE_DSP
803+
__attribute__((target("dsp")))
804+
#endif
765805
int32_t test_smlatt(int32_t a, int32_t b, int32_t c) {
766806
return __smlatt(a, b, c);
767807
}
@@ -771,6 +811,9 @@ int32_t test_smlatt(int32_t a, int32_t b, int32_t c) {
771811
// AArch32-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.smlawb(i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]])
772812
// AArch32-NEXT: ret i32 [[TMP0]]
773813
//
814+
#ifndef __ARM_FEATURE_DSP
815+
__attribute__((target("dsp")))
816+
#endif
774817
int32_t test_smlawb(int32_t a, int32_t b, int32_t c) {
775818
return __smlawb(a, b, c);
776819
}
@@ -780,6 +823,9 @@ int32_t test_smlawb(int32_t a, int32_t b, int32_t c) {
780823
// AArch32-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.smlawt(i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]])
781824
// AArch32-NEXT: ret i32 [[TMP0]]
782825
//
826+
#ifndef __ARM_FEATURE_DSP
827+
__attribute__((target("dsp")))
828+
#endif
783829
int32_t test_smlawt(int32_t a, int32_t b, int32_t c) {
784830
return __smlawt(a, b, c);
785831
}
@@ -1335,6 +1381,9 @@ int32_t test_smusdx(int16x2_t a, int16x2_t b) {
13351381
// AArch64-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.crc32b(i32 [[A:%.*]], i32 [[TMP0]])
13361382
// AArch64-NEXT: ret i32 [[TMP1]]
13371383
//
1384+
#ifndef __ARM_FEATURE_CRC32
1385+
__attribute__((target("crc")))
1386+
#endif
13381387
uint32_t test_crc32b(uint32_t a, uint8_t b) {
13391388
return __crc32b(a, b);
13401389
}
@@ -1351,6 +1400,9 @@ uint32_t test_crc32b(uint32_t a, uint8_t b) {
13511400
// AArch64-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.crc32h(i32 [[A:%.*]], i32 [[TMP0]])
13521401
// AArch64-NEXT: ret i32 [[TMP1]]
13531402
//
1403+
#ifndef __ARM_FEATURE_CRC32
1404+
__attribute__((target("crc")))
1405+
#endif
13541406
uint32_t test_crc32h(uint32_t a, uint16_t b) {
13551407
return __crc32h(a, b);
13561408
}
@@ -1365,6 +1417,9 @@ uint32_t test_crc32h(uint32_t a, uint16_t b) {
13651417
// AArch64-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.crc32w(i32 [[A:%.*]], i32 [[B:%.*]])
13661418
// AArch64-NEXT: ret i32 [[TMP0]]
13671419
//
1420+
#ifndef __ARM_FEATURE_CRC32
1421+
__attribute__((target("crc")))
1422+
#endif
13681423
uint32_t test_crc32w(uint32_t a, uint32_t b) {
13691424
return __crc32w(a, b);
13701425
}
@@ -1383,6 +1438,9 @@ uint32_t test_crc32w(uint32_t a, uint32_t b) {
13831438
// AArch64-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.crc32x(i32 [[A:%.*]], i64 [[B:%.*]])
13841439
// AArch64-NEXT: ret i32 [[TMP0]]
13851440
//
1441+
#ifndef __ARM_FEATURE_CRC32
1442+
__attribute__((target("crc")))
1443+
#endif
13861444
uint32_t test_crc32d(uint32_t a, uint64_t b) {
13871445
return __crc32d(a, b);
13881446
}
@@ -1399,6 +1457,9 @@ uint32_t test_crc32d(uint32_t a, uint64_t b) {
13991457
// AArch64-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.crc32cb(i32 [[A:%.*]], i32 [[TMP0]])
14001458
// AArch64-NEXT: ret i32 [[TMP1]]
14011459
//
1460+
#ifndef __ARM_FEATURE_CRC32
1461+
__attribute__((target("crc")))
1462+
#endif
14021463
uint32_t test_crc32cb(uint32_t a, uint8_t b) {
14031464
return __crc32cb(a, b);
14041465
}
@@ -1415,6 +1476,9 @@ uint32_t test_crc32cb(uint32_t a, uint8_t b) {
14151476
// AArch64-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.crc32ch(i32 [[A:%.*]], i32 [[TMP0]])
14161477
// AArch64-NEXT: ret i32 [[TMP1]]
14171478
//
1479+
#ifndef __ARM_FEATURE_CRC32
1480+
__attribute__((target("crc")))
1481+
#endif
14181482
uint32_t test_crc32ch(uint32_t a, uint16_t b) {
14191483
return __crc32ch(a, b);
14201484
}
@@ -1429,6 +1493,9 @@ uint32_t test_crc32ch(uint32_t a, uint16_t b) {
14291493
// AArch64-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.crc32cw(i32 [[A:%.*]], i32 [[B:%.*]])
14301494
// AArch64-NEXT: ret i32 [[TMP0]]
14311495
//
1496+
#ifndef __ARM_FEATURE_CRC32
1497+
__attribute__((target("crc")))
1498+
#endif
14321499
uint32_t test_crc32cw(uint32_t a, uint32_t b) {
14331500
return __crc32cw(a, b);
14341501
}
@@ -1447,6 +1514,9 @@ uint32_t test_crc32cw(uint32_t a, uint32_t b) {
14471514
// AArch64-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.crc32cx(i32 [[A:%.*]], i64 [[B:%.*]])
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// AArch64-NEXT: ret i32 [[TMP0]]
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//
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#ifndef __ARM_FEATURE_CRC32
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__attribute__((target("crc")))
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#endif
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uint32_t test_crc32cd(uint32_t a, uint64_t b) {
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return __crc32cd(a, b);
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}

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