drivers: pwm: add the CH32V20x/30x GPTM devices and pinctrl definitions

The CH32V20x/30x family has three General-purpose Timers (GPTM) named
TIM2 to TIM4. Add to Devicetree and define the alternate function
mappings.

Signed-off-by: Michael Hope <[email protected]>

Author: nzmichaelh

dts/riscv/wch/ch32v203/ch32v203.dtsi

@@ -130,6 +130,33 @@
 			reg = <0x40021000 16>;
 			#clock-cells = <1>;
 		};
+
+		tim2: counter@40000000 {
+			compatible = "wch,gptm";
+			reg = <0x40000000 16>;
+			pwm-controller;
+			#pwm-cells = <3>;
+			prescaler = <1>;
+			clocks = <&rcc CH32V20X_V30X_CLOCK_TIM2>;
+		};
+
+		tim3: counter@40000400 {
+			compatible = "wch,gptm";
+			reg = <0x40000400 16>;
+			pwm-controller;
+			#pwm-cells = <3>;
+			prescaler = <1>;
+			clocks = <&rcc CH32V20X_V30X_CLOCK_TIM3>;
+		};
+
+		tim4: counter@40000800 {
+			compatible = "wch,gptm";
+			reg = <0x40000800 16>;
+			pwm-controller;
+			#pwm-cells = <3>;
+			prescaler = <1>;
+			clocks = <&rcc CH32V20X_V30X_CLOCK_TIM4>;
+		};
 	};
 };
 

include/zephyr/dt-bindings/pinctrl/ch32v20x_30x-pinctrl.h

@@ -177,4 +177,50 @@
 #define I2C1_SDA_PB7_0 CH32V20X_V30X_PINMUX_DEFINE(PB, 7, I2C1, 0)
 #define I2C1_SDA_PB9_1 CH32V20X_V30X_PINMUX_DEFINE(PB, 9, I2C1, 1)
 
+#define TIM2_ETR_PA0_0  CH32V20X_V30X_PINMUX_DEFINE(PA, 0, TIM2, 0)
+#define TIM2_ETR_PA15_1 CH32V20X_V30X_PINMUX_DEFINE(PA, 15, TIM2, 1)
+#define TIM2_ETR_PA0_2  CH32V20X_V30X_PINMUX_DEFINE(PA, 0, TIM2, 2)
+#define TIM2_ETR_PA15_3 CH32V20X_V30X_PINMUX_DEFINE(PA, 15, TIM2, 3)
+#define TIM2_CH1_PA0_0  CH32V20X_V30X_PINMUX_DEFINE(PA, 0, TIM2, 0)
+#define TIM2_CH1_PA15_1 CH32V20X_V30X_PINMUX_DEFINE(PA, 15, TIM2, 1)
+#define TIM2_CH1_PA0_1  CH32V20X_V30X_PINMUX_DEFINE(PA, 0, TIM2, 1)
+#define TIM2_CH1_PA15_1 CH32V20X_V30X_PINMUX_DEFINE(PA, 15, TIM2, 1)
+#define TIM2_CH2_PA1_0  CH32V20X_V30X_PINMUX_DEFINE(PA, 1, TIM2, 0)
+#define TIM2_CH2_PB3_1  CH32V20X_V30X_PINMUX_DEFINE(PB, 3, TIM2, 1)
+#define TIM2_CH2_PA1_2  CH32V20X_V30X_PINMUX_DEFINE(PA, 1, TIM2, 2)
+#define TIM2_CH2_PB3_3  CH32V20X_V30X_PINMUX_DEFINE(PB, 3, TIM2, 3)
+#define TIM2_CH3_PA2_0  CH32V20X_V30X_PINMUX_DEFINE(PA, 2, TIM2, 0)
+#define TIM2_CH3_PA2_1  CH32V20X_V30X_PINMUX_DEFINE(PA, 2, TIM2, 1)
+#define TIM2_CH3_PB10_2 CH32V20X_V30X_PINMUX_DEFINE(PB, 10, TIM2, 2)
+#define TIM2_CH3_PB10_2 CH32V20X_V30X_PINMUX_DEFINE(PB, 10, TIM2, 2)
+#define TIM2_CH4_PA3_0  CH32V20X_V30X_PINMUX_DEFINE(PA, 3, TIM2, 0)
+#define TIM2_CH4_PA3_1  CH32V20X_V30X_PINMUX_DEFINE(PA, 3, TIM2, 1)
+#define TIM2_CH4_PB11_2 CH32V20X_V30X_PINMUX_DEFINE(PB, 11, TIM2, 2)
+#define TIM2_CH4_PB11_3 CH32V20X_V30X_PINMUX_DEFINE(PB, 11, TIM2, 3)
+
+#define TIM3_ETR_PD2_0 CH32V20X_V30X_PINMUX_DEFINE(PD, 2, TIM3, 0)
+#define TIM3_ETR_PD2_2 CH32V20X_V30X_PINMUX_DEFINE(PD, 2, TIM3, 2)
+#define TIM3_ETR_PD2_3 CH32V20X_V30X_PINMUX_DEFINE(PD, 2, TIM3, 3)
+#define TIM3_CH1_PA6_0 CH32V20X_V30X_PINMUX_DEFINE(PA, 6, TIM3, 0)
+#define TIM3_CH1_PB4_2 CH32V20X_V30X_PINMUX_DEFINE(PB, 4, TIM3, 2)
+#define TIM3_CH1_PC6_3 CH32V20X_V30X_PINMUX_DEFINE(PC, 6, TIM3, 3)
+#define TIM3_CH2_PA7_0 CH32V20X_V30X_PINMUX_DEFINE(PA, 7, TIM3, 0)
+#define TIM3_CH2_PB5_2 CH32V20X_V30X_PINMUX_DEFINE(PB, 5, TIM3, 2)
+#define TIM3_CH2_PC7_3 CH32V20X_V30X_PINMUX_DEFINE(PC, 7, TIM3, 3)
+#define TIM3_CH3_PB0_0 CH32V20X_V30X_PINMUX_DEFINE(PB, 0, TIM3, 0)
+#define TIM3_CH3_PB0_2 CH32V20X_V30X_PINMUX_DEFINE(PB, 0, TIM3, 2)
+#define TIM3_CH3_PC8_3 CH32V20X_V30X_PINMUX_DEFINE(PC, 8, TIM3, 3)
+#define TIM3_CH4_PB1_0 CH32V20X_V30X_PINMUX_DEFINE(PB, 1, TIM3, 0)
+#define TIM3_CH4_PB1_2 CH32V20X_V30X_PINMUX_DEFINE(PB, 1, TIM3, 2)
+#define TIM3_CH4_PC9_3 CH32V20X_V30X_PINMUX_DEFINE(PC, 9, TIM3, 3)
+
+#define TIM4_CH1_PB6_0  CH32V20X_V30X_PINMUX_DEFINE(PB, 6, TIM4, 0)
+#define TIM4_CH1_PD12_1 CH32V20X_V30X_PINMUX_DEFINE(PD, 12, TIM4, 1)
+#define TIM4_CH2_PB7_0  CH32V20X_V30X_PINMUX_DEFINE(PB, 7, TIM4, 0)
+#define TIM4_CH2_PD13_1 CH32V20X_V30X_PINMUX_DEFINE(PD, 13, TIM4, 1)
+#define TIM4_CH3_PB8_0  CH32V20X_V30X_PINMUX_DEFINE(PB, 8, TIM4, 0)
+#define TIM4_CH3_PD14_1 CH32V20X_V30X_PINMUX_DEFINE(PD, 14, TIM4, 1)
+#define TIM4_CH4_PB9_0  CH32V20X_V30X_PINMUX_DEFINE(PB, 9, TIM4, 0)
+#define TIM4_CH4_PD15_1 CH32V20X_V30X_PINMUX_DEFINE(PD, 15, TIM4, 1)
+
 #endif /* __CH32V20X_V30X_PINCTRL_H__ */