FPGA: added a warning in the dsp_control about unsupported Cyclone V target (#2131)

Author: yuguen

DirectProgramming/C++SYCL_FPGA/Tutorials/Features/dsp_control/README.md

@@ -31,6 +31,8 @@ This tutorial shows how to apply global and local controls to set the implementa
 
 > **Warning** Make sure you add the device files associated with the FPGA that you are targeting to your Intel® Quartus® Prime installation.
 
+> **Warning** Although this sample will compile when targeting a Cyclone® V FPGA, the DSP controls will be ignored as this feature is not supported on this FPGA family.
+
 This sample is part of the FPGA code samples.
 It is categorized as a Tier 3 sample that demonstrates a compiler feature.
 
@@ -256,4 +258,4 @@ Experiment with the code in this tutorial.
 Code samples are licensed under the MIT license. See
 [License.txt](https://github.com/oneapi-src/oneAPI-samples/blob/master/License.txt) for details.
 
-Third party program Licenses can be found here: [third-party-programs.txt](https://github.com/oneapi-src/oneAPI-samples/blob/master/third-party-programs.txt).
+Third party program Licenses can be found here: [third-party-programs.txt](https://github.com/oneapi-src/oneAPI-samples/blob/master/third-party-programs.txt).