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Add initial spec for tensor map APIs
1 parent 00ca0da commit 221e4db

20 files changed

+2518
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lines changed

‎include/ur_api.h

Lines changed: 242 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -226,6 +226,8 @@ typedef enum ur_function_t {
226226
UR_FUNCTION_BINDLESS_IMAGES_IMPORT_EXTERNAL_MEMORY_EXP = 226, ///< Enumerator for ::urBindlessImagesImportExternalMemoryExp
227227
UR_FUNCTION_BINDLESS_IMAGES_IMPORT_EXTERNAL_SEMAPHORE_EXP = 227, ///< Enumerator for ::urBindlessImagesImportExternalSemaphoreExp
228228
UR_FUNCTION_ENQUEUE_NATIVE_COMMAND_EXP = 228, ///< Enumerator for ::urEnqueueNativeCommandExp
229+
UR_FUNCTION_TENSOR_MAP_ENCODE_IM_2_COL_EXP = 231, ///< Enumerator for ::urTensorMapEncodeIm2ColExp
230+
UR_FUNCTION_TENSOR_MAP_ENCODE_TILED_EXP = 232, ///< Enumerator for ::urTensorMapEncodeTiledExp
229231
/// @cond
230232
UR_FUNCTION_FORCE_UINT32 = 0x7fffffff
231233
/// @endcond
@@ -9580,6 +9582,203 @@ urEnqueueNativeCommandExp(
95809582
///< been enqueued in nativeEnqueueFunc.
95819583
);
95829584

9585+
#if !defined(__GNUC__)
9586+
#pragma endregion
9587+
#endif
9588+
// Intel 'oneAPI' Unified Runtime Experimental API for enqueuing work through native APIs
9589+
#if !defined(__GNUC__)
9590+
#pragma region tensor map(experimental)
9591+
#endif
9592+
///////////////////////////////////////////////////////////////////////////////
9593+
/// @brief Handle of tensor map object
9594+
typedef struct ur_exp_tensor_map_handle_t_ *ur_exp_tensor_map_handle_t;
9595+
9596+
///////////////////////////////////////////////////////////////////////////////
9597+
/// @brief Tensor map data type
9598+
typedef uint32_t ur_exp_tensor_map_data_type_flags_t;
9599+
typedef enum ur_exp_tensor_map_data_type_flag_t {
9600+
UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_UINT8 = UR_BIT(0), ///< 1 byte
9601+
UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_UINT16 = UR_BIT(1), ///< 2 bytes
9602+
UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_UINT32 = UR_BIT(2), ///< 4 bytes
9603+
UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_INT32 = UR_BIT(3), ///< 4 bytes
9604+
UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_UINT64 = UR_BIT(4), ///< 8 bytes
9605+
UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_INT64 = UR_BIT(5), ///< 8 bytes
9606+
UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_FLOAT16 = UR_BIT(6), ///< 2 bytes
9607+
UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_FLOAT32 = UR_BIT(7), ///< 4 bytes
9608+
UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_FLOAT64 = UR_BIT(8), ///< 8 bytes
9609+
UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_BFLOAT16 = UR_BIT(9), ///< 2 bytes
9610+
UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_FLOAT32_FTZ = UR_BIT(10), ///< 4 bytes
9611+
UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_TFLOAT32 = UR_BIT(11), ///< 4 bytes
9612+
UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_TFLOAT32_FTZ = UR_BIT(12), ///< 4 bytes
9613+
/// @cond
9614+
UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_FORCE_UINT32 = 0x7fffffff
9615+
/// @endcond
9616+
9617+
} ur_exp_tensor_map_data_type_flag_t;
9618+
/// @brief Bit Mask for validating ur_exp_tensor_map_data_type_flags_t
9619+
#define UR_EXP_TENSOR_MAP_DATA_TYPE_FLAGS_MASK 0xffffe000
9620+
9621+
///////////////////////////////////////////////////////////////////////////////
9622+
/// @brief Tensor map interleave
9623+
typedef uint32_t ur_exp_tensor_map_interleave_flags_t;
9624+
typedef enum ur_exp_tensor_map_interleave_flag_t {
9625+
UR_EXP_TENSOR_MAP_INTERLEAVE_FLAG_NONE = UR_BIT(0), ///< No interleave
9626+
UR_EXP_TENSOR_MAP_INTERLEAVE_FLAG_16B = UR_BIT(1), ///< 16B interleave
9627+
UR_EXP_TENSOR_MAP_INTERLEAVE_FLAG_32B = UR_BIT(2), ///< 32B interleave
9628+
/// @cond
9629+
UR_EXP_TENSOR_MAP_INTERLEAVE_FLAG_FORCE_UINT32 = 0x7fffffff
9630+
/// @endcond
9631+
9632+
} ur_exp_tensor_map_interleave_flag_t;
9633+
/// @brief Bit Mask for validating ur_exp_tensor_map_interleave_flags_t
9634+
#define UR_EXP_TENSOR_MAP_INTERLEAVE_FLAGS_MASK 0xfffffff8
9635+
9636+
///////////////////////////////////////////////////////////////////////////////
9637+
/// @brief Tensor map l2 promotion
9638+
typedef uint32_t ur_exp_tensor_map_l2_promotion_flags_t;
9639+
typedef enum ur_exp_tensor_map_l2_promotion_flag_t {
9640+
UR_EXP_TENSOR_MAP_L2_PROMOTION_FLAG_NONE = UR_BIT(0), ///< No promotion type
9641+
UR_EXP_TENSOR_MAP_L2_PROMOTION_FLAG_64B = UR_BIT(1), ///< 64B promotion type
9642+
UR_EXP_TENSOR_MAP_L2_PROMOTION_FLAG_128B = UR_BIT(2), ///< 128B promotion type
9643+
UR_EXP_TENSOR_MAP_L2_PROMOTION_FLAG_256B = UR_BIT(3), ///< 256B promotion type
9644+
/// @cond
9645+
UR_EXP_TENSOR_MAP_L2_PROMOTION_FLAG_FORCE_UINT32 = 0x7fffffff
9646+
/// @endcond
9647+
9648+
} ur_exp_tensor_map_l2_promotion_flag_t;
9649+
/// @brief Bit Mask for validating ur_exp_tensor_map_l2_promotion_flags_t
9650+
#define UR_EXP_TENSOR_MAP_L2_PROMOTION_FLAGS_MASK 0xfffffff0
9651+
9652+
///////////////////////////////////////////////////////////////////////////////
9653+
/// @brief Tensor map swizzle
9654+
typedef uint32_t ur_exp_tensor_map_swizzle_flags_t;
9655+
typedef enum ur_exp_tensor_map_swizzle_flag_t {
9656+
UR_EXP_TENSOR_MAP_SWIZZLE_FLAG_NONE = UR_BIT(0), ///< No swizzle
9657+
UR_EXP_TENSOR_MAP_SWIZZLE_FLAG_32B = UR_BIT(1), ///< 32B swizzle
9658+
UR_EXP_TENSOR_MAP_SWIZZLE_FLAG_64B = UR_BIT(2), ///< 64B swizzle
9659+
UR_EXP_TENSOR_MAP_SWIZZLE_FLAG_128B = UR_BIT(3), ///< 128B swizzle
9660+
/// @cond
9661+
UR_EXP_TENSOR_MAP_SWIZZLE_FLAG_FORCE_UINT32 = 0x7fffffff
9662+
/// @endcond
9663+
9664+
} ur_exp_tensor_map_swizzle_flag_t;
9665+
/// @brief Bit Mask for validating ur_exp_tensor_map_swizzle_flags_t
9666+
#define UR_EXP_TENSOR_MAP_SWIZZLE_FLAGS_MASK 0xfffffff0
9667+
9668+
///////////////////////////////////////////////////////////////////////////////
9669+
/// @brief Tensor map OOB fill
9670+
typedef uint32_t ur_exp_tensor_map_oob_fill_flags_t;
9671+
typedef enum ur_exp_tensor_map_oob_fill_flag_t {
9672+
UR_EXP_TENSOR_MAP_OOB_FILL_FLAG_NONE = UR_BIT(0), ///< No OOB fill
9673+
UR_EXP_TENSOR_MAP_OOB_FILL_FLAG_REQUEST_ZERO_FMA = UR_BIT(1), ///< Refer to NVIDIA docs
9674+
/// @cond
9675+
UR_EXP_TENSOR_MAP_OOB_FILL_FLAG_FORCE_UINT32 = 0x7fffffff
9676+
/// @endcond
9677+
9678+
} ur_exp_tensor_map_oob_fill_flag_t;
9679+
/// @brief Bit Mask for validating ur_exp_tensor_map_oob_fill_flags_t
9680+
#define UR_EXP_TENSOR_MAP_OOB_FILL_FLAGS_MASK 0xfffffffc
9681+
9682+
///////////////////////////////////////////////////////////////////////////////
9683+
/// @brief Encode tensor map with image data
9684+
///
9685+
/// @details
9686+
/// - Map encode using im2col.
9687+
///
9688+
/// @returns
9689+
/// - ::UR_RESULT_SUCCESS
9690+
/// - ::UR_RESULT_ERROR_UNINITIALIZED
9691+
/// - ::UR_RESULT_ERROR_DEVICE_LOST
9692+
/// - ::UR_RESULT_ERROR_ADAPTER_SPECIFIC
9693+
/// - ::UR_RESULT_ERROR_INVALID_NULL_HANDLE
9694+
/// + `NULL == hDevice`
9695+
/// - ::UR_RESULT_ERROR_INVALID_ENUMERATION
9696+
/// + `::UR_EXP_TENSOR_MAP_DATA_TYPE_FLAGS_MASK & TensorMapType`
9697+
/// + `::UR_EXP_TENSOR_MAP_INTERLEAVE_FLAGS_MASK & Interleave`
9698+
/// + `::UR_EXP_TENSOR_MAP_SWIZZLE_FLAGS_MASK & Swizzle`
9699+
/// + `::UR_EXP_TENSOR_MAP_L2_PROMOTION_FLAGS_MASK & L2Promotion`
9700+
/// + `::UR_EXP_TENSOR_MAP_OOB_FILL_FLAGS_MASK & OobFill`
9701+
/// - ::UR_RESULT_ERROR_INVALID_NULL_POINTER
9702+
/// + `NULL == GlobalAddress`
9703+
/// + `NULL == GlobalDim`
9704+
/// + `NULL == GlobalStrides`
9705+
/// + `NULL == PixelBoxLowerCorner`
9706+
/// + `NULL == PixelBoxUpperCorner`
9707+
/// + `NULL == ElementStrides`
9708+
/// + `NULL == hTensorMap`
9709+
UR_APIEXPORT ur_result_t UR_APICALL
9710+
urTensorMapEncodeIm2ColExp(
9711+
ur_device_handle_t hDevice, ///< [in] Handle of the device object.
9712+
ur_exp_tensor_map_data_type_flags_t TensorMapType, ///< [in] Data type of the tensor object.
9713+
uint32_t TensorRank, ///< [in] Dimensionality of tensor; must be at least 3.
9714+
void *GlobalAddress, ///< [in] Starting address of memory region described by tensor.
9715+
const uint64_t *GlobalDim, ///< [in] Array containing tensor size (number of elements) along each of
9716+
///< the TensorRank dimensions.
9717+
const uint64_t *GlobalStrides, ///< [in] Array containing stride size (in bytes) along each of the
9718+
///< tensorRank - 1 dimensions.
9719+
const int *PixelBoxLowerCorner, ///< [in] Array containing DHW dimensions of lower box corner.
9720+
const int *PixelBoxUpperCorner, ///< [in] Array containing DHW dimensions of upper box corner.
9721+
uint32_t ChannelsPerPixel, ///< [in] Number of channels per pixel.
9722+
uint32_t PixelsPerColumn, ///< [in] Number of pixels per column.
9723+
const uint32_t *ElementStrides, ///< [in] Array containing traversal stride in each of the tensorRank
9724+
///< dimensions.
9725+
ur_exp_tensor_map_interleave_flags_t Interleave, ///< [in] Type of interleaved layout the tensor addresses
9726+
ur_exp_tensor_map_swizzle_flags_t Swizzle, ///< [in] Bank swizzling pattern inside shared memory
9727+
ur_exp_tensor_map_l2_promotion_flags_t L2Promotion, ///< [in] L2 promotion size.
9728+
ur_exp_tensor_map_oob_fill_flags_t OobFill, ///< [in] Indicate whether zero or special NaN constant will be used to
9729+
///< fill out-of-bound elements.
9730+
ur_exp_tensor_map_handle_t *hTensorMap ///< [out] Handle of the tensor map object.
9731+
);
9732+
9733+
///////////////////////////////////////////////////////////////////////////////
9734+
/// @brief Encode tensor map with tiled data
9735+
///
9736+
/// @details
9737+
/// - Tiled map encode.
9738+
///
9739+
/// @returns
9740+
/// - ::UR_RESULT_SUCCESS
9741+
/// - ::UR_RESULT_ERROR_UNINITIALIZED
9742+
/// - ::UR_RESULT_ERROR_DEVICE_LOST
9743+
/// - ::UR_RESULT_ERROR_ADAPTER_SPECIFIC
9744+
/// - ::UR_RESULT_ERROR_INVALID_NULL_HANDLE
9745+
/// + `NULL == hDevice`
9746+
/// - ::UR_RESULT_ERROR_INVALID_ENUMERATION
9747+
/// + `::UR_EXP_TENSOR_MAP_DATA_TYPE_FLAGS_MASK & TensorMapType`
9748+
/// + `::UR_EXP_TENSOR_MAP_INTERLEAVE_FLAGS_MASK & Interleave`
9749+
/// + `::UR_EXP_TENSOR_MAP_SWIZZLE_FLAGS_MASK & Swizzle`
9750+
/// + `::UR_EXP_TENSOR_MAP_L2_PROMOTION_FLAGS_MASK & L2Promotion`
9751+
/// + `::UR_EXP_TENSOR_MAP_OOB_FILL_FLAGS_MASK & OobFill`
9752+
/// - ::UR_RESULT_ERROR_INVALID_NULL_POINTER
9753+
/// + `NULL == GlobalAddress`
9754+
/// + `NULL == GlobalDim`
9755+
/// + `NULL == GlobalStrides`
9756+
/// + `NULL == BoxDim`
9757+
/// + `NULL == ElementStrides`
9758+
/// + `NULL == hTensorMap`
9759+
UR_APIEXPORT ur_result_t UR_APICALL
9760+
urTensorMapEncodeTiledExp(
9761+
ur_device_handle_t hDevice, ///< [in] Handle of the device object.
9762+
ur_exp_tensor_map_data_type_flags_t TensorMapType, ///< [in] Data type of the tensor object.
9763+
uint32_t TensorRank, ///< [in] Dimensionality of tensor; must be at least 3.
9764+
void *GlobalAddress, ///< [in] Starting address of memory region described by tensor.
9765+
const uint64_t *GlobalDim, ///< [in] Array containing tensor size (number of elements) along each of
9766+
///< the TensorRank dimensions.
9767+
const uint64_t *GlobalStrides, ///< [in] Array containing stride size (in bytes) along each of the
9768+
///< tensorRank - 1 dimensions.
9769+
const uint32_t *BoxDim, ///< [in] Array containing traversal box size (number of elments) along
9770+
///< each of the tensorRank dimensions. Specifies how many elements to be
9771+
///< traversed along each tensor dimension.
9772+
const uint32_t *ElementStrides, ///< [in] Array containing traversal stride in each of the tensorRank
9773+
///< dimensions.
9774+
ur_exp_tensor_map_interleave_flags_t Interleave, ///< [in] Type of interleaved layout the tensor addresses
9775+
ur_exp_tensor_map_swizzle_flags_t Swizzle, ///< [in] Bank swizzling pattern inside shared memory
9776+
ur_exp_tensor_map_l2_promotion_flags_t L2Promotion, ///< [in] L2 promotion size.
9777+
ur_exp_tensor_map_oob_fill_flags_t OobFill, ///< [in] Indicate whether zero or special NaN constant will be used to
9778+
///< fill out-of-bound elements.
9779+
ur_exp_tensor_map_handle_t *hTensorMap ///< [out] Handle of the tensor map object.
9780+
);
9781+
95839782
#if !defined(__GNUC__)
95849783
#pragma endregion
95859784
#endif
@@ -11648,6 +11847,49 @@ typedef struct ur_command_buffer_command_get_info_exp_params_t {
1164811847
size_t **ppPropSizeRet;
1164911848
} ur_command_buffer_command_get_info_exp_params_t;
1165011849

11850+
///////////////////////////////////////////////////////////////////////////////
11851+
/// @brief Function parameters for urTensorMapEncodeIm2ColExp
11852+
/// @details Each entry is a pointer to the parameter passed to the function;
11853+
/// allowing the callback the ability to modify the parameter's value
11854+
typedef struct ur_tensor_map_encode_im_2_col_exp_params_t {
11855+
ur_device_handle_t *phDevice;
11856+
ur_exp_tensor_map_data_type_flags_t *pTensorMapType;
11857+
uint32_t *pTensorRank;
11858+
void **pGlobalAddress;
11859+
const uint64_t **pGlobalDim;
11860+
const uint64_t **pGlobalStrides;
11861+
const int **pPixelBoxLowerCorner;
11862+
const int **pPixelBoxUpperCorner;
11863+
uint32_t *pChannelsPerPixel;
11864+
uint32_t *pPixelsPerColumn;
11865+
const uint32_t **pElementStrides;
11866+
ur_exp_tensor_map_interleave_flags_t *pInterleave;
11867+
ur_exp_tensor_map_swizzle_flags_t *pSwizzle;
11868+
ur_exp_tensor_map_l2_promotion_flags_t *pL2Promotion;
11869+
ur_exp_tensor_map_oob_fill_flags_t *pOobFill;
11870+
ur_exp_tensor_map_handle_t **phTensorMap;
11871+
} ur_tensor_map_encode_im_2_col_exp_params_t;
11872+
11873+
///////////////////////////////////////////////////////////////////////////////
11874+
/// @brief Function parameters for urTensorMapEncodeTiledExp
11875+
/// @details Each entry is a pointer to the parameter passed to the function;
11876+
/// allowing the callback the ability to modify the parameter's value
11877+
typedef struct ur_tensor_map_encode_tiled_exp_params_t {
11878+
ur_device_handle_t *phDevice;
11879+
ur_exp_tensor_map_data_type_flags_t *pTensorMapType;
11880+
uint32_t *pTensorRank;
11881+
void **pGlobalAddress;
11882+
const uint64_t **pGlobalDim;
11883+
const uint64_t **pGlobalStrides;
11884+
const uint32_t **pBoxDim;
11885+
const uint32_t **pElementStrides;
11886+
ur_exp_tensor_map_interleave_flags_t *pInterleave;
11887+
ur_exp_tensor_map_swizzle_flags_t *pSwizzle;
11888+
ur_exp_tensor_map_l2_promotion_flags_t *pL2Promotion;
11889+
ur_exp_tensor_map_oob_fill_flags_t *pOobFill;
11890+
ur_exp_tensor_map_handle_t **phTensorMap;
11891+
} ur_tensor_map_encode_tiled_exp_params_t;
11892+
1165111893
///////////////////////////////////////////////////////////////////////////////
1165211894
/// @brief Function parameters for urUsmP2PEnablePeerAccessExp
1165311895
/// @details Each entry is a pointer to the parameter passed to the function;

‎include/ur_ddi.h

Lines changed: 66 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2161,6 +2161,71 @@ typedef ur_result_t(UR_APICALL *ur_pfnGetCommandBufferExpProcAddrTable_t)(
21612161
ur_api_version_t,
21622162
ur_command_buffer_exp_dditable_t *);
21632163

2164+
///////////////////////////////////////////////////////////////////////////////
2165+
/// @brief Function-pointer for urTensorMapEncodeIm2ColExp
2166+
typedef ur_result_t(UR_APICALL *ur_pfnTensorMapEncodeIm2ColExp_t)(
2167+
ur_device_handle_t,
2168+
ur_exp_tensor_map_data_type_flags_t,
2169+
uint32_t,
2170+
void *,
2171+
const uint64_t *,
2172+
const uint64_t *,
2173+
const int *,
2174+
const int *,
2175+
uint32_t,
2176+
uint32_t,
2177+
const uint32_t *,
2178+
ur_exp_tensor_map_interleave_flags_t,
2179+
ur_exp_tensor_map_swizzle_flags_t,
2180+
ur_exp_tensor_map_l2_promotion_flags_t,
2181+
ur_exp_tensor_map_oob_fill_flags_t,
2182+
ur_exp_tensor_map_handle_t *);
2183+
2184+
///////////////////////////////////////////////////////////////////////////////
2185+
/// @brief Function-pointer for urTensorMapEncodeTiledExp
2186+
typedef ur_result_t(UR_APICALL *ur_pfnTensorMapEncodeTiledExp_t)(
2187+
ur_device_handle_t,
2188+
ur_exp_tensor_map_data_type_flags_t,
2189+
uint32_t,
2190+
void *,
2191+
const uint64_t *,
2192+
const uint64_t *,
2193+
const uint32_t *,
2194+
const uint32_t *,
2195+
ur_exp_tensor_map_interleave_flags_t,
2196+
ur_exp_tensor_map_swizzle_flags_t,
2197+
ur_exp_tensor_map_l2_promotion_flags_t,
2198+
ur_exp_tensor_map_oob_fill_flags_t,
2199+
ur_exp_tensor_map_handle_t *);
2200+
2201+
///////////////////////////////////////////////////////////////////////////////
2202+
/// @brief Table of TensorMapExp functions pointers
2203+
typedef struct ur_tensor_map_exp_dditable_t {
2204+
ur_pfnTensorMapEncodeIm2ColExp_t pfnEncodeIm2ColExp;
2205+
ur_pfnTensorMapEncodeTiledExp_t pfnEncodeTiledExp;
2206+
} ur_tensor_map_exp_dditable_t;
2207+
2208+
///////////////////////////////////////////////////////////////////////////////
2209+
/// @brief Exported function for filling application's TensorMapExp table
2210+
/// with current process' addresses
2211+
///
2212+
/// @returns
2213+
/// - ::UR_RESULT_SUCCESS
2214+
/// - ::UR_RESULT_ERROR_UNINITIALIZED
2215+
/// - ::UR_RESULT_ERROR_INVALID_NULL_POINTER
2216+
/// - ::UR_RESULT_ERROR_UNSUPPORTED_VERSION
2217+
UR_DLLEXPORT ur_result_t UR_APICALL
2218+
urGetTensorMapExpProcAddrTable(
2219+
ur_api_version_t version, ///< [in] API version requested
2220+
ur_tensor_map_exp_dditable_t *pDdiTable ///< [in,out] pointer to table of DDI function pointers
2221+
);
2222+
2223+
///////////////////////////////////////////////////////////////////////////////
2224+
/// @brief Function-pointer for urGetTensorMapExpProcAddrTable
2225+
typedef ur_result_t(UR_APICALL *ur_pfnGetTensorMapExpProcAddrTable_t)(
2226+
ur_api_version_t,
2227+
ur_tensor_map_exp_dditable_t *);
2228+
21642229
///////////////////////////////////////////////////////////////////////////////
21652230
/// @brief Function-pointer for urUsmP2PEnablePeerAccessExp
21662231
typedef ur_result_t(UR_APICALL *ur_pfnUsmP2PEnablePeerAccessExp_t)(
@@ -2428,6 +2493,7 @@ typedef struct ur_dditable_t {
24282493
ur_usm_dditable_t USM;
24292494
ur_usm_exp_dditable_t USMExp;
24302495
ur_command_buffer_exp_dditable_t CommandBufferExp;
2496+
ur_tensor_map_exp_dditable_t TensorMapExp;
24312497
ur_usm_p2p_exp_dditable_t UsmP2PExp;
24322498
ur_virtual_mem_dditable_t VirtualMem;
24332499
ur_device_dditable_t Device;

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