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RealFYangRealFYang
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8342014: RISC-V: ZStoreBarrierStubC2 clobbers rflags
Reviewed-by: rehn, aboldtch, mli
1 parent bd62644 commit a601cd2

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3 files changed

+64
-64
lines changed

3 files changed

+64
-64
lines changed

‎src/hotspot/cpu/riscv/gc/g1/g1_riscv.ad

+34-34
Original file line numberDiff line numberDiff line change
@@ -74,11 +74,11 @@ static void write_barrier_post(MacroAssembler* masm,
7474

7575
%}
7676

77-
instruct g1StoreP(indirect mem, iRegP src, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3)
77+
instruct g1StoreP(indirect mem, iRegP src, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, rFlagsReg cr)
7878
%{
7979
predicate(UseG1GC && n->as_Store()->barrier_data() != 0);
8080
match(Set mem (StoreP mem src));
81-
effect(TEMP tmp1, TEMP tmp2, TEMP tmp3);
81+
effect(TEMP tmp1, TEMP tmp2, TEMP tmp3, KILL cr);
8282
ins_cost(STORE_COST);
8383
format %{ "sd $src, $mem\t# ptr" %}
8484
ins_encode %{
@@ -99,11 +99,11 @@ instruct g1StoreP(indirect mem, iRegP src, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegP
9999
ins_pipe(istore_reg_mem);
100100
%}
101101

102-
instruct g1StoreN(indirect mem, iRegN src, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3)
102+
instruct g1StoreN(indirect mem, iRegN src, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, rFlagsReg cr)
103103
%{
104104
predicate(UseG1GC && n->as_Store()->barrier_data() != 0);
105105
match(Set mem (StoreN mem src));
106-
effect(TEMP tmp1, TEMP tmp2, TEMP tmp3);
106+
effect(TEMP tmp1, TEMP tmp2, TEMP tmp3, KILL cr);
107107
ins_cost(STORE_COST);
108108
format %{ "sw $src, $mem\t# compressed ptr" %}
109109
ins_encode %{
@@ -131,11 +131,11 @@ instruct g1StoreN(indirect mem, iRegN src, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegP
131131
ins_pipe(istore_reg_mem);
132132
%}
133133

134-
instruct g1EncodePAndStoreN(indirect mem, iRegP src, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3)
134+
instruct g1EncodePAndStoreN(indirect mem, iRegP src, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, rFlagsReg cr)
135135
%{
136136
predicate(UseG1GC && n->as_Store()->barrier_data() != 0);
137137
match(Set mem (StoreN mem (EncodeP src)));
138-
effect(TEMP tmp1, TEMP tmp2, TEMP tmp3);
138+
effect(TEMP tmp1, TEMP tmp2, TEMP tmp3, KILL cr);
139139
ins_cost(STORE_COST);
140140
format %{ "encode_heap_oop $tmp1, $src\n\t"
141141
"sw $tmp1, $mem\t# compressed ptr" %}
@@ -162,11 +162,11 @@ instruct g1EncodePAndStoreN(indirect mem, iRegP src, iRegPNoSp tmp1, iRegPNoSp t
162162
ins_pipe(istore_reg_mem);
163163
%}
164164

165-
instruct g1CompareAndExchangeP(iRegPNoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp1, iRegPNoSp tmp2)
165+
instruct g1CompareAndExchangeP(iRegPNoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp1, iRegPNoSp tmp2, rFlagsReg cr)
166166
%{
167167
predicate(UseG1GC && n->as_LoadStore()->barrier_data() != 0);
168168
match(Set res (CompareAndExchangeP mem (Binary oldval newval)));
169-
effect(TEMP res, TEMP tmp1, TEMP tmp2);
169+
effect(TEMP res, TEMP tmp1, TEMP tmp2, KILL cr);
170170
ins_cost(2 * VOLATILE_REF_COST);
171171
format %{ "cmpxchg $res = $mem, $oldval, $newval\t# ptr" %}
172172
ins_encode %{
@@ -194,11 +194,11 @@ instruct g1CompareAndExchangeP(iRegPNoSp res, indirect mem, iRegP oldval, iRegP
194194
ins_pipe(pipe_slow);
195195
%}
196196

197-
instruct g1CompareAndExchangePAcq(iRegPNoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp1, iRegPNoSp tmp2)
197+
instruct g1CompareAndExchangePAcq(iRegPNoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp1, iRegPNoSp tmp2, rFlagsReg cr)
198198
%{
199199
predicate(UseG1GC && needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() != 0);
200200
match(Set res (CompareAndExchangeP mem (Binary oldval newval)));
201-
effect(TEMP res, TEMP tmp1, TEMP tmp2);
201+
effect(TEMP res, TEMP tmp1, TEMP tmp2, KILL cr);
202202
ins_cost(VOLATILE_REF_COST);
203203
format %{ "cmpxchg_acq $res = $mem, $oldval, $newval\t# ptr" %}
204204
ins_encode %{
@@ -226,11 +226,11 @@ instruct g1CompareAndExchangePAcq(iRegPNoSp res, indirect mem, iRegP oldval, iRe
226226
ins_pipe(pipe_slow);
227227
%}
228228

229-
instruct g1CompareAndExchangeN(iRegNNoSp res, indirect mem, iRegN oldval, iRegN newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3)
229+
instruct g1CompareAndExchangeN(iRegNNoSp res, indirect mem, iRegN oldval, iRegN newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, rFlagsReg cr)
230230
%{
231231
predicate(UseG1GC && n->as_LoadStore()->barrier_data() != 0);
232232
match(Set res (CompareAndExchangeN mem (Binary oldval newval)));
233-
effect(TEMP res, TEMP tmp1, TEMP tmp2, TEMP tmp3);
233+
effect(TEMP res, TEMP tmp1, TEMP tmp2, TEMP tmp3, KILL cr);
234234
ins_cost(2 * VOLATILE_REF_COST);
235235
format %{ "cmpxchg $res = $mem, $oldval, $newval\t# narrow oop" %}
236236
ins_encode %{
@@ -256,11 +256,11 @@ instruct g1CompareAndExchangeN(iRegNNoSp res, indirect mem, iRegN oldval, iRegN
256256
ins_pipe(pipe_slow);
257257
%}
258258

259-
instruct g1CompareAndExchangeNAcq(iRegNNoSp res, indirect mem, iRegN oldval, iRegN newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3)
259+
instruct g1CompareAndExchangeNAcq(iRegNNoSp res, indirect mem, iRegN oldval, iRegN newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, rFlagsReg cr)
260260
%{
261261
predicate(UseG1GC && needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() != 0);
262262
match(Set res (CompareAndExchangeN mem (Binary oldval newval)));
263-
effect(TEMP res, TEMP tmp1, TEMP tmp2, TEMP tmp3);
263+
effect(TEMP res, TEMP tmp1, TEMP tmp2, TEMP tmp3, KILL cr);
264264
ins_cost(VOLATILE_REF_COST);
265265
format %{ "cmpxchg_acq $res = $mem, $oldval, $newval\t# narrow oop" %}
266266
ins_encode %{
@@ -286,12 +286,12 @@ instruct g1CompareAndExchangeNAcq(iRegNNoSp res, indirect mem, iRegN oldval, iRe
286286
ins_pipe(pipe_slow);
287287
%}
288288

289-
instruct g1CompareAndSwapP(iRegINoSp res, indirect mem, iRegP newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegP oldval)
289+
instruct g1CompareAndSwapP(iRegINoSp res, indirect mem, iRegP newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegP oldval, rFlagsReg cr)
290290
%{
291291
predicate(UseG1GC && n->as_LoadStore()->barrier_data() != 0);
292292
match(Set res (CompareAndSwapP mem (Binary oldval newval)));
293293
match(Set res (WeakCompareAndSwapP mem (Binary oldval newval)));
294-
effect(TEMP res, TEMP tmp1, TEMP tmp2);
294+
effect(TEMP res, TEMP tmp1, TEMP tmp2, KILL cr);
295295
ins_cost(2 * VOLATILE_REF_COST);
296296
format %{ "cmpxchg $mem, $oldval, $newval\t# (ptr)\n\t"
297297
"mv $res, $res == $oldval" %}
@@ -318,12 +318,12 @@ instruct g1CompareAndSwapP(iRegINoSp res, indirect mem, iRegP newval, iRegPNoSp
318318
ins_pipe(pipe_slow);
319319
%}
320320

321-
instruct g1CompareAndSwapPAcq(iRegINoSp res, indirect mem, iRegP newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegP oldval)
321+
instruct g1CompareAndSwapPAcq(iRegINoSp res, indirect mem, iRegP newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegP oldval, rFlagsReg cr)
322322
%{
323323
predicate(UseG1GC && needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() != 0);
324324
match(Set res (CompareAndSwapP mem (Binary oldval newval)));
325325
match(Set res (WeakCompareAndSwapP mem (Binary oldval newval)));
326-
effect(TEMP res, TEMP tmp1, TEMP tmp2);
326+
effect(TEMP res, TEMP tmp1, TEMP tmp2, KILL cr);
327327
ins_cost(VOLATILE_REF_COST);
328328
format %{ "cmpxchg_acq $mem, $oldval, $newval\t# (ptr)\n\t"
329329
"mv $res, $res == $oldval" %}
@@ -350,12 +350,12 @@ instruct g1CompareAndSwapPAcq(iRegINoSp res, indirect mem, iRegP newval, iRegPNo
350350
ins_pipe(pipe_slow);
351351
%}
352352

353-
instruct g1CompareAndSwapN(iRegINoSp res, indirect mem, iRegN newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, iRegN oldval)
353+
instruct g1CompareAndSwapN(iRegINoSp res, indirect mem, iRegN newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, iRegN oldval, rFlagsReg cr)
354354
%{
355355
predicate(UseG1GC && n->as_LoadStore()->barrier_data() != 0);
356356
match(Set res (CompareAndSwapN mem (Binary oldval newval)));
357357
match(Set res (WeakCompareAndSwapN mem (Binary oldval newval)));
358-
effect(TEMP res, TEMP tmp1, TEMP tmp2, TEMP tmp3);
358+
effect(TEMP res, TEMP tmp1, TEMP tmp2, TEMP tmp3, KILL cr);
359359
ins_cost(2 * VOLATILE_REF_COST);
360360
format %{ "cmpxchg $mem, $oldval, $newval\t# (narrow oop)\n\t"
361361
"mv $res, $res == $oldval" %}
@@ -383,12 +383,12 @@ instruct g1CompareAndSwapN(iRegINoSp res, indirect mem, iRegN newval, iRegPNoSp
383383
ins_pipe(pipe_slow);
384384
%}
385385

386-
instruct g1CompareAndSwapNAcq(iRegINoSp res, indirect mem, iRegN newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, iRegN oldval)
386+
instruct g1CompareAndSwapNAcq(iRegINoSp res, indirect mem, iRegN newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, iRegN oldval, rFlagsReg cr)
387387
%{
388388
predicate(UseG1GC && needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() != 0);
389389
match(Set res (CompareAndSwapN mem (Binary oldval newval)));
390390
match(Set res (WeakCompareAndSwapN mem (Binary oldval newval)));
391-
effect(TEMP res, TEMP tmp1, TEMP tmp2, TEMP tmp3);
391+
effect(TEMP res, TEMP tmp1, TEMP tmp2, TEMP tmp3, KILL cr);
392392
ins_cost(VOLATILE_REF_COST);
393393
format %{ "cmpxchg_acq $mem, $oldval, $newval\t# (narrow oop)\n\t"
394394
"mv $res, $res == $oldval" %}
@@ -416,11 +416,11 @@ instruct g1CompareAndSwapNAcq(iRegINoSp res, indirect mem, iRegN newval, iRegPNo
416416
ins_pipe(pipe_slow);
417417
%}
418418

419-
instruct g1GetAndSetP(indirect mem, iRegP newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp preval)
419+
instruct g1GetAndSetP(indirect mem, iRegP newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp preval, rFlagsReg cr)
420420
%{
421421
predicate(UseG1GC && n->as_LoadStore()->barrier_data() != 0);
422422
match(Set preval (GetAndSetP mem newval));
423-
effect(TEMP preval, TEMP tmp1, TEMP tmp2);
423+
effect(TEMP preval, TEMP tmp1, TEMP tmp2, KILL cr);
424424
ins_cost(2 * VOLATILE_REF_COST);
425425
format %{ "atomic_xchg $preval, $newval, [$mem]" %}
426426
ins_encode %{
@@ -442,11 +442,11 @@ instruct g1GetAndSetP(indirect mem, iRegP newval, iRegPNoSp tmp1, iRegPNoSp tmp2
442442
ins_pipe(pipe_serial);
443443
%}
444444

445-
instruct g1GetAndSetPAcq(indirect mem, iRegP newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp preval)
445+
instruct g1GetAndSetPAcq(indirect mem, iRegP newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp preval, rFlagsReg cr)
446446
%{
447447
predicate(UseG1GC && needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() != 0);
448448
match(Set preval (GetAndSetP mem newval));
449-
effect(TEMP preval, TEMP tmp1, TEMP tmp2);
449+
effect(TEMP preval, TEMP tmp1, TEMP tmp2, KILL cr);
450450
ins_cost(VOLATILE_REF_COST);
451451
format %{ "atomic_xchg_acq $preval, $newval, [$mem]" %}
452452
ins_encode %{
@@ -468,11 +468,11 @@ instruct g1GetAndSetPAcq(indirect mem, iRegP newval, iRegPNoSp tmp1, iRegPNoSp t
468468
ins_pipe(pipe_serial);
469469
%}
470470

471-
instruct g1GetAndSetN(indirect mem, iRegN newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, iRegNNoSp preval)
471+
instruct g1GetAndSetN(indirect mem, iRegN newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, iRegNNoSp preval, rFlagsReg cr)
472472
%{
473473
predicate(UseG1GC && n->as_LoadStore()->barrier_data() != 0);
474474
match(Set preval (GetAndSetN mem newval));
475-
effect(TEMP preval, TEMP tmp1, TEMP tmp2, TEMP tmp3);
475+
effect(TEMP preval, TEMP tmp1, TEMP tmp2, TEMP tmp3, KILL cr);
476476
ins_cost(2 * VOLATILE_REF_COST);
477477
format %{ "atomic_xchgwu $preval, $newval, [$mem]" %}
478478
ins_encode %{
@@ -495,11 +495,11 @@ instruct g1GetAndSetN(indirect mem, iRegN newval, iRegPNoSp tmp1, iRegPNoSp tmp2
495495
ins_pipe(pipe_serial);
496496
%}
497497

498-
instruct g1GetAndSetNAcq(indirect mem, iRegN newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, iRegNNoSp preval)
498+
instruct g1GetAndSetNAcq(indirect mem, iRegN newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, iRegNNoSp preval, rFlagsReg cr)
499499
%{
500500
predicate(UseG1GC && needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() != 0);
501501
match(Set preval (GetAndSetN mem newval));
502-
effect(TEMP preval, TEMP tmp1, TEMP tmp2, TEMP tmp3);
502+
effect(TEMP preval, TEMP tmp1, TEMP tmp2, TEMP tmp3, KILL cr);
503503
ins_cost(VOLATILE_REF_COST);
504504
format %{ "atomic_xchgwu_acq $preval, $newval, [$mem]" %}
505505
ins_encode %{
@@ -522,11 +522,11 @@ instruct g1GetAndSetNAcq(indirect mem, iRegN newval, iRegPNoSp tmp1, iRegPNoSp t
522522
ins_pipe(pipe_serial);
523523
%}
524524

525-
instruct g1LoadP(iRegPNoSp dst, indirect mem, iRegPNoSp tmp1, iRegPNoSp tmp2)
525+
instruct g1LoadP(iRegPNoSp dst, indirect mem, iRegPNoSp tmp1, iRegPNoSp tmp2, rFlagsReg cr)
526526
%{
527527
predicate(UseG1GC && n->as_Load()->barrier_data() != 0);
528528
match(Set dst (LoadP mem));
529-
effect(TEMP dst, TEMP tmp1, TEMP tmp2);
529+
effect(TEMP dst, TEMP tmp1, TEMP tmp2, KILL cr);
530530
ins_cost(LOAD_COST + BRANCH_COST);
531531
format %{ "ld $dst, $mem\t# ptr" %}
532532
ins_encode %{
@@ -541,11 +541,11 @@ instruct g1LoadP(iRegPNoSp dst, indirect mem, iRegPNoSp tmp1, iRegPNoSp tmp2)
541541
ins_pipe(iload_reg_mem);
542542
%}
543543

544-
instruct g1LoadN(iRegNNoSp dst, indirect mem, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3)
544+
instruct g1LoadN(iRegNNoSp dst, indirect mem, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, rFlagsReg cr)
545545
%{
546546
predicate(UseG1GC && n->as_Load()->barrier_data() != 0);
547547
match(Set dst (LoadN mem));
548-
effect(TEMP dst, TEMP tmp1, TEMP tmp2, TEMP tmp3);
548+
effect(TEMP dst, TEMP tmp1, TEMP tmp2, TEMP tmp3, KILL cr);
549549
ins_cost(LOAD_COST + BRANCH_COST);
550550
format %{ "lwu $dst, $mem\t# compressed ptr" %}
551551
ins_encode %{

‎src/hotspot/cpu/riscv/gc/x/x_riscv.ad

+14-14
Original file line numberDiff line numberDiff line change
@@ -52,11 +52,11 @@ static void x_load_barrier_slow_path(MacroAssembler* masm, const MachNode* node,
5252
%}
5353

5454
// Load Pointer
55-
instruct xLoadP(iRegPNoSp dst, memory mem, iRegPNoSp tmp)
55+
instruct xLoadP(iRegPNoSp dst, memory mem, iRegPNoSp tmp, rFlagsReg cr)
5656
%{
5757
match(Set dst (LoadP mem));
5858
predicate(UseZGC && !ZGenerational && (n->as_Load()->barrier_data() != 0));
59-
effect(TEMP dst, TEMP tmp);
59+
effect(TEMP dst, TEMP tmp, KILL cr);
6060

6161
ins_cost(4 * DEFAULT_COST);
6262

@@ -71,11 +71,11 @@ instruct xLoadP(iRegPNoSp dst, memory mem, iRegPNoSp tmp)
7171
ins_pipe(iload_reg_mem);
7272
%}
7373

74-
instruct xCompareAndSwapP(iRegINoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp) %{
74+
instruct xCompareAndSwapP(iRegINoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp, rFlagsReg cr) %{
7575
match(Set res (CompareAndSwapP mem (Binary oldval newval)));
7676
match(Set res (WeakCompareAndSwapP mem (Binary oldval newval)));
7777
predicate(UseZGC && !ZGenerational && !needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() == XLoadBarrierStrong);
78-
effect(TEMP_DEF res, TEMP tmp);
78+
effect(TEMP_DEF res, TEMP tmp, KILL cr);
7979

8080
ins_cost(2 * VOLATILE_REF_COST);
8181

@@ -105,11 +105,11 @@ instruct xCompareAndSwapP(iRegINoSp res, indirect mem, iRegP oldval, iRegP newva
105105
ins_pipe(pipe_slow);
106106
%}
107107

108-
instruct xCompareAndSwapPAcq(iRegINoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp) %{
108+
instruct xCompareAndSwapPAcq(iRegINoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp, rFlagsReg cr) %{
109109
match(Set res (CompareAndSwapP mem (Binary oldval newval)));
110110
match(Set res (WeakCompareAndSwapP mem (Binary oldval newval)));
111111
predicate(UseZGC && !ZGenerational && needs_acquiring_load_reserved(n) && (n->as_LoadStore()->barrier_data() == XLoadBarrierStrong));
112-
effect(TEMP_DEF res, TEMP tmp);
112+
effect(TEMP_DEF res, TEMP tmp, KILL cr);
113113

114114
ins_cost(2 * VOLATILE_REF_COST);
115115

@@ -139,10 +139,10 @@ instruct xCompareAndSwapPAcq(iRegINoSp res, indirect mem, iRegP oldval, iRegP ne
139139
ins_pipe(pipe_slow);
140140
%}
141141

142-
instruct xCompareAndExchangeP(iRegPNoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp) %{
142+
instruct xCompareAndExchangeP(iRegPNoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp, rFlagsReg cr) %{
143143
match(Set res (CompareAndExchangeP mem (Binary oldval newval)));
144144
predicate(UseZGC && !ZGenerational && !needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() == XLoadBarrierStrong);
145-
effect(TEMP_DEF res, TEMP tmp);
145+
effect(TEMP_DEF res, TEMP tmp, KILL cr);
146146

147147
ins_cost(2 * VOLATILE_REF_COST);
148148

@@ -167,10 +167,10 @@ instruct xCompareAndExchangeP(iRegPNoSp res, indirect mem, iRegP oldval, iRegP n
167167
ins_pipe(pipe_slow);
168168
%}
169169

170-
instruct xCompareAndExchangePAcq(iRegPNoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp) %{
170+
instruct xCompareAndExchangePAcq(iRegPNoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp, rFlagsReg cr) %{
171171
match(Set res (CompareAndExchangeP mem (Binary oldval newval)));
172172
predicate(UseZGC && !ZGenerational && needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() == XLoadBarrierStrong);
173-
effect(TEMP_DEF res, TEMP tmp);
173+
effect(TEMP_DEF res, TEMP tmp, KILL cr);
174174

175175
ins_cost(2 * VOLATILE_REF_COST);
176176

@@ -195,10 +195,10 @@ instruct xCompareAndExchangePAcq(iRegPNoSp res, indirect mem, iRegP oldval, iReg
195195
ins_pipe(pipe_slow);
196196
%}
197197

198-
instruct xGetAndSetP(indirect mem, iRegP newv, iRegPNoSp prev, iRegPNoSp tmp) %{
198+
instruct xGetAndSetP(indirect mem, iRegP newv, iRegPNoSp prev, iRegPNoSp tmp, rFlagsReg cr) %{
199199
match(Set prev (GetAndSetP mem newv));
200200
predicate(UseZGC && !ZGenerational && !needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() != 0);
201-
effect(TEMP_DEF prev, TEMP tmp);
201+
effect(TEMP_DEF prev, TEMP tmp, KILL cr);
202202

203203
ins_cost(2 * VOLATILE_REF_COST);
204204

@@ -212,10 +212,10 @@ instruct xGetAndSetP(indirect mem, iRegP newv, iRegPNoSp prev, iRegPNoSp tmp) %{
212212
ins_pipe(pipe_serial);
213213
%}
214214

215-
instruct xGetAndSetPAcq(indirect mem, iRegP newv, iRegPNoSp prev, iRegPNoSp tmp) %{
215+
instruct xGetAndSetPAcq(indirect mem, iRegP newv, iRegPNoSp prev, iRegPNoSp tmp, rFlagsReg cr) %{
216216
match(Set prev (GetAndSetP mem newv));
217217
predicate(UseZGC && !ZGenerational && needs_acquiring_load_reserved(n) && (n->as_LoadStore()->barrier_data() != 0));
218-
effect(TEMP_DEF prev, TEMP tmp);
218+
effect(TEMP_DEF prev, TEMP tmp, KILL cr);
219219

220220
ins_cost(VOLATILE_REF_COST);
221221

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