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svenvhpreethi-intel
svenvh
authored and
preethi-intel
committed
Check for full SPIR-V IR function names (intel#1665)
Add the `n` argument in `vloadn.spvasm`, `vload_halfn.spvasm`, and `vloada_halfn.spvasm`. Add a trailing `(` to the CL20 LLVM IR patterns. Add extra integer arguments in `OpImageWrite.cl` which hold the Image Operands `SignExtend`/`ZeroExtend`. Add the accumulator arguments in `SPV_KHR_integer_dot_product-sat.ll`. Original commit: KhronosGroup/SPIRV-LLVM-Translator@9f00637
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5 files changed

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-405
lines changed

5 files changed

+405
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‎llvm-spirv/test/OpenCL.std/vload_halfn.spvasm

+40-40
Original file line numberDiff line numberDiff line change
@@ -6,47 +6,47 @@
66
;
77
; CHECK-LABEL: spir_kernel void @test
88
;
9-
; CHECK-SPV-IR: call spir_func <2 x float> @_Z31__spirv_ocl_vload_halfn_Rfloat2iPU3AS1Dh
10-
; CHECK-SPV-IR: call spir_func <3 x float> @_Z31__spirv_ocl_vload_halfn_Rfloat3iPU3AS1Dh
11-
; CHECK-SPV-IR: call spir_func <4 x float> @_Z31__spirv_ocl_vload_halfn_Rfloat4iPU3AS1Dh
12-
; CHECK-SPV-IR: call spir_func <8 x float> @_Z31__spirv_ocl_vload_halfn_Rfloat8iPU3AS1Dh
13-
; CHECK-SPV-IR: call spir_func <16 x float> @_Z32__spirv_ocl_vload_halfn_Rfloat16iPU3AS1Dh
14-
; CHECK-SPV-IR: call spir_func <2 x float> @_Z31__spirv_ocl_vload_halfn_Rfloat2iPU3AS3Dh
15-
; CHECK-SPV-IR: call spir_func <3 x float> @_Z31__spirv_ocl_vload_halfn_Rfloat3iPU3AS3Dh
16-
; CHECK-SPV-IR: call spir_func <4 x float> @_Z31__spirv_ocl_vload_halfn_Rfloat4iPU3AS3Dh
17-
; CHECK-SPV-IR: call spir_func <8 x float> @_Z31__spirv_ocl_vload_halfn_Rfloat8iPU3AS3Dh
18-
; CHECK-SPV-IR: call spir_func <16 x float> @_Z32__spirv_ocl_vload_halfn_Rfloat16iPU3AS3Dh
19-
; CHECK-SPV-IR: call spir_func <2 x float> @_Z31__spirv_ocl_vload_halfn_Rfloat2iPU3AS2Dh
20-
; CHECK-SPV-IR: call spir_func <3 x float> @_Z31__spirv_ocl_vload_halfn_Rfloat3iPU3AS2Dh
21-
; CHECK-SPV-IR: call spir_func <4 x float> @_Z31__spirv_ocl_vload_halfn_Rfloat4iPU3AS2Dh
22-
; CHECK-SPV-IR: call spir_func <8 x float> @_Z31__spirv_ocl_vload_halfn_Rfloat8iPU3AS2Dh
23-
; CHECK-SPV-IR: call spir_func <16 x float> @_Z32__spirv_ocl_vload_halfn_Rfloat16iPU3AS2Dh
24-
; CHECK-SPV-IR: call spir_func <2 x float> @_Z31__spirv_ocl_vload_halfn_Rfloat2iPDh
25-
; CHECK-SPV-IR: call spir_func <3 x float> @_Z31__spirv_ocl_vload_halfn_Rfloat3iPDh
26-
; CHECK-SPV-IR: call spir_func <4 x float> @_Z31__spirv_ocl_vload_halfn_Rfloat4iPDh
27-
; CHECK-SPV-IR: call spir_func <8 x float> @_Z31__spirv_ocl_vload_halfn_Rfloat8iPDh
28-
; CHECK-SPV-IR: call spir_func <16 x float> @_Z32__spirv_ocl_vload_halfn_Rfloat16iPDh
9+
; CHECK-SPV-IR: call spir_func <2 x float> @_Z31__spirv_ocl_vload_halfn_Rfloat2iPU3AS1Dhi(
10+
; CHECK-SPV-IR: call spir_func <3 x float> @_Z31__spirv_ocl_vload_halfn_Rfloat3iPU3AS1Dhi(
11+
; CHECK-SPV-IR: call spir_func <4 x float> @_Z31__spirv_ocl_vload_halfn_Rfloat4iPU3AS1Dhi(
12+
; CHECK-SPV-IR: call spir_func <8 x float> @_Z31__spirv_ocl_vload_halfn_Rfloat8iPU3AS1Dhi(
13+
; CHECK-SPV-IR: call spir_func <16 x float> @_Z32__spirv_ocl_vload_halfn_Rfloat16iPU3AS1Dhi(
14+
; CHECK-SPV-IR: call spir_func <2 x float> @_Z31__spirv_ocl_vload_halfn_Rfloat2iPU3AS3Dhi(
15+
; CHECK-SPV-IR: call spir_func <3 x float> @_Z31__spirv_ocl_vload_halfn_Rfloat3iPU3AS3Dhi(
16+
; CHECK-SPV-IR: call spir_func <4 x float> @_Z31__spirv_ocl_vload_halfn_Rfloat4iPU3AS3Dhi(
17+
; CHECK-SPV-IR: call spir_func <8 x float> @_Z31__spirv_ocl_vload_halfn_Rfloat8iPU3AS3Dhi(
18+
; CHECK-SPV-IR: call spir_func <16 x float> @_Z32__spirv_ocl_vload_halfn_Rfloat16iPU3AS3Dhi(
19+
; CHECK-SPV-IR: call spir_func <2 x float> @_Z31__spirv_ocl_vload_halfn_Rfloat2iPU3AS2Dhi(
20+
; CHECK-SPV-IR: call spir_func <3 x float> @_Z31__spirv_ocl_vload_halfn_Rfloat3iPU3AS2Dhi(
21+
; CHECK-SPV-IR: call spir_func <4 x float> @_Z31__spirv_ocl_vload_halfn_Rfloat4iPU3AS2Dhi(
22+
; CHECK-SPV-IR: call spir_func <8 x float> @_Z31__spirv_ocl_vload_halfn_Rfloat8iPU3AS2Dhi(
23+
; CHECK-SPV-IR: call spir_func <16 x float> @_Z32__spirv_ocl_vload_halfn_Rfloat16iPU3AS2Dhi(
24+
; CHECK-SPV-IR: call spir_func <2 x float> @_Z31__spirv_ocl_vload_halfn_Rfloat2iPDhi(
25+
; CHECK-SPV-IR: call spir_func <3 x float> @_Z31__spirv_ocl_vload_halfn_Rfloat3iPDhi(
26+
; CHECK-SPV-IR: call spir_func <4 x float> @_Z31__spirv_ocl_vload_halfn_Rfloat4iPDhi(
27+
; CHECK-SPV-IR: call spir_func <8 x float> @_Z31__spirv_ocl_vload_halfn_Rfloat8iPDhi(
28+
; CHECK-SPV-IR: call spir_func <16 x float> @_Z32__spirv_ocl_vload_halfn_Rfloat16iPDhi(
2929
;
30-
; CHECK-CL20: call spir_func <2 x float> @_Z11vload_half2jPU3AS1KDh
31-
; CHECK-CL20: call spir_func <3 x float> @_Z11vload_half3jPU3AS1KDh
32-
; CHECK-CL20: call spir_func <4 x float> @_Z11vload_half4jPU3AS1KDh
33-
; CHECK-CL20: call spir_func <8 x float> @_Z11vload_half8jPU3AS1KDh
34-
; CHECK-CL20: call spir_func <16 x float> @_Z12vload_half16jPU3AS1KDh
35-
; CHECK-CL20: call spir_func <2 x float> @_Z11vload_half2jPU3AS3KDh
36-
; CHECK-CL20: call spir_func <3 x float> @_Z11vload_half3jPU3AS3KDh
37-
; CHECK-CL20: call spir_func <4 x float> @_Z11vload_half4jPU3AS3KDh
38-
; CHECK-CL20: call spir_func <8 x float> @_Z11vload_half8jPU3AS3KDh
39-
; CHECK-CL20: call spir_func <16 x float> @_Z12vload_half16jPU3AS3KDh
40-
; CHECK-CL20: call spir_func <2 x float> @_Z11vload_half2jPU3AS2KDh
41-
; CHECK-CL20: call spir_func <3 x float> @_Z11vload_half3jPU3AS2KDh
42-
; CHECK-CL20: call spir_func <4 x float> @_Z11vload_half4jPU3AS2KDh
43-
; CHECK-CL20: call spir_func <8 x float> @_Z11vload_half8jPU3AS2KDh
44-
; CHECK-CL20: call spir_func <16 x float> @_Z12vload_half16jPU3AS2KDh
45-
; CHECK-CL20: call spir_func <2 x float> @_Z11vload_half2jPKDh
46-
; CHECK-CL20: call spir_func <3 x float> @_Z11vload_half3jPKDh
47-
; CHECK-CL20: call spir_func <4 x float> @_Z11vload_half4jPKDh
48-
; CHECK-CL20: call spir_func <8 x float> @_Z11vload_half8jPKDh
49-
; CHECK-CL20: call spir_func <16 x float> @_Z12vload_half16jPKDh
30+
; CHECK-CL20: call spir_func <2 x float> @_Z11vload_half2jPU3AS1KDh(
31+
; CHECK-CL20: call spir_func <3 x float> @_Z11vload_half3jPU3AS1KDh(
32+
; CHECK-CL20: call spir_func <4 x float> @_Z11vload_half4jPU3AS1KDh(
33+
; CHECK-CL20: call spir_func <8 x float> @_Z11vload_half8jPU3AS1KDh(
34+
; CHECK-CL20: call spir_func <16 x float> @_Z12vload_half16jPU3AS1KDh(
35+
; CHECK-CL20: call spir_func <2 x float> @_Z11vload_half2jPU3AS3KDh(
36+
; CHECK-CL20: call spir_func <3 x float> @_Z11vload_half3jPU3AS3KDh(
37+
; CHECK-CL20: call spir_func <4 x float> @_Z11vload_half4jPU3AS3KDh(
38+
; CHECK-CL20: call spir_func <8 x float> @_Z11vload_half8jPU3AS3KDh(
39+
; CHECK-CL20: call spir_func <16 x float> @_Z12vload_half16jPU3AS3KDh(
40+
; CHECK-CL20: call spir_func <2 x float> @_Z11vload_half2jPU3AS2KDh(
41+
; CHECK-CL20: call spir_func <3 x float> @_Z11vload_half3jPU3AS2KDh(
42+
; CHECK-CL20: call spir_func <4 x float> @_Z11vload_half4jPU3AS2KDh(
43+
; CHECK-CL20: call spir_func <8 x float> @_Z11vload_half8jPU3AS2KDh(
44+
; CHECK-CL20: call spir_func <16 x float> @_Z12vload_half16jPU3AS2KDh(
45+
; CHECK-CL20: call spir_func <2 x float> @_Z11vload_half2jPKDh(
46+
; CHECK-CL20: call spir_func <3 x float> @_Z11vload_half3jPKDh(
47+
; CHECK-CL20: call spir_func <4 x float> @_Z11vload_half4jPKDh(
48+
; CHECK-CL20: call spir_func <8 x float> @_Z11vload_half8jPKDh(
49+
; CHECK-CL20: call spir_func <16 x float> @_Z12vload_half16jPKDh(
5050

5151
OpCapability Addresses
5252
OpCapability Kernel

‎llvm-spirv/test/OpenCL.std/vloada_halfn.spvasm

+40-40
Original file line numberDiff line numberDiff line change
@@ -6,47 +6,47 @@
66
;
77
; CHECK-LABEL: spir_kernel void @test
88
;
9-
; CHECK-SPV-IR: call spir_func <2 x float> @_Z32__spirv_ocl_vloada_halfn_Rfloat2iPU3AS1Dh
10-
; CHECK-SPV-IR: call spir_func <3 x float> @_Z32__spirv_ocl_vloada_halfn_Rfloat3iPU3AS1Dh
11-
; CHECK-SPV-IR: call spir_func <4 x float> @_Z32__spirv_ocl_vloada_halfn_Rfloat4iPU3AS1Dh
12-
; CHECK-SPV-IR: call spir_func <8 x float> @_Z32__spirv_ocl_vloada_halfn_Rfloat8iPU3AS1Dh
13-
; CHECK-SPV-IR: call spir_func <16 x float> @_Z33__spirv_ocl_vloada_halfn_Rfloat16iPU3AS1Dh
14-
; CHECK-SPV-IR: call spir_func <2 x float> @_Z32__spirv_ocl_vloada_halfn_Rfloat2iPU3AS3Dh
15-
; CHECK-SPV-IR: call spir_func <3 x float> @_Z32__spirv_ocl_vloada_halfn_Rfloat3iPU3AS3Dh
16-
; CHECK-SPV-IR: call spir_func <4 x float> @_Z32__spirv_ocl_vloada_halfn_Rfloat4iPU3AS3Dh
17-
; CHECK-SPV-IR: call spir_func <8 x float> @_Z32__spirv_ocl_vloada_halfn_Rfloat8iPU3AS3Dh
18-
; CHECK-SPV-IR: call spir_func <16 x float> @_Z33__spirv_ocl_vloada_halfn_Rfloat16iPU3AS3Dh
19-
; CHECK-SPV-IR: call spir_func <2 x float> @_Z32__spirv_ocl_vloada_halfn_Rfloat2iPU3AS2Dh
20-
; CHECK-SPV-IR: call spir_func <3 x float> @_Z32__spirv_ocl_vloada_halfn_Rfloat3iPU3AS2Dh
21-
; CHECK-SPV-IR: call spir_func <4 x float> @_Z32__spirv_ocl_vloada_halfn_Rfloat4iPU3AS2Dh
22-
; CHECK-SPV-IR: call spir_func <8 x float> @_Z32__spirv_ocl_vloada_halfn_Rfloat8iPU3AS2Dh
23-
; CHECK-SPV-IR: call spir_func <16 x float> @_Z33__spirv_ocl_vloada_halfn_Rfloat16iPU3AS2Dh
24-
; CHECK-SPV-IR: call spir_func <2 x float> @_Z32__spirv_ocl_vloada_halfn_Rfloat2iPDh
25-
; CHECK-SPV-IR: call spir_func <3 x float> @_Z32__spirv_ocl_vloada_halfn_Rfloat3iPDh
26-
; CHECK-SPV-IR: call spir_func <4 x float> @_Z32__spirv_ocl_vloada_halfn_Rfloat4iPDh
27-
; CHECK-SPV-IR: call spir_func <8 x float> @_Z32__spirv_ocl_vloada_halfn_Rfloat8iPDh
28-
; CHECK-SPV-IR: call spir_func <16 x float> @_Z33__spirv_ocl_vloada_halfn_Rfloat16iPDh
9+
; CHECK-SPV-IR: call spir_func <2 x float> @_Z32__spirv_ocl_vloada_halfn_Rfloat2iPU3AS1Dhi(
10+
; CHECK-SPV-IR: call spir_func <3 x float> @_Z32__spirv_ocl_vloada_halfn_Rfloat3iPU3AS1Dhi(
11+
; CHECK-SPV-IR: call spir_func <4 x float> @_Z32__spirv_ocl_vloada_halfn_Rfloat4iPU3AS1Dhi(
12+
; CHECK-SPV-IR: call spir_func <8 x float> @_Z32__spirv_ocl_vloada_halfn_Rfloat8iPU3AS1Dhi(
13+
; CHECK-SPV-IR: call spir_func <16 x float> @_Z33__spirv_ocl_vloada_halfn_Rfloat16iPU3AS1Dhi(
14+
; CHECK-SPV-IR: call spir_func <2 x float> @_Z32__spirv_ocl_vloada_halfn_Rfloat2iPU3AS3Dhi(
15+
; CHECK-SPV-IR: call spir_func <3 x float> @_Z32__spirv_ocl_vloada_halfn_Rfloat3iPU3AS3Dhi(
16+
; CHECK-SPV-IR: call spir_func <4 x float> @_Z32__spirv_ocl_vloada_halfn_Rfloat4iPU3AS3Dhi(
17+
; CHECK-SPV-IR: call spir_func <8 x float> @_Z32__spirv_ocl_vloada_halfn_Rfloat8iPU3AS3Dhi(
18+
; CHECK-SPV-IR: call spir_func <16 x float> @_Z33__spirv_ocl_vloada_halfn_Rfloat16iPU3AS3Dhi(
19+
; CHECK-SPV-IR: call spir_func <2 x float> @_Z32__spirv_ocl_vloada_halfn_Rfloat2iPU3AS2Dhi(
20+
; CHECK-SPV-IR: call spir_func <3 x float> @_Z32__spirv_ocl_vloada_halfn_Rfloat3iPU3AS2Dhi(
21+
; CHECK-SPV-IR: call spir_func <4 x float> @_Z32__spirv_ocl_vloada_halfn_Rfloat4iPU3AS2Dhi(
22+
; CHECK-SPV-IR: call spir_func <8 x float> @_Z32__spirv_ocl_vloada_halfn_Rfloat8iPU3AS2Dhi(
23+
; CHECK-SPV-IR: call spir_func <16 x float> @_Z33__spirv_ocl_vloada_halfn_Rfloat16iPU3AS2Dhi(
24+
; CHECK-SPV-IR: call spir_func <2 x float> @_Z32__spirv_ocl_vloada_halfn_Rfloat2iPDhi(
25+
; CHECK-SPV-IR: call spir_func <3 x float> @_Z32__spirv_ocl_vloada_halfn_Rfloat3iPDhi(
26+
; CHECK-SPV-IR: call spir_func <4 x float> @_Z32__spirv_ocl_vloada_halfn_Rfloat4iPDhi(
27+
; CHECK-SPV-IR: call spir_func <8 x float> @_Z32__spirv_ocl_vloada_halfn_Rfloat8iPDhi(
28+
; CHECK-SPV-IR: call spir_func <16 x float> @_Z33__spirv_ocl_vloada_halfn_Rfloat16iPDhi(
2929
;
30-
; CHECK-CL20: call spir_func <2 x float> @_Z12vloada_half2jPU3AS1KDh
31-
; CHECK-CL20: call spir_func <3 x float> @_Z12vloada_half3jPU3AS1KDh
32-
; CHECK-CL20: call spir_func <4 x float> @_Z12vloada_half4jPU3AS1KDh
33-
; CHECK-CL20: call spir_func <8 x float> @_Z12vloada_half8jPU3AS1KDh
34-
; CHECK-CL20: call spir_func <16 x float> @_Z13vloada_half16jPU3AS1KDh
35-
; CHECK-CL20: call spir_func <2 x float> @_Z12vloada_half2jPU3AS3KDh
36-
; CHECK-CL20: call spir_func <3 x float> @_Z12vloada_half3jPU3AS3KDh
37-
; CHECK-CL20: call spir_func <4 x float> @_Z12vloada_half4jPU3AS3KDh
38-
; CHECK-CL20: call spir_func <8 x float> @_Z12vloada_half8jPU3AS3KDh
39-
; CHECK-CL20: call spir_func <16 x float> @_Z13vloada_half16jPU3AS3KDh
40-
; CHECK-CL20: call spir_func <2 x float> @_Z12vloada_half2jPU3AS2KDh
41-
; CHECK-CL20: call spir_func <3 x float> @_Z12vloada_half3jPU3AS2KDh
42-
; CHECK-CL20: call spir_func <4 x float> @_Z12vloada_half4jPU3AS2KDh
43-
; CHECK-CL20: call spir_func <8 x float> @_Z12vloada_half8jPU3AS2KDh
44-
; CHECK-CL20: call spir_func <16 x float> @_Z13vloada_half16jPU3AS2KDh
45-
; CHECK-CL20: call spir_func <2 x float> @_Z12vloada_half2jPKDh
46-
; CHECK-CL20: call spir_func <3 x float> @_Z12vloada_half3jPKDh
47-
; CHECK-CL20: call spir_func <4 x float> @_Z12vloada_half4jPKDh
48-
; CHECK-CL20: call spir_func <8 x float> @_Z12vloada_half8jPKDh
49-
; CHECK-CL20: call spir_func <16 x float> @_Z13vloada_half16jPKDh
30+
; CHECK-CL20: call spir_func <2 x float> @_Z12vloada_half2jPU3AS1KDh(
31+
; CHECK-CL20: call spir_func <3 x float> @_Z12vloada_half3jPU3AS1KDh(
32+
; CHECK-CL20: call spir_func <4 x float> @_Z12vloada_half4jPU3AS1KDh(
33+
; CHECK-CL20: call spir_func <8 x float> @_Z12vloada_half8jPU3AS1KDh(
34+
; CHECK-CL20: call spir_func <16 x float> @_Z13vloada_half16jPU3AS1KDh(
35+
; CHECK-CL20: call spir_func <2 x float> @_Z12vloada_half2jPU3AS3KDh(
36+
; CHECK-CL20: call spir_func <3 x float> @_Z12vloada_half3jPU3AS3KDh(
37+
; CHECK-CL20: call spir_func <4 x float> @_Z12vloada_half4jPU3AS3KDh(
38+
; CHECK-CL20: call spir_func <8 x float> @_Z12vloada_half8jPU3AS3KDh(
39+
; CHECK-CL20: call spir_func <16 x float> @_Z13vloada_half16jPU3AS3KDh(
40+
; CHECK-CL20: call spir_func <2 x float> @_Z12vloada_half2jPU3AS2KDh(
41+
; CHECK-CL20: call spir_func <3 x float> @_Z12vloada_half3jPU3AS2KDh(
42+
; CHECK-CL20: call spir_func <4 x float> @_Z12vloada_half4jPU3AS2KDh(
43+
; CHECK-CL20: call spir_func <8 x float> @_Z12vloada_half8jPU3AS2KDh(
44+
; CHECK-CL20: call spir_func <16 x float> @_Z13vloada_half16jPU3AS2KDh(
45+
; CHECK-CL20: call spir_func <2 x float> @_Z12vloada_half2jPKDh(
46+
; CHECK-CL20: call spir_func <3 x float> @_Z12vloada_half3jPKDh(
47+
; CHECK-CL20: call spir_func <4 x float> @_Z12vloada_half4jPKDh(
48+
; CHECK-CL20: call spir_func <8 x float> @_Z12vloada_half8jPKDh(
49+
; CHECK-CL20: call spir_func <16 x float> @_Z13vloada_half16jPKDh(
5050

5151
OpCapability Addresses
5252
OpCapability Kernel

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