Skip to content

Commit dba0b1f

Browse files
wosayttnwosayttn
committed
Add compiling option for building time.
Fix rtt port issues.
1 parent c04c19a commit dba0b1f

39 files changed

+643
-139
lines changed

‎bsp/nuvoton/libraries/m480/Device/Nuvoton/M480/Include/clk_reg.h

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -611,6 +611,10 @@ typedef struct
611611
* | | |0 = 12 MHz internal high speed RC oscillator (HIRC) clock is not stable or disabled.
612612
* | | |1 = 12 MHz internal high speed RC oscillator (HIRC) clock is stable and enabled.
613613
* | | |Note: This bit is read only.
614+
* |[6] |HIRC48MSTB|HIRC 48MHz Clock Source Stable Flag (Read Only)
615+
* | | |0 = 48 MHz internal high speed RC oscillator (HIRC) clock is not stable or disabled.
616+
* | | |1 = 48 MHz internal high speed RC oscillator (HIRC) clock is stable and enabled.
617+
* | | |Note: This bit is read only.
614618
* |[7] |CLKSFAIL |Clock Switching Fail Flag (Read Only)
615619
* | | |This bit is updated when software switches system clock source
616620
* | | |If switch target clock is stable, this bit will be set to 0
@@ -1482,6 +1486,9 @@ typedef struct
14821486
#define CLK_STATUS_HIRCSTB_Pos (4) /*!< CLK_T::STATUS: HIRCSTB Position */
14831487
#define CLK_STATUS_HIRCSTB_Msk (0x1ul << CLK_STATUS_HIRCSTB_Pos) /*!< CLK_T::STATUS: HIRCSTB Mask */
14841488

1489+
#define CLK_STATUS_HIRC48MSTB_Pos (6) /*!< CLK_T::STATUS: HIRC48MSTB Position */
1490+
#define CLK_STATUS_HIRC48MSTB_Msk (0x1ul << CLK_STATUS_HIRC48MSTB_Pos) /*!< CLK_T::STATUS: HIRC48MSTB Mask */
1491+
14851492
#define CLK_STATUS_CLKSFAIL_Pos (7) /*!< CLK_T::STATUS: CLKSFAIL Position */
14861493
#define CLK_STATUS_CLKSFAIL_Msk (0x1ul << CLK_STATUS_CLKSFAIL_Pos) /*!< CLK_T::STATUS: CLKSFAIL Mask */
14871494

‎bsp/nuvoton/libraries/m480/StdDriver/inc/nu_ccap.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -81,8 +81,6 @@ extern "C"
8181
#define CCAP_INT_ADDRMIEN_ENABLE (0x1ul<<CCAP_INT_ADDRMIEN_Pos) /*!< VININT setting for Memory Address Match Interrupt enable \hideinitializer */
8282
#define CCAP_INT_MDIEN_ENABLE (0x1ul<<CCAP_INT_MDIEN_Pos) /*!< VININT setting for Motion Detection Output Finish Interrupt Enable enable \hideinitializer */
8383

84-
85-
static uint32_t u32EscapeFrame = 0;
8684
/*---------------------------------------------------------------------------------------------------------*/
8785
/* Define Error Code */
8886
/*---------------------------------------------------------------------------------------------------------*/

‎bsp/nuvoton/libraries/m480/StdDriver/inc/nu_epwm.h

Lines changed: 22 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -190,6 +190,14 @@ extern "C"
190190
#define EPWM_CLKSRC_TIMER2 (3U) /*!< EPWM Clock source selects to TIMER2 overflow \hideinitializer */
191191
#define EPWM_CLKSRC_TIMER3 (4U) /*!< EPWM Clock source selects to TIMER3 overflow \hideinitializer */
192192

193+
/*---------------------------------------------------------------------------------------------------------*/
194+
/* Fault Detect Clock Source Select Constant Definitions */
195+
/*---------------------------------------------------------------------------------------------------------*/
196+
#define EPWM_FDCTL_FDCKSEL_CLK_DIV_1 (0UL << EPWM_FDCTL0_FDCKSEL_Pos) /*!< Fault detect clock selects to fault detect clock divided by 1 \hideinitializer */
197+
#define EPWM_FDCTL_FDCKSEL_CLK_DIV_2 (1UL << EPWM_FDCTL0_FDCKSEL_Pos) /*!< Fault detect clock selects to fault detect clock divided by 2 \hideinitializer */
198+
#define EPWM_FDCTL_FDCKSEL_CLK_DIV_4 (2UL << EPWM_FDCTL0_FDCKSEL_Pos) /*!< Fault detect clock selects to fault detect clock divided by 4 \hideinitializer */
199+
#define EPWM_FDCTL_FDCKSEL_CLK_DIV_8 (3UL << EPWM_FDCTL0_FDCKSEL_Pos) /*!< Fault detect clock selects to fault detect clock divided by 8 \hideinitializer */
200+
193201

194202
/*@}*/ /* end of group EPWM_EXPORTED_CONSTANTS */
195203

@@ -542,6 +550,8 @@ void EPWM_Stop(EPWM_T *epwm, uint32_t u32ChannelMask);
542550
void EPWM_ForceStop(EPWM_T *epwm, uint32_t u32ChannelMask);
543551
void EPWM_EnableADCTrigger(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Condition);
544552
void EPWM_DisableADCTrigger(EPWM_T *epwm, uint32_t u32ChannelNum);
553+
int32_t EPWM_EnableADCTriggerPrescale(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Prescale, uint32_t u32PrescaleCnt);
554+
void EPWM_DisableADCTriggerPrescale(EPWM_T *epwm, uint32_t u32ChannelNum);
545555
void EPWM_ClearADCTriggerFlag(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Condition);
546556
uint32_t EPWM_GetADCTriggerFlag(EPWM_T *epwm, uint32_t u32ChannelNum);
547557
void EPWM_EnableDACTrigger(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Condition);
@@ -607,6 +617,18 @@ void EPWM_SetBrakePinSource(EPWM_T *epwm, uint32_t u32BrakePinNum, uint32_t u32S
607617
void EPWM_SetLeadingEdgeBlanking(EPWM_T *epwm, uint32_t u32TrigSrcSel, uint32_t u32TrigType, uint32_t u32BlankingCnt, uint32_t u32BlankingEnable);
608618
uint32_t EPWM_GetWrapAroundFlag(EPWM_T *epwm, uint32_t u32ChannelNum);
609619
void EPWM_ClearWrapAroundFlag(EPWM_T *epwm, uint32_t u32ChannelNum);
620+
void EPWM_EnableFaultDetect(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32AfterPrescaler, uint32_t u32ClkSel);
621+
void EPWM_DisableFaultDetect(EPWM_T *epwm, uint32_t u32ChannelNum);
622+
void EPWM_EnableFaultDetectOutput(EPWM_T *epwm, uint32_t u32ChannelNum);
623+
void EPWM_DisableFaultDetectOutput(EPWM_T *epwm, uint32_t u32ChannelNum);
624+
void EPWM_EnableFaultDetectDeglitch(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32DeglitchSmpCycle);
625+
void EPWM_DisableFaultDetectDeglitch(EPWM_T *epwm, uint32_t u32ChannelNum);
626+
void EPWM_EnableFaultDetectMask(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32MaskCnt);
627+
void EPWM_DisableFaultDetectMask(EPWM_T *epwm, uint32_t u32ChannelNum);
628+
void EPWM_EnableFaultDetectInt(EPWM_T *epwm, uint32_t u32ChannelNum);
629+
void EPWM_DisableFaultDetectInt(EPWM_T *epwm, uint32_t u32ChannelNum);
630+
void EPWM_ClearFaultDetectInt(EPWM_T *epwm, uint32_t u32ChannelNum);
631+
uint32_t EPWM_GetFaultDetectInt(EPWM_T *epwm, uint32_t u32ChannelNum);
610632

611633
/*@}*/ /* end of group EPWM_EXPORTED_FUNCTIONS */
612634

‎bsp/nuvoton/libraries/m480/StdDriver/inc/nu_usci_uart.h

Lines changed: 49 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -408,6 +408,55 @@ extern "C"
408408
*/
409409
#define UUART_CLR_WAKEUP_FLAG(uuart) ((uuart)->WKSTS = UUART_WKSTS_WKF_Msk)
410410

411+
/**
412+
* @brief Trigger RX PDMA function.
413+
*
414+
* @param[in] uuart The pointer of the specified USCI_UART module.
415+
*
416+
* @return None.
417+
*
418+
* @details Set RXPDMAEN bit of UUART_PDMACTL register to enable RX PDMA transfer function.
419+
* \hideinitializer
420+
*/
421+
#define UUART_TRIGGER_RX_PDMA(uuart) ((uuart)->PDMACTL |= UUART_PDMACTL_RXPDMAEN_Msk|UUART_PDMACTL_PDMAEN_Msk)
422+
423+
/**
424+
* @brief Trigger TX PDMA function.
425+
*
426+
* @param[in] uuart The pointer of the specified USCI_UART module.
427+
*
428+
* @return None.
429+
*
430+
* @details Set TXPDMAEN bit of UUART_PDMACTL register to enable TX PDMA transfer function.
431+
* \hideinitializer
432+
*/
433+
#define UUART_TRIGGER_TX_PDMA(uuart) ((uuart)->PDMACTL |= UUART_PDMACTL_TXPDMAEN_Msk|UUART_PDMACTL_PDMAEN_Msk)
434+
435+
/**
436+
* @brief Disable RX PDMA transfer.
437+
*
438+
* @param[in] uuart The pointer of the specified USCI_UART module.
439+
*
440+
* @return None.
441+
*
442+
* @details Clear RXPDMAEN bit of UUART_PDMACTL register to disable RX PDMA transfer function.
443+
* \hideinitializer
444+
*/
445+
#define UUART_DISABLE_RX_PDMA(uuart) ( (uuart)->PDMACTL &= ~UUART_PDMACTL_RXPDMAEN_Msk )
446+
447+
/**
448+
* @brief Disable TX PDMA transfer.
449+
*
450+
* @param[in] uuart The pointer of the specified USCI_UART module.
451+
*
452+
* @return None.
453+
*
454+
* @details Clear TXPDMAEN bit of UUART_PDMACTL register to disable TX PDMA transfer function.
455+
* \hideinitializer
456+
*/
457+
#define UUART_DISABLE_TX_PDMA(uuart) ( (uuart)->PDMACTL &= ~UUART_PDMACTL_TXPDMAEN_Msk )
458+
459+
411460
/**
412461
* @brief Enable specified USCI_UART PDMA function
413462
*

‎bsp/nuvoton/libraries/m480/StdDriver/lib/libstddriver_gcc.a

1.89 KB
Binary file not shown.

‎bsp/nuvoton/libraries/m480/StdDriver/lib/libstddriver_iar.a

6.83 KB
Binary file not shown.

‎bsp/nuvoton/libraries/m480/StdDriver/lib/libstddriver_keil.lib

34.1 KB
Binary file not shown.

‎bsp/nuvoton/libraries/m480/StdDriver/src/nu_epwm.c

Lines changed: 234 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -311,6 +311,60 @@ void EPWM_DisableADCTrigger(EPWM_T *epwm, uint32_t u32ChannelNum)
311311
}
312312
}
313313

314+
/**
315+
* @brief Enable and configure trigger ADC prescale
316+
* @param[in] epwm The pointer of the specified EPWM module
317+
* - EPWM0 : EPWM Group 0
318+
* - EPWM1 : EPWM Group 1
319+
* @param[in] u32ChannelNum EPWM channel number. Valid values are between 0~5.
320+
* @param[in] u32Prescale ADC prescale. Valid values are between 0 to 0xF.
321+
* @param[in] u32PrescaleCnt ADC prescale counter. Valid values are between 0 to 0xF.
322+
* @retval 0 Success.
323+
* @retval -1 Failed.
324+
* @details This function is used to enable and configure trigger ADC prescale.
325+
* @note User can configure only when ADC trigger prescale is disabled.
326+
* @note ADC prescale counter must less than ADC prescale.
327+
*/
328+
int32_t EPWM_EnableADCTriggerPrescale(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Prescale, uint32_t u32PrescaleCnt)
329+
{
330+
/* User can write only when PSCENn(n = 0 ~ 5) is 0 */
331+
if ((epwm)->EADCPSCCTL & (1UL << u32ChannelNum))
332+
return (-1);
333+
334+
if(u32ChannelNum < 4UL)
335+
{
336+
(epwm)->EADCPSC0 = ((epwm)->EADCPSC0 & ~((EPWM_EADCPSC0_EADCPSC0_Msk) << (u32ChannelNum << 3))) | \
337+
(u32Prescale << (u32ChannelNum << 3));
338+
(epwm)->EADCPSCNT0 = ((epwm)->EADCPSCNT0 & ~((EPWM_EADCPSCNT0_PSCNT0_Msk) << (u32ChannelNum << 3))) | \
339+
(u32PrescaleCnt << (u32ChannelNum << 3));
340+
}
341+
else
342+
{
343+
(epwm)->EADCPSC1 = ((epwm)->EADCPSC1 & ~((EPWM_EADCPSC1_EADCPSC4_Msk) << ((u32ChannelNum - 4UL) << 3))) | \
344+
(u32Prescale << ((u32ChannelNum - 4UL) << 3));
345+
(epwm)->EADCPSCNT1 = ((epwm)->EADCPSCNT1 & ~((EPWM_EADCPSCNT1_PSCNT4_Msk) << ((u32ChannelNum - 4UL) << 3))) | \
346+
(u32PrescaleCnt << ((u32ChannelNum - 4UL) << 3));
347+
}
348+
349+
(epwm)->EADCPSCCTL |= EPWM_EADCPSCCTL_PSCEN0_Msk << u32ChannelNum;
350+
351+
return 0;
352+
}
353+
354+
/**
355+
* @brief Disable Trigger ADC prescale function
356+
* @param[in] epwm The pointer of the specified EPWM module
357+
* - EPWM0 : EPWM Group 0
358+
* - EPWM1 : EPWM Group 1
359+
* @param[in] u32ChannelNum EPWM channel number. Valid values are between 0~5
360+
* @return None
361+
* @details This function is used to disable trigger ADC prescale.
362+
*/
363+
void EPWM_DisableADCTriggerPrescale(EPWM_T *epwm, uint32_t u32ChannelNum)
364+
{
365+
(epwm)->EADCPSCCTL &= ~(EPWM_EADCPSCCTL_PSCEN0_Msk << u32ChannelNum);
366+
}
367+
314368
/**
315369
* @brief Clear selected channel trigger ADC flag
316370
* @param[in] epwm The pointer of the specified EPWM module
@@ -1456,6 +1510,186 @@ void EPWM_ClearWrapAroundFlag(EPWM_T *epwm, uint32_t u32ChannelNum)
14561510
(epwm)->STATUS = (EPWM_STATUS_CNTMAXF0_Msk << u32ChannelNum);
14571511
}
14581512

1513+
/**
1514+
* @brief Enable fault detect of selected channel.
1515+
* @param[in] epwm The pointer of the specified EPWM module.
1516+
* - EPWM0 : EPWM Group 0
1517+
* - EPWM1 : EPWM Group 1
1518+
* @param[in] u32ChannelNum EPWM channel number. Valid values are between 0~5.
1519+
* @param[in] u32AfterPrescaler Fault Detect Clock Source is from prescaler output. Valid values are TRUE (after prescaler) or FALSE (before prescaler).
1520+
* @param[in] u32ClkSel Fault Detect Clock Select.
1521+
* - \ref EPWM_FDCTL_FDCKSEL_CLK_DIV_1
1522+
* - \ref EPWM_FDCTL_FDCKSEL_CLK_DIV_2
1523+
* - \ref EPWM_FDCTL_FDCKSEL_CLK_DIV_4
1524+
* - \ref EPWM_FDCTL_FDCKSEL_CLK_DIV_8
1525+
* @return None
1526+
* @details This function is used to enable fault detect of selected channel.
1527+
*/
1528+
void EPWM_EnableFaultDetect(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32AfterPrescaler, uint32_t u32ClkSel)
1529+
{
1530+
(epwm)->FDEN = ((epwm)->FDEN & ~(EPWM_FDEN_FDCKS0_Msk << (u32ChannelNum))) | \
1531+
((EPWM_FDEN_FDEN0_Msk | ((u32AfterPrescaler) << EPWM_FDEN_FDCKS0_Pos)) << (u32ChannelNum));
1532+
(epwm)->FDCTL[(u32ChannelNum)] = ((epwm)->FDCTL[(u32ChannelNum)] & ~EPWM_FDCTL0_FDCKSEL_Msk) | (u32ClkSel);
1533+
}
1534+
1535+
/**
1536+
* @brief Disable fault detect of selected channel.
1537+
* @param[in] epwm The pointer of the specified EPWM module.
1538+
* - EPWM0 : EPWM Group 0
1539+
* - EPWM1 : EPWM Group 1
1540+
* @param[in] u32ChannelNum EPWM channel number. Valid values are between 0~5.
1541+
* @return None
1542+
* @details This function is used to disable fault detect of selected channel.
1543+
*/
1544+
void EPWM_DisableFaultDetect(EPWM_T *epwm, uint32_t u32ChannelNum)
1545+
{
1546+
(epwm)->FDEN &= ~(EPWM_FDEN_FDEN0_Msk << (u32ChannelNum));
1547+
}
1548+
1549+
/**
1550+
* @brief Enable fault detect output of selected channel.
1551+
* @param[in] epwm The pointer of the specified EPWM module.
1552+
* - EPWM0 : EPWM Group 0
1553+
* - EPWM1 : EPWM Group 1
1554+
* @param[in] u32ChannelNum EPWM channel number. Valid values are between 0~5.
1555+
* @return None
1556+
* @details This function is used to enable fault detect output of selected channel.
1557+
*/
1558+
void EPWM_EnableFaultDetectOutput(EPWM_T *epwm, uint32_t u32ChannelNum)
1559+
{
1560+
(epwm)->FDEN &= ~(EPWM_FDEN_FDODIS0_Msk << (u32ChannelNum));
1561+
}
1562+
1563+
/**
1564+
* @brief Disable fault detect output of selected channel.
1565+
* @param[in] epwm The pointer of the specified EPWM module.
1566+
* - EPWM0 : EPWM Group 0
1567+
* - EPWM1 : EPWM Group 1
1568+
* @param[in] u32ChannelNum EPWM channel number. Valid values are between 0~5.
1569+
* @return None
1570+
* @details This function is used to disable fault detect output of selected channel.
1571+
*/
1572+
void EPWM_DisableFaultDetectOutput(EPWM_T *epwm, uint32_t u32ChannelNum)
1573+
{
1574+
(epwm)->FDEN |= (EPWM_FDEN_FDODIS0_Msk << (u32ChannelNum));
1575+
}
1576+
1577+
/**
1578+
* @brief Enable fault detect deglitch function of selected channel.
1579+
* @param[in] epwm The pointer of the specified EPWM module.
1580+
* - EPWM0 : EPWM Group 0
1581+
* - EPWM1 : EPWM Group 1
1582+
* @param[in] u32ChannelNum EPWM channel number. Valid values are between 0~5.
1583+
* @param[in] u32DeglitchSmpCycle Deglitch Sampling Cycle. Valid values are between 0~7.
1584+
* @return None
1585+
* @details This function is used to enable fault detect deglitch function of selected channel.
1586+
*/
1587+
void EPWM_EnableFaultDetectDeglitch(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32DeglitchSmpCycle)
1588+
{
1589+
(epwm)->FDCTL[(u32ChannelNum)] = ((epwm)->FDCTL[(u32ChannelNum)] & (~EPWM_FDCTL0_DGSMPCYC_Msk)) | \
1590+
(EPWM_FDCTL0_FDDGEN_Msk | ((u32DeglitchSmpCycle) << EPWM_FDCTL0_DGSMPCYC_Pos));
1591+
}
1592+
1593+
/**
1594+
* @brief Disable fault detect deglitch function of selected channel.
1595+
* @param[in] epwm The pointer of the specified EPWM module.
1596+
* - EPWM0 : EPWM Group 0
1597+
* - EPWM1 : EPWM Group 1
1598+
* @param[in] u32ChannelNum EPWM channel number. Valid values are between 0~5.
1599+
* @return None
1600+
* @details This function is used to disable fault detect deglitch function of selected channel.
1601+
*/
1602+
void EPWM_DisableFaultDetectDeglitch(EPWM_T *epwm, uint32_t u32ChannelNum)
1603+
{
1604+
(epwm)->FDCTL[(u32ChannelNum)] &= ~EPWM_FDCTL0_FDDGEN_Msk;
1605+
}
1606+
1607+
/**
1608+
* @brief Enable fault detect mask function of selected channel.
1609+
* @param[in] epwm The pointer of the specified EPWM module.
1610+
* - EPWM0 : EPWM Group 0
1611+
* - EPWM1 : EPWM Group 1
1612+
* @param[in] u32ChannelNum EPWM channel number. Valid values are between 0~5.
1613+
* @param[in] u32MaskCnt Transition mask counter. Valid values are between 0~0x7F.
1614+
* @return None
1615+
* @details This function is used to enable fault detect mask function of selected channel.
1616+
*/
1617+
void EPWM_EnableFaultDetectMask(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32MaskCnt)
1618+
{
1619+
(epwm)->FDCTL[(u32ChannelNum)] = ((epwm)->FDCTL[(u32ChannelNum)] & (~EPWM_FDCTL0_TRMSKCNT_Msk)) | (EPWM_FDCTL0_FDMSKEN_Msk | (u32MaskCnt));
1620+
}
1621+
1622+
/**
1623+
* @brief Disable fault detect mask function of selected channel.
1624+
* @param[in] epwm The pointer of the specified EPWM module.
1625+
* - EPWM0 : EPWM Group 0
1626+
* - EPWM1 : EPWM Group 1
1627+
* @param[in] u32ChannelNum EPWM channel number. Valid values are between 0~5.
1628+
* @return None
1629+
* @details This function is used to disable fault detect mask function of selected channel.
1630+
*/
1631+
void EPWM_DisableFaultDetectMask(EPWM_T *epwm, uint32_t u32ChannelNum)
1632+
{
1633+
(epwm)->FDCTL[(u32ChannelNum)] &= ~EPWM_FDCTL0_FDMSKEN_Msk;
1634+
}
1635+
1636+
/**
1637+
* @brief Enable fault detect interrupt of selected channel.
1638+
* @param[in] epwm The pointer of the specified EPWM module.
1639+
* - EPWM0 : EPWM Group 0
1640+
* - EPWM1 : EPWM Group 1
1641+
* @param[in] u32ChannelNum EPWM channel number. Valid values are between 0~5.
1642+
* @return None
1643+
* @details This function is used to enable fault detect interrupt of selected channel.
1644+
*/
1645+
void EPWM_EnableFaultDetectInt(EPWM_T *epwm, uint32_t u32ChannelNum)
1646+
{
1647+
(epwm)->FDIEN |= (EPWM_FDIEN_FDIEN0_Msk << (u32ChannelNum));
1648+
}
1649+
1650+
/**
1651+
* @brief Disable fault detect interrupt of selected channel.
1652+
* @param[in] epwm The pointer of the specified EPWM module.
1653+
* - EPWM0 : EPWM Group 0
1654+
* - EPWM1 : EPWM Group 1
1655+
* @param[in] u32ChannelNum EPWM channel number. Valid values are between 0~5.
1656+
* @return None
1657+
* @details This function is used to disable fault detect interrupt of selected channel.
1658+
*/
1659+
void EPWM_DisableFaultDetectInt(EPWM_T *epwm, uint32_t u32ChannelNum)
1660+
{
1661+
(epwm)->FDIEN &= ~(EPWM_FDIEN_FDIEN0_Msk << (u32ChannelNum));
1662+
}
1663+
1664+
/**
1665+
* @brief Clear fault detect interrupt of selected channel.
1666+
* @param[in] epwm The pointer of the specified EPWM module.
1667+
* - EPWM0 : EPWM Group 0
1668+
* - EPWM1 : EPWM Group 1
1669+
* @param[in] u32ChannelNum EPWM channel number. Valid values are between 0~5.
1670+
* @return None
1671+
* @details This function is used to clear fault detect interrupt of selected channel.
1672+
*/
1673+
void EPWM_ClearFaultDetectInt(EPWM_T *epwm, uint32_t u32ChannelNum)
1674+
{
1675+
(epwm)->FDSTS = (EPWM_FDSTS_FDIF0_Msk << (u32ChannelNum));
1676+
}
1677+
1678+
/**
1679+
* @brief Get fault detect interrupt of selected channel.
1680+
* @param[in] epwm The pointer of the specified EPWM module.
1681+
* - EPWM0 : EPWM Group 0
1682+
* - EPWM1 : EPWM Group 1
1683+
* @param[in] u32ChannelNum EPWM channel number. Valid values are between 0~5.
1684+
* @retval 0 Fault detect interrupt did not occur.
1685+
* @retval 1 Fault detect interrupt occurred.
1686+
* @details This function is used to Get fault detect interrupt of selected channel.
1687+
*/
1688+
uint32_t EPWM_GetFaultDetectInt(EPWM_T *epwm, uint32_t u32ChannelNum)
1689+
{
1690+
return (((epwm)->FDSTS & (EPWM_FDSTS_FDIF0_Msk << (u32ChannelNum))) ? 1UL : 0UL);
1691+
}
1692+
14591693
/*@}*/ /* end of group EPWM_EXPORTED_FUNCTIONS */
14601694

14611695
/*@}*/ /* end of group EPWM_Driver */

‎bsp/nuvoton/libraries/m480/USBHostLib/src/ehci.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -918,7 +918,7 @@ static int visit_qtd(qTD_T *qtd)
918918
static void scan_asynchronous_list()
919919
{
920920
QH_T *qh, *qh_tmp;
921-
qTD_T *q_pre, *qtd, *qtd_tmp;
921+
qTD_T *q_pre=NULL, *qtd, *qtd_tmp;
922922
UTR_T *utr;
923923

924924
qh = QH_PTR(_H_qh->HLink);

0 commit comments

Comments
 (0)