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@frozen
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- class DummySelect (cirq_ft .SelectOracle ):
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+ class ExampleSelect (cirq_ft .SelectOracle ):
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bitsize : int
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control_val : Optional [int ] = None
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@@ -50,7 +50,7 @@ def decompose_from_registers(self, context, selection, target):
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@pytest .mark .parametrize ('bitsize' , [2 , 3 , 4 , 5 ])
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@pytest .mark .parametrize ('arctan_bitsize' , [5 , 6 , 7 ])
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def test_phase_oracle (bitsize : int , arctan_bitsize : int ):
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- phase_oracle = ComplexPhaseOracle (DummySelect (bitsize ), arctan_bitsize )
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+ phase_oracle = ComplexPhaseOracle (ExampleSelect (bitsize ), arctan_bitsize )
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g = cq_testing .GateHelper (phase_oracle )
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# Prepare uniform superposition state on selection register and apply phase oracle.
@@ -78,6 +78,6 @@ def test_phase_oracle(bitsize: int, arctan_bitsize: int):
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def test_phase_oracle_consistent_protocols ():
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bitsize , arctan_bitsize = 3 , 5
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- gate = ComplexPhaseOracle (DummySelect (bitsize , 1 ), arctan_bitsize )
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+ gate = ComplexPhaseOracle (ExampleSelect (bitsize , 1 ), arctan_bitsize )
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expected_symbols = ('@' ,) + ('ROTy' ,) * bitsize
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assert cirq .circuit_diagram_info (gate ).wire_symbols == expected_symbols
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