Merge branch '✨-arm-hardfp' into 🦆

Author: yvt

.github/workflows/ci.yml

@@ -95,7 +95,33 @@ jobs:
           sudo apt-get install libusb-1.0-0-dev qemu-system-arm
 
       - name: Install Additional Target of the Rust Toolchain
-        run: rustup target add thumbv6m-none-eabi thumbv7m-none-eabi
+        run: |
+          rustup target add thumbv6m-none-eabi thumbv7m-none-eabi thumbv7em-none-eabihf
+          rustup target add thumbv8m.base-none-eabi thumbv8m.main-none-eabi thumbv8m.main-none-eabihf
+
+      - name: Test (MPS2+ AN505, Armv8-M Mainline + FPU)
+        uses: actions-rs/cargo@v1
+        with:
+          command: run
+          args: -p constance_port_arm_m_test_runner -- -t qemu_mps2_an505 -l debug
+
+      - name: Test (MPS2+ AN505, Armv8-M Mainline)
+        uses: actions-rs/cargo@v1
+        with:
+          command: run
+          args: -p constance_port_arm_m_test_runner -- -t qemu_mps2_an505_v8mml -l debug
+
+      - name: Test (MPS2+ AN505, Armv8-M Baseline)
+        uses: actions-rs/cargo@v1
+        with:
+          command: run
+          args: -p constance_port_arm_m_test_runner -- -t qemu_mps2_an505_v8mbl -l debug
+
+      - name: Test (MPS2+ AN505, Armv7-M + FPU + DSP)
+        uses: actions-rs/cargo@v1
+        with:
+          command: run
+          args: -p constance_port_arm_m_test_runner -- -t qemu_mps2_an505_v7em_hf -l debug
 
       - name: Test (MPS2+ AN385, Armv7-M)
         uses: actions-rs/cargo@v1

README.md

@@ -19,20 +19,20 @@ Constance is a proof-of-concept of a static RTOS that utilizes Rust's compile-ti
 
 ## Implementation Status
 
-|       Core       |     Library     |        Ports       |
-| :--------------- | :-------------- | :----------------- |
-| ☑︎ Tasks          | ☐ `Mutex`       | ☑︎ `std` (Hosted)   |
-| ☑︎ Hunks          | ☐ `RwLock`      | ☑︎ Armv7-M (no FPU) |
-| ☑︎ Wait Objects   | ☐ `Once`        | ☑︎ Armv6-M          |
-| ☑︎ Timeouts       | ☐ Logger        |                    |
-| ☐ Semaphores     | ☐ C API         |                    |
-| ☑︎ Event Groups   |                 |                    |
-| ☐ Mutexes        | **Tools**       | **Boards**         |
-| ☑︎ Timers         | ☑︎ Test Harness  | ☑︎ Hosted           |
-| ☑︎ Interrupts     | ☑︎ Test Suite    | ☑︎ F401RE           |
-| ☑︎ Startup Hooks  | ☑︎ Configurator  |                    |
-| ☐ CPU Exceptions |                 |                    |
-| ☐ Panicking      |                 |                    |
+|       Core       |     Library     |        Ports        |
+| :--------------- | :-------------- | :------------------ |
+| ☑︎ Tasks          | ☐ `Mutex`       | ☑︎ `std` (Hosted)    |
+| ☑︎ Hunks          | ☐ `RwLock`      | ☑︎ Armv8-M (no CMSE) |
+| ☑︎ Wait Objects   | ☐ `Once`        | ☑︎ Armv7-M           |
+| ☑︎ Timeouts       | ☐ Logger        | ☑︎ Armv6-M           |
+| ☐ Semaphores     | ☐ C API         |                     |
+| ☑︎ Event Groups   |                 |                     |
+| ☐ Mutexes        | **Tools**       | **Boards**          |
+| ☑︎ Timers         | ☑︎ Test Harness  | ☑︎ Hosted            |
+| ☑︎ Interrupts     | ☑︎ Test Suite    | ☑︎ F401RE            |
+| ☑︎ Startup Hooks  | ☑︎ Configurator  |                     |
+| ☐ CPU Exceptions |                 |                     |
+| ☐ Panicking      |                 |                     |
 
 ## Example
 

src/constance_port_arm_m/src/threading.rs

@@ -229,16 +229,23 @@ impl State {
         pp_asm!("
             # Save the context of the previous task
             #
-            #    [r0 = &running_task, r4-r11 = context, lr = EXC_RETURN]
+            #    [r0 = &running_task, r4-r11 = context,
+            #     s16-s31 = context, lr = EXC_RETURN]
             #
             #    r1 = running_task
             #    if r1.is_some() {
-            #        r2 = psp as *u32 - 10
+            #        let fpu_active = cfg!(has_fpu) && (lr & FType) == 0;
+            #        r2 = psp as *u32 - if fpu_active { 26 } else { 10 }
+            #        r1.port_task_state.sp = r2
             #
+            #        r2[0] = lr (EXC_RETURN)
+            #        r2[1] = control
+            #        r2 += 2;
+            #        if fpu_active {
+            #            r2[0..16] = {s16-s31}
+            #            r2 += 16;
+            #        }
             #        r2[0..8] = {r4-r11}
-            #        r2[8] = lr (EXC_RETURN)
-            #        r2[9] = control
-            #        r1.port_task_state.sp = r2
             #    }
             #
             #    [r0 = &running_task]
@@ -252,22 +259,29 @@ impl State {
         "   }                                                               "
             mrs r2, psp
             mrs r3, control
-            subs r2, #40
+            subs r2, #40                                                    "
+            if cfg!(has_fpu) {                                              "
+                tst lr, #0x10
+                it eq
+                subeq r2, #64
+        "   }                                                               "
             str r2, [r1]                                                    "
             if cfg!(any(armv6m, armv8m_base)) {                             "
-                stm r2!, {r4-r7}
+                mov r1, lr
+                stmia r2!, {r1, r3}
+                stmia r2!, {r4-r7}
                 mov r4, r8
                 mov r5, r9
                 mov r6, r10
                 mov r7, r11
-                stm r2!, {r4-r7}
-                mov r4, lr
-                str r4, [r2]
-                str r3, [r2, 4]
+                stmia r2!, {r4-r7}
         "   } else {                                                        "
-                stm r2, {r4-r11}
-                str lr, [r2, 32]
-                str r3, [r2, 36]
+                strd lr, r3, [r2], #8                                       "
+                if cfg!(has_fpu) {                                          "
+                    it eq
+                    vstmiaeq r2!, {s16-s31}
+        "       }                                                           "
+                stmia r2, {r4-r11}
         "   }                                                               "
 
             # Choose the next task to run
@@ -284,10 +298,19 @@ impl State {
             #    if r1.is_some() {
             #        r2 = r1.port_task_state.sp
             #
+            #        lr = r2[0]
+            #        control = r2[1]
+            #        r2 += 2;
+            #
+            #        let fpu_active = cfg!(has_fpu) && (lr & FType) == 0;
+            #        if fpu_active {
+            #            {s16-s31} = r2[0..16]
+            #            r2 += 16;
+            #        }
+            #
             #        {r4-r11} = r2[0..8]
-            #        lr = r2[8]
-            #        control = r2[9]
-            #        psp = &r2[10]
+            #        r2 += 8;
+            #        psp = r2
             #    } else {
             #        // The idle task only uses r0-r3, so we can skip most steps
             #        // in this case
@@ -297,7 +320,7 @@ impl State {
             #           execution uses the Main Stack.” */
             #    }
             #
-            #    [r4-r11 = context, lr = EXC_RETURN]
+            #    [r4-r11 = context, s16-s31 = context, lr = EXC_RETURN]
 
             ldr r1, [r0]                                                    "
             if cfg!(armv6m) {                                               "
@@ -308,24 +331,25 @@ impl State {
         "   }                                                               "
             ldr r2, [r1]                                                    "
             if cfg!(any(armv6m, armv8m_base)) {                             "
-                adds r2, #16
-                ldmia r2!, {r4-r7}
-                mov r8, r4
-                mov r9, r5
-                mov r10, r6
-                mov r11, r7
-                subs r2, #32
-                ldmia r2!, {r4-r7}
-                adds r2, #16
                 ldmia r2!, {r0, r3}
                 mov lr, r0
+                ldmia r2!, {r4-r7}
+                ldmia r2!, {r0, r1}
+                mov r8, r0
+                mov r9, r1
+                ldmia r2!, {r0, r1}
+                mov r10, r0
+                mov r11, r1
         "   } else {                                                        "
-                ldr lr, [r2, 32]
-                ldr r3, [r2, 36]
-                msr control, r3
-                ldmia r2, {r4-r11}
-                adds r2, #40
+                ldrd lr, r3, [r2], #8                                       "
+                if cfg!(has_fpu) {                                          "
+                    tst lr, #0x10
+                    it eq
+                    vldmiaeq r2!, {s16-s31}
+        "       }                                                           "
+                ldmia r2!, {r4-r11}
         "   }                                                               "
+            msr control, r3
             msr psp, r2
             bx lr
 
@@ -426,27 +450,27 @@ impl State {
             slice::from_raw_parts_mut(sp, 10)
         };
 
-        // R4-R11: Uninitialized
-        extra_ctx[0] = MaybeUninit::new(0x04040404);
-        extra_ctx[1] = MaybeUninit::new(0x05050505);
-        extra_ctx[2] = MaybeUninit::new(0x06060606);
-        extra_ctx[3] = MaybeUninit::new(0x07070707);
-        extra_ctx[4] = MaybeUninit::new(0x08080808);
-        extra_ctx[5] = MaybeUninit::new(0x09090909);
-        extra_ctx[6] = MaybeUninit::new(0x10101010);
-        extra_ctx[7] = MaybeUninit::new(0x11111111);
         // EXC_RETURN: 0xfffffffd (“Return to Thread Mode; Exception return gets
         //             state from the Process stack; On return execution uses
         //             the Process Stack.”)
         // TODO: This differs for Armv8-M
         // TODO: Plus, we shouldn't hard-code this here
-        extra_ctx[8] = MaybeUninit::new(0xfffffffd);
+        extra_ctx[0] = MaybeUninit::new(0xfffffffd);
         // CONTROL: SPSEL = 1 (Use PSP)
-        extra_ctx[9] = MaybeUninit::new(0x00000002);
+        extra_ctx[1] = MaybeUninit::new(0x00000002);
         // TODO: Secure context (Armv8-M)
-        // TODO: Floating point registers
         // TODO: PSPLIM
 
+        // R4-R11: Uninitialized
+        extra_ctx[2] = MaybeUninit::new(0x04040404);
+        extra_ctx[3] = MaybeUninit::new(0x05050505);
+        extra_ctx[4] = MaybeUninit::new(0x06060606);
+        extra_ctx[5] = MaybeUninit::new(0x07070707);
+        extra_ctx[6] = MaybeUninit::new(0x08080808);
+        extra_ctx[7] = MaybeUninit::new(0x09090909);
+        extra_ctx[8] = MaybeUninit::new(0x10101010);
+        extra_ctx[9] = MaybeUninit::new(0x11111111);
+
         let task_state = &task.port_task_state;
         unsafe { *task_state.sp.get() = sp as _ };
     }

src/constance_port_arm_m_test_driver/.cargo/config.toml

@@ -17,3 +17,18 @@ rustflags = [
 rustflags = [
   "-C", "link-arg=-Tlink.x",
 ]
+
+[target.thumbv8m.base-none-eabi]
+rustflags = [
+  "-C", "link-arg=-Tlink.x",
+]
+
+[target.thumbv8m.main-none-eabi]
+rustflags = [
+  "-C", "link-arg=-Tlink.x",
+]
+
+[target.thumbv8m.main-none-eabihf]
+rustflags = [
+  "-C", "link-arg=-Tlink.x",
+]

src/constance_port_arm_m_test_runner/src/targets.rs

@@ -47,14 +47,45 @@ pub static TARGETS: &[(&str, &dyn Target)] = &[
         "qemu_mps2_an385_v6m",
         &OverrideTargetTriple("thumbv6m-none-eabi", QemuMps2An385),
     ),
+    (
+        "qemu_mps2_an505",
+        &OverrideTargetTriple("thumbv8m.main-none-eabihf", QemuMps2An505),
+    ),
+    (
+        "qemu_mps2_an505_v8mml",
+        &OverrideTargetTriple("thumbv8m.main-none-eabi", QemuMps2An505),
+    ),
+    (
+        "qemu_mps2_an505_v8mbl",
+        &OverrideTargetTriple("thumbv8m.base-none-eabi", QemuMps2An505),
+    ),
+    (
+        "qemu_mps2_an505_v7em_hf",
+        &OverrideTargetTriple("thumbv7em-none-eabihf", QemuMps2An505),
+    ),
+    (
+        "qemu_mps2_an505_v7m_hf",
+        &OverrideTargetTriple("thumbv7m-none-eabihf", QemuMps2An505),
+    ),
+    (
+        "qemu_mps2_an505_v7em",
+        &OverrideTargetTriple("thumbv7em-none-eabi", QemuMps2An505),
+    ),
+    (
+        "qemu_mps2_an505_v7m",
+        &OverrideTargetTriple("thumbv7m-none-eabi", QemuMps2An505),
+    ),
+    (
+        "qemu_mps2_an505_v6m",
+        &OverrideTargetTriple("thumbv6m-none-eabi", QemuMps2An505),
+    ),
 ];
 
 pub struct NucleoF401re;
 
 impl Target for NucleoF401re {
     fn target_triple(&self) -> &str {
-        // TODO: use `eabihf` when FPU is supported by the Arm-M port
-        "thumbv7em-none-eabi"
+        "thumbv7em-none-eabihf"
     }
 
     fn cargo_features(&self) -> &[&str] {
@@ -125,7 +156,50 @@ impl Target for QemuMps2An385 {
     fn connect(
         &self,
     ) -> Pin<Box<dyn Future<Output = Result<Box<dyn DebugProbe>, Box<dyn Error + Send>>>>> {
-        Box::pin(async { Ok(Box::new(qemu::QemuDebugProbe::new()) as Box<dyn DebugProbe>) })
+        Box::pin(async {
+            Ok(
+                Box::new(qemu::QemuDebugProbe::new(&["-machine", "mps2-an385"]))
+                    as Box<dyn DebugProbe>,
+            )
+        })
+    }
+}
+
+pub struct QemuMps2An505;
+
+impl Target for QemuMps2An505 {
+    fn target_triple(&self) -> &str {
+        "thumbv8m-none-eabihf"
+    }
+
+    fn cargo_features(&self) -> &[&str] {
+        &["output-semihosting"]
+    }
+
+    fn memory_layout_script(&self) -> String {
+        "
+            MEMORY
+            {
+              /* ZBT SRAM (SSRAM1) Secure alias */
+              FLASH : ORIGIN = 0x10000000, LENGTH = 4096k
+              /* ZBT SRAM (SSRAM2 and SSRAM3) Secure alias */
+              RAM : ORIGIN = 0x38000000, LENGTH = 4096K
+            }
+
+            _stack_start = ORIGIN(RAM) + LENGTH(RAM);
+        "
+        .to_owned()
+    }
+
+    fn connect(
+        &self,
+    ) -> Pin<Box<dyn Future<Output = Result<Box<dyn DebugProbe>, Box<dyn Error + Send>>>>> {
+        Box::pin(async {
+            Ok(
+                Box::new(qemu::QemuDebugProbe::new(&["-machine", "mps2-an505"]))
+                    as Box<dyn DebugProbe>,
+            )
+        })
     }
 }
 

src/constance_port_arm_m_test_runner/src/targets/qemu.rs

@@ -11,11 +11,13 @@ use tokio::{io::AsyncRead, process::Child};
 use super::{DebugProbe, DynAsyncRead};
 use crate::subprocess;
 
-pub(super) struct QemuDebugProbe {}
+pub(super) struct QemuDebugProbe {
+    qemu_args: &'static [&'static str],
+}
 
 impl QemuDebugProbe {
-    pub(super) fn new() -> Self {
-        Self {}
+    pub(super) fn new(qemu_args: &'static [&'static str]) -> Self {
+        Self { qemu_args }
     }
 }
 
@@ -27,9 +29,8 @@ impl DebugProbe for QemuDebugProbe {
         let result = subprocess::CmdBuilder::new("qemu-system-arm")
             .arg("-kernel")
             .arg(exe)
+            .args(self.qemu_args)
             .args(&[
-                "-machine",
-                "mps2-an385",
                 "-nographic",
                 "-d",
                 "guest_errors",