@@ -1384,10 +1384,12 @@ static void cqspi_controller_init(struct cqspi_st *cqspi)
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writel (cqspi -> fifo_depth * cqspi -> fifo_width / 8 ,
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cqspi -> iobase + CQSPI_REG_INDIRECTWRWATERMARK );
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- /* Enable Direct Access Controller */
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- reg = readl (cqspi -> iobase + CQSPI_REG_CONFIG );
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- reg |= CQSPI_REG_CONFIG_ENB_DIR_ACC_CTRL ;
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- writel (reg , cqspi -> iobase + CQSPI_REG_CONFIG );
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+ /* Disable direct access controller */
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+ if (!cqspi -> use_direct_mode ) {
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+ reg = readl (cqspi -> iobase + CQSPI_REG_CONFIG );
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+ reg &= ~CQSPI_REG_CONFIG_ENB_DIR_ACC_CTRL ;
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+ writel (reg , cqspi -> iobase + CQSPI_REG_CONFIG );
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+ }
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cqspi_controller_enable (cqspi , 1 );
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}
@@ -1675,6 +1677,10 @@ static const struct cqspi_driver_platdata am654_ospi = {
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.quirks = CQSPI_NEEDS_WR_DELAY ,
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};
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+ static const struct cqspi_driver_platdata intel_lgm_qspi = {
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+ .quirks = CQSPI_DISABLE_DAC_MODE ,
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+ };
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+
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static const struct of_device_id cqspi_dt_ids [] = {
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{
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.compatible = "cdns,qspi-nor" ,
@@ -1690,6 +1696,7 @@ static const struct of_device_id cqspi_dt_ids[] = {
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},
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{
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.compatible = "intel,lgm-qspi" ,
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+ .data = & intel_lgm_qspi ,
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},
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{ /* end of table */ }
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};
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