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Anshuman Khandualmpe
Anshuman Khandual
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powerpc/ptrace: Enable NT_PPC_TM_CTAR, NT_PPC_TM_CPPR, NT_PPC_TM_CDSCR
This patch enables support for all three TM checkpointed SPR states related ELF core note NT_PPC_TM_CTAR, NT_PPC_TM_CPPR, NT_PPC_TM_CDSCR based ptrace requests through PTRACE_GETREGSET, PTRACE_SETREGSET calls. This is achieved through adding three new register sets REGSET_TM_CTAR, REGSET_TM_CPPR and REGSET_TM_CDSCR in powerpc corresponding to the ELF core note sections added. It implements the get, set and active functions for all these new register sets added. Signed-off-by: Anshuman Khandual <[email protected]> Signed-off-by: Simon Guo <[email protected]> Signed-off-by: Michael Ellerman <[email protected]>
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arch/powerpc/kernel/ptrace.c

Lines changed: 178 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1542,6 +1542,151 @@ static int tm_spr_set(struct task_struct *target,
15421542
2 * sizeof(u64), 3 * sizeof(u64));
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return ret;
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}
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static int tm_tar_active(struct task_struct *target,
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const struct user_regset *regset)
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{
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if (!cpu_has_feature(CPU_FTR_TM))
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return -ENODEV;
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1552+
if (MSR_TM_ACTIVE(target->thread.regs->msr))
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return regset->n;
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return 0;
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}
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static int tm_tar_get(struct task_struct *target,
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const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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void *kbuf, void __user *ubuf)
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{
1563+
int ret;
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if (!cpu_has_feature(CPU_FTR_TM))
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return -ENODEV;
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if (!MSR_TM_ACTIVE(target->thread.regs->msr))
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return -ENODATA;
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ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
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&target->thread.tm_tar, 0, sizeof(u64));
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return ret;
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}
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static int tm_tar_set(struct task_struct *target,
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const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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const void *kbuf, const void __user *ubuf)
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{
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int ret;
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if (!cpu_has_feature(CPU_FTR_TM))
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return -ENODEV;
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1586+
if (!MSR_TM_ACTIVE(target->thread.regs->msr))
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return -ENODATA;
1588+
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ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
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&target->thread.tm_tar, 0, sizeof(u64));
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return ret;
1592+
}
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static int tm_ppr_active(struct task_struct *target,
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const struct user_regset *regset)
1596+
{
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if (!cpu_has_feature(CPU_FTR_TM))
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return -ENODEV;
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1600+
if (MSR_TM_ACTIVE(target->thread.regs->msr))
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return regset->n;
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return 0;
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}
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static int tm_ppr_get(struct task_struct *target,
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const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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void *kbuf, void __user *ubuf)
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{
1612+
int ret;
1613+
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if (!cpu_has_feature(CPU_FTR_TM))
1615+
return -ENODEV;
1616+
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if (!MSR_TM_ACTIVE(target->thread.regs->msr))
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return -ENODATA;
1619+
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ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1621+
&target->thread.tm_ppr, 0, sizeof(u64));
1622+
return ret;
1623+
}
1624+
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static int tm_ppr_set(struct task_struct *target,
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const struct user_regset *regset,
1627+
unsigned int pos, unsigned int count,
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const void *kbuf, const void __user *ubuf)
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{
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int ret;
1631+
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if (!cpu_has_feature(CPU_FTR_TM))
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return -ENODEV;
1634+
1635+
if (!MSR_TM_ACTIVE(target->thread.regs->msr))
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return -ENODATA;
1637+
1638+
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1639+
&target->thread.tm_ppr, 0, sizeof(u64));
1640+
return ret;
1641+
}
1642+
1643+
static int tm_dscr_active(struct task_struct *target,
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const struct user_regset *regset)
1645+
{
1646+
if (!cpu_has_feature(CPU_FTR_TM))
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return -ENODEV;
1648+
1649+
if (MSR_TM_ACTIVE(target->thread.regs->msr))
1650+
return regset->n;
1651+
1652+
return 0;
1653+
}
1654+
1655+
static int tm_dscr_get(struct task_struct *target,
1656+
const struct user_regset *regset,
1657+
unsigned int pos, unsigned int count,
1658+
void *kbuf, void __user *ubuf)
1659+
{
1660+
int ret;
1661+
1662+
if (!cpu_has_feature(CPU_FTR_TM))
1663+
return -ENODEV;
1664+
1665+
if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1666+
return -ENODATA;
1667+
1668+
ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1669+
&target->thread.tm_dscr, 0, sizeof(u64));
1670+
return ret;
1671+
}
1672+
1673+
static int tm_dscr_set(struct task_struct *target,
1674+
const struct user_regset *regset,
1675+
unsigned int pos, unsigned int count,
1676+
const void *kbuf, const void __user *ubuf)
1677+
{
1678+
int ret;
1679+
1680+
if (!cpu_has_feature(CPU_FTR_TM))
1681+
return -ENODEV;
1682+
1683+
if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1684+
return -ENODATA;
1685+
1686+
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1687+
&target->thread.tm_dscr, 0, sizeof(u64));
1688+
return ret;
1689+
}
15451690
#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
15461691

15471692
/*
@@ -1565,6 +1710,9 @@ enum powerpc_regset {
15651710
REGSET_TM_CVMX, /* TM checkpointed VMX registers */
15661711
REGSET_TM_CVSX, /* TM checkpointed VSX registers */
15671712
REGSET_TM_SPR, /* TM specific SPR registers */
1713+
REGSET_TM_CTAR, /* TM checkpointed TAR register */
1714+
REGSET_TM_CPPR, /* TM checkpointed PPR register */
1715+
REGSET_TM_CDSCR, /* TM checkpointed DSCR register */
15681716
#endif
15691717
};
15701718

@@ -1626,6 +1774,21 @@ static const struct user_regset native_regsets[] = {
16261774
.size = sizeof(u64), .align = sizeof(u64),
16271775
.active = tm_spr_active, .get = tm_spr_get, .set = tm_spr_set
16281776
},
1777+
[REGSET_TM_CTAR] = {
1778+
.core_note_type = NT_PPC_TM_CTAR, .n = 1,
1779+
.size = sizeof(u64), .align = sizeof(u64),
1780+
.active = tm_tar_active, .get = tm_tar_get, .set = tm_tar_set
1781+
},
1782+
[REGSET_TM_CPPR] = {
1783+
.core_note_type = NT_PPC_TM_CPPR, .n = 1,
1784+
.size = sizeof(u64), .align = sizeof(u64),
1785+
.active = tm_ppr_active, .get = tm_ppr_get, .set = tm_ppr_set
1786+
},
1787+
[REGSET_TM_CDSCR] = {
1788+
.core_note_type = NT_PPC_TM_CDSCR, .n = 1,
1789+
.size = sizeof(u64), .align = sizeof(u64),
1790+
.active = tm_dscr_active, .get = tm_dscr_get, .set = tm_dscr_set
1791+
},
16291792
#endif
16301793
};
16311794

@@ -1878,6 +2041,21 @@ static const struct user_regset compat_regsets[] = {
18782041
.size = sizeof(u64), .align = sizeof(u64),
18792042
.active = tm_spr_active, .get = tm_spr_get, .set = tm_spr_set
18802043
},
2044+
[REGSET_TM_CTAR] = {
2045+
.core_note_type = NT_PPC_TM_CTAR, .n = 1,
2046+
.size = sizeof(u64), .align = sizeof(u64),
2047+
.active = tm_tar_active, .get = tm_tar_get, .set = tm_tar_set
2048+
},
2049+
[REGSET_TM_CPPR] = {
2050+
.core_note_type = NT_PPC_TM_CPPR, .n = 1,
2051+
.size = sizeof(u64), .align = sizeof(u64),
2052+
.active = tm_ppr_active, .get = tm_ppr_get, .set = tm_ppr_set
2053+
},
2054+
[REGSET_TM_CDSCR] = {
2055+
.core_note_type = NT_PPC_TM_CDSCR, .n = 1,
2056+
.size = sizeof(u64), .align = sizeof(u64),
2057+
.active = tm_dscr_active, .get = tm_dscr_get, .set = tm_dscr_set
2058+
},
18812059
#endif
18822060
};
18832061

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