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17 | 17 | #include <linux/dma-mapping.h>
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18 | 18 | #include <linux/io.h>
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19 | 19 | #include <linux/module.h>
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| 20 | +#include <linux/of.h> |
20 | 21 | #include <linux/of_platform.h>
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21 | 22 | #include <linux/platform_device.h>
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22 | 23 | #include <linux/sched/clock.h>
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23 | 24 | #include <linux/reset.h>
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24 | 25 |
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25 | 26 | #include <drm/drm_drv.h>
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26 | 27 | #include <drm/drm_managed.h>
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| 28 | + |
| 29 | +#include <soc/bcm2835/raspberrypi-firmware.h> |
| 30 | + |
27 | 31 | #include <uapi/drm/v3d_drm.h>
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28 | 32 |
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29 | 33 | #include "v3d_drv.h"
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@@ -273,6 +277,8 @@ map_regs(struct v3d_dev *v3d, void __iomem **regs, const char *name)
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273 | 277 | static int v3d_platform_drm_probe(struct platform_device *pdev)
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274 | 278 | {
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275 | 279 | struct device *dev = &pdev->dev;
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| 280 | + struct rpi_firmware *firmware; |
| 281 | + struct device_node *node; |
276 | 282 | struct drm_device *drm;
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277 | 283 | struct v3d_dev *v3d;
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278 | 284 | int ret;
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@@ -337,7 +343,20 @@ static int v3d_platform_drm_probe(struct platform_device *pdev)
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337 | 343 | dev_err(dev, "Failed to get clock (%ld)\n", PTR_ERR(v3d->clk));
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338 | 344 | return PTR_ERR(v3d->clk);
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339 | 345 | }
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340 |
| - v3d->clk_up_rate = clk_get_rate(v3d->clk); |
| 346 | + |
| 347 | + node = rpi_firmware_find_node(); |
| 348 | + if (!node) |
| 349 | + return -EINVAL; |
| 350 | + |
| 351 | + firmware = rpi_firmware_get(node); |
| 352 | + of_node_put(node); |
| 353 | + if (!firmware) |
| 354 | + return -EPROBE_DEFER; |
| 355 | + |
| 356 | + v3d->clk_up_rate = rpi_firmware_clk_get_max_rate(firmware, |
| 357 | + RPI_FIRMWARE_V3D_CLK_ID); |
| 358 | + rpi_firmware_put(firmware); |
| 359 | + |
341 | 360 | /* For downclocking, drop it to the minimum frequency we can get from
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342 | 361 | * the CPRMAN clock generator dividing off our parent. The divider is
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343 | 362 | * 4 bits, but ask for just higher than that so that rounding doesn't
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@@ -374,7 +393,7 @@ static int v3d_platform_drm_probe(struct platform_device *pdev)
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374 | 393 | ret = v3d_sysfs_init(dev);
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375 | 394 | if (ret)
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376 | 395 | goto drm_unregister;
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377 |
| - ret = clk_set_rate(v3d->clk, v3d->clk_down_rate); |
| 396 | + ret = clk_set_min_rate(v3d->clk, v3d->clk_down_rate); |
378 | 397 | WARN_ON_ONCE(ret != 0);
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379 | 398 |
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380 | 399 | return 0;
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