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scanvideo.c
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/*
* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <stdlib.h>
#include <stdio.h>
#include "pico.h"
GCC_Pragma("GCC push_options")
#if !PICO_SCANVIDEO_DEBUG_IMPL
#undef PARAM_ASSERTIONS_DISABLE_ALL
#define PARAM_ASSERTIONS_DISABLE_ALL 1
GCC_Pragma("GCC optimize(\"O3\")")
#endif
#include "pico/sem.h"
#include "pico/util/buffer.h"
#include "hardware/clocks.h"
#include "hardware/dma.h"
#include "hardware/gpio.h"
#include "hardware/pio.h"
#include "hardware/irq.h"
#include "timing.pio.h"
#include "pico/scanvideo.h"
#include "pico/scanvideo/composable_scanline.h"
#include "hardware/structs/bus_ctrl.h"
#include "pico/binary_info.h"
#if PICO_SCANVIDEO_PLANE_COUNT > 3
#error only up to 3 planes supported
#endif
// PICO_CONFIG: PICO_SCANVIDEO_ENABLE_VIDEO_RECOVERY, Enable/disable video recovery,type=bool, default=1, group=video
#ifndef PICO_SCANVIDEO_ENABLE_VIDEO_RECOVERY
#define PICO_SCANVIDEO_ENABLE_VIDEO_RECOVERY 1
#endif
// PICO_CONFIG: PICO_SCANVIDEO_ADJUST_BUS_PRIORITY, Enable/disable adjust bus priority, type=bool, default=0, group=video
#ifndef PICO_SCANVIDEO_ADJUST_BUS_PRIORITY
#define PICO_SCANVIDEO_ADJUST_BUS_PRIORITY 0
#endif
// PICO_CONFIG: PICO_SCANVIDEO_ENABLE_SCANLINE_ASSERTIONS, Enable/disable scanline assertions, type=bool, default=0, group=video
#ifndef PICO_SCANVIDEO_ENABLE_SCANLINE_ASSERTIONS
#define PICO_SCANVIDEO_ENABLE_SCANLINE_ASSERTIONS 0
#endif
// PICO_CONFIG: PICO_SCANVIDEO_DEBUG_IMPL, Enable/disable debug implementation, type=bool, default=0, group=video
#ifndef PICO_SCANVIDEO_DEBUG_IMPL
#define PICO_SCANVIDEO_DEBUG_IMPL 0
#endif
// PICO_CONFIG: PICO_SCANVIDEO_NO_DMA_TRACKING, Enable/disable DMA tracking, type=bool, default=0, group=video
#ifndef PICO_SCANVIDEO_NO_DMA_TRACKING
#define PICO_SCANVIDEO_NO_DMA_TRACKING 0
#endif
#define PICO_SCANVIDEO_SCANLINE_SM 0u
#define PICO_SCANVIDEO_SCANLINE_DMA_CHANNEL 0u
// PICO_CONFIG: PICO_SCANVIDEO_PLANE1_FRAGMENT_DMA, Enable/disable plane 1 DMA fragments, type=bool, default=0, group=video
#ifndef PICO_SCANVIDEO_PLANE1_FRAGMENT_DMA
#define PICO_SCANVIDEO_PLANE1_FRAGMENT_DMA 0
#endif
#if PICO_SCANVIDEO_PLANE1_FRAGMENT_DMA
#define PICO_SCANVIDEO_SCANLINE_DMA_CB_CHANNEL 3u
#endif
#define PICO_SCANVIDEO_TIMING_SM 3u
#if PICO_SCANVIDEO_PLANE_COUNT > 1
#define PICO_SCANVIDEO_SCANLINE_SM2 1u
#define PICO_SCANVIDEO_SCANLINE_DMA_CHANNEL2 1u
// PICO_CONFIG: PICO_SCANVIDEO_PLANE2_FRAGMENT_DMA, Enable/disable plane 2 DMA fragments, type=bool, default=0, group=video
#ifndef PICO_SCANVIDEO_PLANE2_FRAGMENT_DMA
#define PICO_SCANVIDEO_PLANE2_FRAGMENT_DMA 0
#endif
#if PICO_SCANVIDEO_PLANE2_FRAGMENT_DMA
#define PICO_SCANVIDEO_SCANLINE_DMA_CB_CHANNEL2 4u
#endif
#if PICO_SCANVIDEO_PLANE_COUNT > 2
#define PICO_SCANVIDEO_SCANLINE_SM3 2u
#define PICO_SCANVIDEO_SCANLINE_DMA_CHANNEL3 2u
#define PICO_SCANVIDEO_SCANLINE_DMA_CHANNELS_MASK ((1u << PICO_SCANVIDEO_SCANLINE_DMA_CHANNEL) | ( 1u << PICO_SCANVIDEO_SCANLINE_DMA_CHANNEL2) | ( 1u << PICO_SCANVIDEO_SCANLINE_DMA_CHANNEL3))
#else
#define PICO_SCANVIDEO_SCANLINE_DMA_CHANNELS_MASK ((1u << PICO_SCANVIDEO_SCANLINE_DMA_CHANNEL) | ( 1u << PICO_SCANVIDEO_SCANLINE_DMA_CHANNEL2))
#endif
#else
#define PICO_SCANVIDEO_SCANLINE_DMA_CHANNELS_MASK (1u << PICO_SCANVIDEO_SCANLINE_DMA_CHANNEL)
#endif
// todo add ability to shift scanline back a bit (we already have the timing, but it should be a post mode set adjustment)
// we can use this to allow some initial work in the scanline b4 the first pixel (e.g. a dummy black pixel)
// todo bad state recovery
// - stress test with pause/unpause
// - bad state should cause SCANLINE_ASSERTION_ERROR
// - possible orphaned in_use - perhaps clean up when error state is detected
// - if PIO is not in the right place, pause/clear FIFO join-unjoin/jmp/resume
// - dma may need to be cancelled
// todo dma chaining support
// == DEBUGGING =========
// note that this is very very important if you see things going wrong with the display,
// however beware, because it will also cause visual artifiacts if we are pushing the edge of the envelope
// since it itself uses cycles that are in short supply! This is why it is off by default
//
// todo note, it should eventually be difficult to get the display into a bad state (even
// with things like runaway scanline program; incomplete DMA etc.. which currently break it).
CU_REGISTER_DEBUG_PINS(video_timing, video_dma_buffer, video_irq, video_dma_completion, video_generation,
video_recovery, video_in_use, video_link)
// ---- select at most one ---
//CU_SELECT_DEBUG_PINS(video_recovery)
//CU_SELECT_DEBUG_PINS(video_generation)
//CU_SELECT_DEBUG_PINS(video_in_use)
//CU_SELECT_DEBUG_PINS(scanvideo_timing)
//CU_SELECT_DEBUG_PINS(video_irq)
//CU_SELECT_DEBUG_PINS(video_dma_buffer)
//CU_SELECT_DEBUG_PINS(video_dma_completion)
//CU_SELECT_DEBUG_PINS(video_link)
// ======================
#define GENERATING_LIST 1
//#define PICO_SCANVIDEO_ENABLE_SCANLINE_ASSERTIONS 1
#if PICO_SCANVIDEO_ENABLE_SCANLINE_ASSERTIONS
// we want some sort of assertion even in release builds
#ifndef NDEBUG
#define scanline_assert(x) assert(x)
#else
#define scanline_assert(x) hard_assert(x)
#endif
#else
#define scanline_assert(x) (void)0
#endif
#define video_pio pio0
#if PICO_SCANVIDEO_ADJUST_BUS_PRIORITY
#define VIDEO_ADJUST_BUS_PRIORITY_VAL (BUSCTRL_BUS_PRIORITY_PROC0_BITS | BUSCTRL_BUS_PRIORITY_PROC1_BITS)
#endif
#ifdef VIDEO_MOST_TIME_CRITICAL_CODE_SECTION
#define __video_most_time_critical_func(x) __attribute__((section(__XSTRING(VIDEO_MOST_TIME_CRITICAL_CODE_SECTION) "." x))) x
#else
#define __video_most_time_critical_func(x) __not_in_flash_func(x)
#endif
#ifdef VIDEO_TIME_CRITICAL_CODE_SECTION
#define __video_time_critical_func(x) __attribute__((section(__XSTRING(VIDEO_TIME_CRITICAL_CODE_SECTION) "." x))) x
#else
#define __video_time_critical_func(x) __not_in_flash_func(x)
#endif
// --- video_24mhz_composable ---
#define video_24mhz_composable_program __CONCAT(video_24mhz_composable_prefix, _program)
#define video_24mhz_composable_wrap_target __CONCAT(video_24mhz_composable_prefix, _wrap_target)
#define video_24mhz_composable_wrap __CONCAT(video_24mhz_composable_prefix, _wrap)
bool video_24mhz_composable_adapt_for_mode(const scanvideo_pio_program_t *program, const scanvideo_mode_t *mode,
scanvideo_scanline_buffer_t *missing_scanline_buffer,
uint16_t *modifiable_instructions);
pio_sm_config video_24mhz_composable_configure_pio(pio_hw_t *pio, uint sm, uint offset);
const scanvideo_pio_program_t video_24mhz_composable = {
.program = &video_24mhz_composable_program,
.entry_point = video_24mhz_composable_program_extern(entry_point),
.adapt_for_mode = video_24mhz_composable_adapt_for_mode,
.configure_pio = video_24mhz_composable_configure_pio
};
#define PIO_WAIT_IRQ4 pio_encode_wait_irq(1, false, 4)
static uint8_t video_htiming_load_offset;
static uint8_t video_program_load_offset;
// --- video timing stuff
// 4 possible instructions; index into program below
enum {
SET_IRQ_0 = 0u,
SET_IRQ_1 = 1u,
SET_IRQ_SCANLINE = 2u,
CLEAR_IRQ_SCANLINE = 3u,
};
static struct {
int32_t v_active;
int32_t v_total;
int32_t v_pulse_start;
int32_t v_pulse_end;
// todo replace with plain polarity
uint32_t vsync_bits_pulse;
uint32_t vsync_bits_no_pulse;
uint32_t a, a_vblank, b1, b2, c, c_vblank;
uint32_t vsync_bits;
uint16_t dma_state_index;
int32_t timing_scanline;
} timing_state;
#define DMA_STATE_COUNT 4
static uint32_t dma_states[DMA_STATE_COUNT];
// todo get rid of this altogether
#undef PICO_SCANVIDEO_ENABLE_VIDEO_CLOCK_DOWN
#define PICO_SCANVIDEO_ENABLE_VIDEO_CLOCK_DOWN 1
#if PICO_SCANVIDEO_ENABLE_VIDEO_CLOCK_DOWN
static uint16_t video_clock_down_times_2;
#endif
semaphore_t vblank_begin;
// --- scanline stuff
// private representation of scanline buffer (adds link for one list this scanline buffer is currently in)
typedef struct full_scanline_buffer {
scanvideo_scanline_buffer_t core;
struct full_scanline_buffer *next;
} full_scanline_buffer_t;
// each scanline_buffer should be in exactly one of the shared_state lists below
// (unless we don't have USE_SCANLINE_DEBUG in which case we don't keep the generating list,
// in which case the scanline is entirely trusted to the client when generating)
full_scanline_buffer_t scanline_buffers[PICO_SCANVIDEO_SCANLINE_BUFFER_COUNT];
// This state is sensitive as it it accessed by either core, and multiple IRQ handlers which may be re-entrant
// Nothing in here should be touched except when protected by the appropriate spin lock.
//
// The separations by spin lock (other than the need for spin locks to protect state consistency) is to allow
// safe concurrent operation by both cores, client, IRQ and nested IRQ (pre-emption) where desirable due
// to timing concerns.
static struct {
struct {
spin_lock_t *lock;
// note in_use is a list as we are lazy in removing buffers from it
full_scanline_buffer_t *in_use_ascending_scanline_id_list;
// pointer to the tail element of the list for making appending by ascending scanline id quick
full_scanline_buffer_t *in_use_ascending_scanline_id_list_tail;
} in_use;
struct {
spin_lock_t *lock;
full_scanline_buffer_t *current_scanline_buffer;
uint32_t last_scanline_id;
uint32_t next_scanline_id;
// 0 based index of y repeat... goes 0, 0, 0 in non scaled mode, 0, 1, 0, 1 in doubled etc.
uint16_t y_repeat_index;
uint16_t y_repeat_target;
bool in_vblank;
// This generated list is in this struct because it is accessed together in fsb latching
// and the only other place it is used in scanvideo_end_scanline_generation which needs no other
// locks (i.e. we are saving an extra lock in the latch case by not placing in a separate struct)
full_scanline_buffer_t *generated_ascending_scanline_id_list;
full_scanline_buffer_t *generated_ascending_scanline_id_list_tail;
#if PICO_SCANVIDEO_ENABLE_SCANLINE_ASSERTIONS && GENERATING_LIST
full_scanline_buffer_t *generating_list;
#endif
} scanline;
struct {
spin_lock_t *lock;
full_scanline_buffer_t *free_list;
} free_list;
// This is access by DMA IRQ and by SM IRQs
struct {
spin_lock_t *lock;
#if !PICO_SCANVIDEO_NO_DMA_TRACKING
// bit mask of completed DMA scanline channels
uint32_t dma_completion_state;
#endif
// number of buffers to release (may be multiple due to interrupt pre-emption)
// todo combine these two fields
uint8_t buffers_to_release;
bool scanline_in_progress;
} dma;
// these are not updated, so not locked
#if PICO_SCANVIDEO_ENABLE_VIDEO_RECOVERY
int scanline_program_wait_index;
#endif
} shared_state;
// PICO_CONFIG: PICO_SCANVIDEO_MISSING_SCANLINE_COLOR, Define colour used for missing scanlines, default=PICO_SVIDEO_PIXEL_FROM_RGB8(0,0,255), group=video
#ifndef PICO_SCANVIDEO_MISSING_SCANLINE_COLOR
#define PICO_SCANVIDEO_MISSING_SCANLINE_COLOR PICO_SCANVIDEO_PIXEL_FROM_RGB8(0,0,255)
#endif
static uint32_t _missing_scanline_data[] =
{
COMPOSABLE_COLOR_RUN | (PICO_SCANVIDEO_MISSING_SCANLINE_COLOR << 16u),
/*width-3*/ 0u | (COMPOSABLE_RAW_1P << 16u),
0u | (COMPOSABLE_EOL_ALIGN << 16u)
};
#if PICO_SCANVIDEO_PLANE1_VARIABLE_FRAGMENT_DMA || PICO_SCANVIDEO_PLANE2_VARIABLE_FRAGMENT_DMA
static uint32_t variable_fragment_missing_scanline_data_chain[] = {
count_of(_missing_scanline_data),
0, // missing_scanline_data,
0,
0,
};
#endif
#if PICO_SCANVIDEO_PLANE1_FIXED_FRAGMENT_DMA || PICO_SCANVIDEO_PLANE2_FIXED_FRAGMENT_DMA
static uint32_t fixed_fragment_missing_scanline_data_chain[] = {
0, // missing_scanline_data,
0,
};
#endif
#if PICO_SCANVIDEO_PLANE_COUNT > 1
uint32_t missing_scanline_data_overlay[] = {
// blank line
0u | (COMPOSABLE_EOL_ALIGN << 16u)
};
#endif
static full_scanline_buffer_t _missing_scanline_buffer;
static inline bool is_scanline_after(uint32_t scanline_id1, uint32_t scanline_id2) {
return ((int32_t) (scanline_id1 - scanline_id2)) > 0;
}
static void prepare_for_active_scanline_irqs_enabled();
static void scanline_dma_complete_irqs_enabled();
static void setup_sm(int sm, uint offset);
// -- MISC stuff
static scanvideo_mode_t video_mode;
static bool video_timing_enabled = false;
static bool display_enabled = true;
static scanvideo_scanline_repeat_count_fn _scanline_repeat_count_fn;
#if PICO_SCANVIDEO_SCANLINE_RELEASE_FUNCTION
static scanvideo_scanline_release_fn _scanline_release_fn;
#endif
inline static void list_prepend(full_scanline_buffer_t **phead, full_scanline_buffer_t *fsb) {
scanline_assert(fsb);
scanline_assert(fsb->next == NULL);
scanline_assert(fsb != *phead);
fsb->next = *phead;
*phead = fsb;
}
inline static void list_prepend_all(full_scanline_buffer_t **phead, full_scanline_buffer_t *to_prepend) {
full_scanline_buffer_t *fsb = to_prepend;
// todo should this be assumed?
if (fsb) {
while (fsb->next) {
fsb = fsb->next;
}
fsb->next = *phead;
*phead = to_prepend;
}
}
inline static full_scanline_buffer_t *list_remove_head(full_scanline_buffer_t **phead) {
full_scanline_buffer_t *fsb = *phead;
if (fsb) {
*phead = fsb->next;
fsb->next = NULL;
}
return fsb;
}
inline static full_scanline_buffer_t *list_remove_head_ascending(full_scanline_buffer_t **phead,
full_scanline_buffer_t **ptail) {
full_scanline_buffer_t *fsb = *phead;
if (fsb) {
scanline_assert(*ptail);
*phead = fsb->next;
if (!fsb->next) {
scanline_assert(*ptail == fsb);
*ptail = NULL;
} else {
fsb->next = NULL;
}
}
return fsb;
}
inline static void list_remove(full_scanline_buffer_t **phead, full_scanline_buffer_t *fsb) {
scanline_assert(*phead);
full_scanline_buffer_t *prev = *phead;
if (prev == fsb) {
*phead = fsb->next;
} else {
while (prev->next && prev->next != fsb) {
prev = prev->next;
}
scanline_assert(prev->next == fsb);
prev->next = fsb->next;
}
// todo do we need this without assertions?
fsb->next = NULL;
}
static inline uint32_t scanline_id_after(uint32_t scanline_id) {
uint32_t tmp = scanline_id & 0xffffu;
if (tmp < video_mode.height - 1) {
return scanline_id + 1;
} else {
return scanline_id + 0x10000u - tmp;
}
}
// todo add a tail for these already sorted lists as we generally insert on the end
inline static void list_insert_ascending(full_scanline_buffer_t **phead, full_scanline_buffer_t **ptail,
full_scanline_buffer_t *fsb) {
scanline_assert(fsb->next == NULL);
scanline_assert(fsb != *phead);
scanline_assert(fsb != *ptail);
if (!*phead || !is_scanline_after(fsb->core.scanline_id, (*phead)->core.scanline_id)) {
if (!*phead) {
scanline_assert(!*ptail);
*ptail = fsb;
}
// insert at the beginning
list_prepend(phead, fsb);
} else {
if (is_scanline_after(fsb->core.scanline_id, (*ptail)->core.scanline_id)) {
// insert at end
(*ptail)->next = fsb;
*ptail = fsb;
} else {
// not after
full_scanline_buffer_t *prev = *phead;
while (prev->next && is_scanline_after(fsb->core.scanline_id, prev->next->core.scanline_id)) {
prev = prev->next;
}
scanline_assert(prev != *ptail); // we should have already inserted at the end in this case
fsb->next = prev->next;
prev->next = fsb;
}
}
}
inline static void free_local_free_list_irqs_enabled(full_scanline_buffer_t *local_free_list) {
if (local_free_list) {
uint32_t save = spin_lock_blocking(shared_state.free_list.lock);
DEBUG_PINS_SET(video_timing, 4);
list_prepend_all(&shared_state.free_list.free_list, local_free_list);
DEBUG_PINS_CLR(video_timing, 4);
spin_unlock(shared_state.free_list.lock, save);
// note also this is useful for triggering scanvideo_wait_for_scanline_complete check
__sev();
#if PICO_SCANVIDEO_SCANLINE_RELEASE_FUNCTION
if (_scanline_release_fn) _scanline_release_fn();
#endif
}
}
// Caller must own scanline_state_spin_lock
inline static full_scanline_buffer_t *scanline_locked_try_latch_fsb_if_null_irqs_disabled(
full_scanline_buffer_t **local_free_list) {
// note this just checks that someone owns it not necessarily this core.
scanline_assert(is_spin_locked(shared_state.scanline.lock));
full_scanline_buffer_t *fsb = shared_state.scanline.current_scanline_buffer;
if (!fsb) {
// peek the head
while (NULL != (fsb = shared_state.scanline.generated_ascending_scanline_id_list)) {
if (!is_scanline_after(shared_state.scanline.next_scanline_id, fsb->core.scanline_id)) {
if (shared_state.scanline.next_scanline_id == fsb->core.scanline_id) {
full_scanline_buffer_t __unused *dbg = list_remove_head_ascending(
&shared_state.scanline.generated_ascending_scanline_id_list,
&shared_state.scanline.generated_ascending_scanline_id_list_tail);
scanline_assert(dbg == fsb);
spin_lock_unsafe_blocking(shared_state.in_use.lock);
DEBUG_PINS_SET(video_timing, 2);
DEBUG_PINS_XOR(video_in_use, 1);
list_insert_ascending(&shared_state.in_use.in_use_ascending_scanline_id_list,
&shared_state.in_use.in_use_ascending_scanline_id_list_tail, fsb);
DEBUG_PINS_CLR(video_timing, 2);
spin_unlock_unsafe(shared_state.in_use.lock);
shared_state.scanline.current_scanline_buffer = fsb;
} else {
fsb = NULL;
}
break;
} else {
// scanline is in the past
full_scanline_buffer_t __unused *dbg = list_remove_head_ascending(
&shared_state.scanline.generated_ascending_scanline_id_list,
&shared_state.scanline.generated_ascending_scanline_id_list_tail);
scanline_assert(dbg == fsb);
list_prepend(local_free_list, fsb);
#if PICO_SCANVIDEO_LINKED_SCANLINE_BUFFERS
full_scanline_buffer_t *fsb2;
while(NULL != (fsb2 = (full_scanline_buffer_t *)fsb->core.link)) {
fsb->core.link = NULL;
DEBUG_PINS_SET(video_link, 2);
list_prepend(local_free_list, fsb2);
DEBUG_PINS_CLR(video_link, 2);
fsb = fsb2;
}
#endif
}
}
}
return fsb;
}
static inline void release_scanline_irqs_enabled(int buffers_to_free_count,
full_scanline_buffer_t **local_free_list) {
if (buffers_to_free_count) {
uint32_t save = spin_lock_blocking(shared_state.in_use.lock);
while (buffers_to_free_count--) {
DEBUG_PINS_SET(video_dma_buffer, 2);
// We always discard the head which is the oldest
DEBUG_PINS_XOR(video_in_use, 2);
full_scanline_buffer_t *fsb = list_remove_head_ascending(
&shared_state.in_use.in_use_ascending_scanline_id_list,
&shared_state.in_use.in_use_ascending_scanline_id_list_tail);
list_prepend(local_free_list, fsb);
#if PICO_SCANVIDEO_LINKED_SCANLINE_BUFFERS
full_scanline_buffer_t *fsb2;
while(NULL != (fsb2 = (full_scanline_buffer_t *)fsb->core.link)) {
fsb->core.link = NULL;
DEBUG_PINS_SET(video_link, 2);
list_prepend(local_free_list, fsb2);
DEBUG_PINS_CLR(video_link, 2);
fsb = fsb2;
}
#endif
DEBUG_PINS_CLR(video_dma_buffer, 2);
}
spin_unlock(shared_state.in_use.lock, save);
}
}
// Note that this is not a general purpose function. It must be called by a caller
// who can guarantee that a DMA completion IRQ will not be taken during this method
static inline void abort_all_dma_channels_assuming_no_irq_preemption() {
// the reason the above requirements are in place is that the DMA controller may cause
// a completion IRQ during (or immediately the abort). There are *slower* ways to
// work around it in software, but we want to suppress the IRQ afterwards anyway, so
// as long as the spurious IRQ doesn't get taken here, then the h/w issue is of no problem
dma_hw->abort = PICO_SCANVIDEO_SCANLINE_DMA_CHANNELS_MASK;
// note that relying on the abort bits is not safe on RP2040, as it may get cleared before the spurious IRQ happens
// wait for abort(s) to complete
#if !PICO_RP2040
// fixed after RP2040
while (dma_hw->abort & PICO_SCANVIDEO_SCANLINE_DMA_CHANNELS_MASK) tight_loop_contents();
#else
while (dma_channel_is_busy(PICO_SCANVIDEO_SCANLINE_DMA_CHANNEL)) tight_loop_contents();
#if PICO_SCANVIDEO_PLANE_COUNT > 1
while (dma_channel_is_busy(PICO_SCANVIDEO_SCANLINE_DMA_CHANNEL2)) tight_loop_contents();
#if PICO_SCANVIDEO_PLANE_COUNT > 2
while (dma_channel_is_busy(PICO_SCANVIDEO_SCANLINE_DMA_CHANNEL3)) tight_loop_contents();
#endif
#endif
#endif
// we don't want any pending completion IRQ which may have happened in the interim
dma_hw->ints0 = PICO_SCANVIDEO_SCANLINE_DMA_CHANNELS_MASK;
}
static inline bool update_dma_transfer_state_irqs_enabled(bool cancel_if_not_complete,
int *scanline_buffers_to_release) {
uint32_t save = spin_lock_blocking(shared_state.dma.lock);
if (!shared_state.dma.scanline_in_progress) {
#if !PICO_SCANVIDEO_NO_DMA_TRACKING
assert(!shared_state.dma.dma_completion_state);
#endif
assert(!shared_state.dma.buffers_to_release);
spin_unlock(shared_state.dma.lock, save);
return true;
}
#if !PICO_SCANVIDEO_NO_DMA_TRACKING
uint32_t old_completed = shared_state.dma.dma_completion_state;
uint32_t new_completed;
while (0 != (new_completed = dma_hw->ints0 & PICO_SCANVIDEO_SCANLINE_DMA_CHANNELS_MASK)) {
scanline_assert(!(old_completed & new_completed));
// clear interrupt flags
dma_hw->ints0 = new_completed;
DEBUG_PINS_SET(video_dma_completion, new_completed);
DEBUG_PINS_CLR(video_dma_completion, new_completed);
new_completed |= old_completed;
if (new_completed == PICO_SCANVIDEO_SCANLINE_DMA_CHANNELS_MASK) {
// tell caller to free these buffers... note it is safe to release any outstanding ones
// as only one DMA transfer can be logically in process and we have just finished that
// if the number is > 1 this is due to IRQ / preemption (todo this comment is out of date)
*scanline_buffers_to_release = shared_state.dma.buffers_to_release;
// we have taken ownership of releasing all the current ones
shared_state.dma.buffers_to_release = 0;
if (*scanline_buffers_to_release) {
// now that ISR clearing is protected by lock and also done by the active_scanline start
// we cannot have nesting
scanline_assert(*scanline_buffers_to_release == 1);
DEBUG_PINS_SET(video_dma_completion, 1);
DEBUG_PINS_CLR(video_dma_completion, 1);
}
shared_state.dma.dma_completion_state = shared_state.dma.scanline_in_progress = 0;
spin_unlock(shared_state.dma.lock, save);
return true;
} else {
DEBUG_PINS_SET(video_dma_completion, 2);
DEBUG_PINS_CLR(video_dma_completion, 2);
shared_state.dma.dma_completion_state = old_completed = new_completed;
}
}
// can't cancel yet, note if dma_buffers_to_release = 0 then completion DID happen (todo is this ever the case)
if (cancel_if_not_complete) {
#if PICO_SCANVIDEO_ENABLE_VIDEO_RECOVERY
if (shared_state.dma.buffers_to_release) {
shared_state.dma.dma_completion_state = shared_state.dma.scanline_in_progress = 0;
*scanline_buffers_to_release = shared_state.dma.buffers_to_release;
shared_state.dma.buffers_to_release = 0;
DEBUG_PINS_XOR(video_in_use, 4);
}
// note that we guarantee no IRQ preemption because this method is always called within some
// type of video IRQ handle, and of those the DMA IRQ is the lowest priority.
abort_all_dma_channels_assuming_no_irq_preemption();
#else
panic("need VIDEO_RECOVERY");
#endif
}
spin_unlock(shared_state.dma.lock, save);
return cancel_if_not_complete;
#else
if (shared_state.dma.buffers_to_release) {
shared_state.dma.scanline_in_progress = 0;
*scanline_buffers_to_release = shared_state.dma.buffers_to_release;
shared_state.dma.buffers_to_release = 0;
// note that we guarantee no IRQ preemption because this method is always called within some
// type of video IRQ handle, and of those the DMA IRQ is the lowest priority.
abort_all_dma_channels_assuming_no_irq_preemption();
}
spin_unlock(shared_state.dma.lock, save);
return false;
#endif
}
#if !PICO_SCANVIDEO_NO_DMA_TRACKING
static inline void scanline_dma_complete_irqs_enabled() {
// The DMA interrupt may be pre-empted by SM IRQ interrupt at any point, so it is possible even in non multi plane
// that this IRQ handler is not the one that is responsible for dealing with the end of the transfer.
// In the multi plane case, there are to different DMAs to worry about which may or may not both be complete
// by the time we get here with one having completed.
DEBUG_PINS_SET(video_dma_completion, 4);
int buffers_to_free_count = 0;
bool is_completion_trigger = update_dma_transfer_state_irqs_enabled(false, &buffers_to_free_count);
full_scanline_buffer_t *local_free_list = NULL;
if (is_completion_trigger) {
uint32_t save = spin_lock_blocking(shared_state.scanline.lock);
DEBUG_PINS_SET(video_timing, 1);
// We make an early attempt to latch a scanline buffer to save time later in the PIO SM IRQ handler
// Of course there may not be a buffer ready yet, or we may have been pre-empty by the PIO SM IRQ handler
// already, in which case fsb will be non null
scanline_locked_try_latch_fsb_if_null_irqs_disabled(&local_free_list); // do an early attempt to latch
DEBUG_PINS_CLR(video_timing, 1);
spin_unlock(shared_state.scanline.lock, save);
}
// because IRQs are enabled, we may obviously be pre-empted before or between either of these
release_scanline_irqs_enabled(buffers_to_free_count, &local_free_list);
free_local_free_list_irqs_enabled(local_free_list);
DEBUG_PINS_CLR(video_dma_completion, 4);
}
#endif
static void set_next_scanline_id(uint32_t scanline_id) {
shared_state.scanline.next_scanline_id = scanline_id;
shared_state.scanline.y_repeat_target = _scanline_repeat_count_fn(scanline_id) * video_mode.yscale;
}
void __video_most_time_critical_func(prepare_for_active_scanline_irqs_enabled)() {
// note we are now only called in active display lines..
DEBUG_PINS_SET(video_timing, 1);
full_scanline_buffer_t *local_free_list = NULL;
int buffers_to_free_count = 0;
uint32_t save = spin_lock_blocking(shared_state.scanline.lock);
// VERY IMPORTANT: THIS CODE CAN ONLY TAKE ABOUT 4.5 us BEFORE LAUNCHING DMA...
// ... otherwise our scanline will be shifted over (because we will have started display)
//
// to alleviate this somewhat, we let the dma_complete alsu do a check for current_scanline_buffer == null, and look for a completed scanlines
// In ideal case the dma complete IRQ handler will have been able to set current_scanline_buffer for us (or indeed this is a y scaled mode
// and we are repeating a line)... in either case we will come in well under time budget
full_scanline_buffer_t *fsb = scanline_locked_try_latch_fsb_if_null_irqs_disabled(&local_free_list);
spin_unlock(shared_state.scanline.lock, save);
DEBUG_PINS_CLR(video_timing, 1);
if (fsb) {
if (fsb->core.scanline_id != shared_state.scanline.next_scanline_id) {
// removed to allow for other video modes; not worth abstracting that far...
// also; we basically never see this color anyway!
// ((uint16_t *) (missing_scanline_data))[1] = 0x03e0;
// note: this should be in the future
fsb = &_missing_scanline_buffer;
}
} else {
// removed to allow for other video modes; not worth abstracting that far...
// ((uint16_t *)(missing_scanline_data))[1] = 0x001f;
// this is usually set by latch
fsb = &_missing_scanline_buffer;
}
update_dma_transfer_state_irqs_enabled(true, &buffers_to_free_count);
// DEBUG_PINS_SET(video_irq, 2);
// bit of overkill (to reset src_addr) for y scale repeat lines, but then again those should already have data. but this is now
// required in case current_scanline_buffer was set by the dma complete handler, in which case current_scanline_buffer was null when we got to the test above
// don't need to reset anything put the CB pointer to start a reload? as we have already configured the rest
// note DMA should already be aborted by here.
#if PICO_SCANVIDEO_ENABLE_VIDEO_RECOVERY
if (!pio_sm_is_tx_fifo_empty(video_pio, PICO_SCANVIDEO_SCANLINE_SM)) {
pio_sm_clear_fifos(video_pio, PICO_SCANVIDEO_SCANLINE_SM);
// if there wsa something in the FIFO, then there's a good chance there's a possibility that there was something
// in the OSR still, too
pio_sm_exec(video_pio, PICO_SCANVIDEO_SCANLINE_SM, pio_encode_out(pio_null, 32));
}
if (video_pio->sm[PICO_SCANVIDEO_SCANLINE_SM].instr != PIO_WAIT_IRQ4) {
// we don't know where we were, so me should also make sure OSR is empty, we certainly haven't sent any data yet
// hmm the problem here is we don't know if we should wait or not, because that is purely based on timing..
// - if irq not posted, and we wait: GOOD
// - if irq not posted and we don't wait: BAD. early line
// - if irq already posted, and we wait: BAD. blank line
// - id irq already posted, and we don't wait: GOOD
pio_sm_exec(video_pio, PICO_SCANVIDEO_SCANLINE_SM, pio_encode_wait_irq(1, false, 4));
if (pio_sm_is_exec_stalled(video_pio, PICO_SCANVIDEO_SCANLINE_SM)) {
// special case check that we are have actually presumably seen the IRQ, but are blocked on the OUT after it, in
// which case we don't want to block again
if (video_pio->sm[PICO_SCANVIDEO_SCANLINE_SM].addr != shared_state.scanline_program_wait_index + 1) {
pio_sm_exec(video_pio, PICO_SCANVIDEO_SCANLINE_SM,
pio_encode_jmp(shared_state.scanline_program_wait_index));
}
} else {
pio_sm_exec(video_pio, PICO_SCANVIDEO_SCANLINE_SM,
pio_encode_jmp(shared_state.scanline_program_wait_index + 1));
}
}
#if PICO_SCANVIDEO_PLANE_COUNT > 1
if (!pio_sm_is_tx_fifo_empty(video_pio, PICO_SCANVIDEO_SCANLINE_SM2)) {
pio_sm_clear_fifos(video_pio, PICO_SCANVIDEO_SCANLINE_SM2);
}
if (video_pio->sm[PICO_SCANVIDEO_SCANLINE_SM2].instr != PIO_WAIT_IRQ4) {
// hmm the problem here is we don't know if we should wait or not, because that is purely based on timing..
// - if irq not posted, and we wait: GOOD
// - if irq not posted and we don't wait: BAD. early line
// - if irq already posted, and we wait: BAD. blank line
// - id irq already posted, and we don't wait: GOOD
pio_sm_exec(video_pio, PICO_SCANVIDEO_SCANLINE_SM2, pio_encode_wait_irq(1, false, 4));
if (pio_sm_is_exec_stalled(video_pio, PICO_SCANVIDEO_SCANLINE_SM2)) {
pio_sm_exec(video_pio, PICO_SCANVIDEO_SCANLINE_SM2, pio_encode_jmp(shared_state.scanline_program_wait_index));
} else {
pio_sm_exec(video_pio, PICO_SCANVIDEO_SCANLINE_SM2,
pio_encode_jmp(shared_state.scanline_program_wait_index + 1));
}
}
#endif
#endif
#if PICO_SCANVIDEO_PLANE1_FRAGMENT_DMA
#if PICO_SCANVIDEO_PLANE1_FIXED_FRAGMENT_DMA
dma_channel_hw_addr(PICO_SCANVIDEO_SCANLINE_DMA_CHANNEL)->al3_transfer_count = fsb->core.fragment_words;
#endif
//dma_channel_transfer_from_buffer_now(PICO_SCANVIDEO_SCANLINE_DMA_CB_CHANNEL, (uintptr_t)fsb->core.data, (uint32_t) fsb->core.data_used);
dma_channel_hw_addr(PICO_SCANVIDEO_SCANLINE_DMA_CB_CHANNEL)->al3_read_addr_trig = (uintptr_t)fsb->core.data;
#else
dma_channel_transfer_from_buffer_now(PICO_SCANVIDEO_SCANLINE_DMA_CHANNEL, fsb->core.data,
(uint32_t) fsb->core.data_used);
#endif
#if PICO_SCANVIDEO_PLANE_COUNT > 1
#if PICO_SCANVIDEO_PLANE2_FRAGMENT_DMA
dma_channel_hw_addr(PICO_SCANVIDEO_SCANLINE_DMA_CB_CHANNEL2)->al3_read_addr_trig = (uintptr_t)fsb->core.data2;
#else
dma_channel_transfer_from_buffer_now(PICO_SCANVIDEO_SCANLINE_DMA_CHANNEL2, fsb->core.data2, (uint32_t) fsb->core.data2_used);
#endif
#if PICO_SCANVIDEO_PLANE_COUNT > 2
dma_channel_transfer_from_buffer_now(PICO_SCANVIDEO_SCANLINE_DMA_CHANNEL3, fsb->core.data3, (uint32_t) fsb->core.data3_used);
// scanline_assert(video_pio->sm[PICO_SCANVIDEO_SCANLINE_SM3].addr == video_24mhz_composable_offset_end_of_scanline_ALIGN);
#endif
// scanline_assert(video_pio->sm[PICO_SCANVIDEO_SCANLINE_SM2].addr == video_24mhz_composable_offset_end_of_scanline_ALIGN);
#endif
// scanline_assert(video_pio->sm[PICO_SCANVIDEO_SCANLINE_SM].addr == video_24mhz_composable_offset_end_of_scanline_ALIGN);
// DEBUG_PINS_CLR(video_irq, 2);
save = spin_lock_blocking(shared_state.scanline.lock);
DEBUG_PINS_SET(video_timing, 1);
shared_state.scanline.in_vblank = false;
bool was_correct_scanline = (fsb != &_missing_scanline_buffer);
bool free_scanline = false;
shared_state.scanline.y_repeat_index += video_mode.yscale_denominator;
if (shared_state.scanline.y_repeat_index >= shared_state.scanline.y_repeat_target) {
// pick up a new scanline next time around if we had the right one
if (was_correct_scanline) {
free_scanline = true;
}
shared_state.scanline.y_repeat_index -= shared_state.scanline.y_repeat_target;
set_next_scanline_id(scanline_id_after(shared_state.scanline.next_scanline_id));
shared_state.scanline.current_scanline_buffer = NULL;
} else if (!was_correct_scanline) {
// not at the the end of yscale, but the wrong (or missing) scanline anyway, so clear that
shared_state.scanline.current_scanline_buffer = NULL;
#if PICO_SCANVIDEO_LINKED_SCANLINE_BUFFERS
} else if (fsb->core.link_after && !--fsb->core.link_after) {
scanline_assert(fsb->core.link);
spin_lock_unsafe_blocking(shared_state.in_use.lock);
scanline_assert(fsb->core.link);
DEBUG_PINS_SET(video_link, 1);
full_scanline_buffer_t *fsb2 = (full_scanline_buffer_t *)fsb->core.link;
fsb->core.link = NULL; // the linkee scanline is now tracked on its own, so shouldn't be freed with the linker
// we need to insert after the current item in the list, which is after fsb
fsb2->core.scanline_id = fsb->core.scanline_id;
fsb2->next = fsb->next;
fsb->next = fsb2;
if (fsb == shared_state.in_use.in_use_ascending_scanline_id_list_tail) {
shared_state.in_use.in_use_ascending_scanline_id_list_tail = fsb2;
}
DEBUG_PINS_CLR(video_link, 1);
spin_unlock_unsafe(shared_state.in_use.lock);
shared_state.scanline.current_scanline_buffer = fsb2;
free_scanline = true;
#endif
}
// safe to nest dma lock we never nest the other way
spin_lock_unsafe_blocking(shared_state.dma.lock);
shared_state.dma.scanline_in_progress = 1;
if (free_scanline) {
scanline_assert(!shared_state.dma.buffers_to_release);
shared_state.dma.buffers_to_release++;
}
spin_unlock_unsafe(shared_state.dma.lock);
DEBUG_PINS_CLR(video_timing, 1);
spin_unlock(shared_state.scanline.lock, save);
// because IRQs are enabled, we may obviously be pre-empted before or between either of these
release_scanline_irqs_enabled(buffers_to_free_count, &local_free_list);
free_local_free_list_irqs_enabled(local_free_list);
}
static void __video_time_critical_func(prepare_for_vblank_scanline_irqs_enabled)() {
bool signal = false;
// To simplify logic below, clean up any active scanlines now
// note we only really need to do this on the first time in vsync, however as a defensive (potential recovery)
// move we do it every time as it is cheap if nothing to do.
int buffers_to_free_count = 0;
update_dma_transfer_state_irqs_enabled(true, &buffers_to_free_count);
uint32_t save = spin_lock_blocking(shared_state.scanline.lock);
DEBUG_PINS_SET(video_timing, 1);
full_scanline_buffer_t *local_free_list = NULL;
if (!shared_state.scanline.in_vblank) {
shared_state.scanline.in_vblank = true;
shared_state.scanline.y_repeat_index = 0;
// generally this should already have wrapped, but may not have just after a sync
if (scanvideo_scanline_number(shared_state.scanline.next_scanline_id) != 0) {
// set up for scanline 0 of the next frame when we come out of vblank
shared_state.scanline.next_scanline_id =
(scanvideo_frame_number(shared_state.scanline.next_scanline_id) + 1u) << 16u;
shared_state.scanline.y_repeat_target = _scanline_repeat_count_fn(shared_state.scanline.next_scanline_id);
}
signal = true;
}
if (!shared_state.scanline.current_scanline_buffer || is_scanline_after(shared_state.scanline.next_scanline_id,
shared_state.scanline.current_scanline_buffer->core.scanline_id)) {
// if we had a scanline buffer still (which was in the past, unset it and make sure it will be freed
// before we attempt to relatch which only does something when csb == NULL)
if (shared_state.scanline.current_scanline_buffer) {
buffers_to_free_count++; // make sure it gets removed from in_use list
shared_state.scanline.current_scanline_buffer = NULL;
}
// this will probably succeed, because we are buffering ahead of the actual beam position
scanline_locked_try_latch_fsb_if_null_irqs_disabled(&local_free_list);
}
DEBUG_PINS_CLR(video_timing, 1);
spin_unlock(shared_state.scanline.lock, save);
// because IRQs are enabled, we may obviously be pre-empted before or between either of these
release_scanline_irqs_enabled(buffers_to_free_count, &local_free_list);
free_local_free_list_irqs_enabled(local_free_list);
if (signal) {
sem_release(&vblank_begin);
}
}
#define setup_dma_states_vblank() if (true) { dma_states[0] = timing_state.a_vblank; dma_states[1] = timing_state.b1; dma_states[2] = timing_state.b2; dma_states[3] = timing_state.c_vblank; } else __builtin_unreachable()
#define setup_dma_states_no_vblank() if (true) { dma_states[0] = timing_state.a; dma_states[1] = timing_state.b1; dma_states[2] = timing_state.b2; dma_states[3] = timing_state.c; } else __builtin_unreachable()
static inline void top_up_timing_pio_fifo() {
// todo better irq reset ... we are seeing irq get set again, handled in this loop, then we re-enter here when we don't need to
// keep filling until SM3 TX is full
while (!(video_pio->fstat & (1u << (PICO_SCANVIDEO_TIMING_SM + PIO_FSTAT_TXFULL_LSB)))) {
DEBUG_PINS_XOR(video_irq, 1);
DEBUG_PINS_XOR(video_irq, 1);
pio_sm_put(video_pio, PICO_SCANVIDEO_TIMING_SM, dma_states[timing_state.dma_state_index] | timing_state.vsync_bits);
// todo simplify this now we have a1, a2, b, c
// todo display enable (only goes positive on start of screen)
// todo right now we are fixed... make this generic for timing and improve
if (++timing_state.dma_state_index >= DMA_STATE_COUNT) {
timing_state.dma_state_index = 0;
timing_state.timing_scanline++;
// todo check code and put these in a current state struct
if (timing_state.timing_scanline >= timing_state.v_active) {
if (timing_state.timing_scanline >= timing_state.v_total) {
timing_state.timing_scanline = 0;
// active display - gives irq 0 and irq 4
setup_dma_states_no_vblank();
} else if (timing_state.timing_scanline <= timing_state.v_pulse_end) {
if (timing_state.timing_scanline == timing_state.v_active) {
setup_dma_states_vblank();
} else if (timing_state.timing_scanline == timing_state.v_pulse_start) {
timing_state.vsync_bits = timing_state.vsync_bits_pulse;
} else if (timing_state.timing_scanline == timing_state.v_pulse_end) {
timing_state.vsync_bits = timing_state.vsync_bits_no_pulse;
}
}
}
}
}
}
void __isr __video_most_time_critical_func(isr_pio0_0)() {
#if PICO_SCANVIDEO_ADJUST_BUS_PRIORITY
bus_ctrl_hw->priority = VIDEO_ADJUST_BUS_PRIORITY_VAL;
#endif
// handler for explicit PIO_IRQ0 from PICO_SCANVIDEO_TIMING_SM at a good time to start a DMA for a scanline
// this called once per scanline during non vblank
if (video_pio->irq & 1u) {
video_pio->irq = 1;
DEBUG_PINS_SET(video_irq, 1);
if (display_enabled) {
prepare_for_active_scanline_irqs_enabled();
}
DEBUG_PINS_CLR(video_irq, 1);
}
#if PICO_SCANVIDEO_ADJUST_BUS_PRIORITY
bus_ctrl_hw->priority = 0;
#endif
// handler for explicit PIO_IRQ1 from PICO_SCANVIDEO_TIMING_SM at a good time to prepare for a scanline
// this is only called once per scanline during vblank
if (video_pio->irq & 2u) {
// video_pio->irq = 2;
video_pio->irq = 3; // we clear irq1 for good measure, in case we had gotten out of sync
DEBUG_PINS_SET(video_irq, 2);
prepare_for_vblank_scanline_irqs_enabled();
DEBUG_PINS_CLR(video_irq, 2);
}
}
// irq for PIO FIFO
void __isr __video_most_time_critical_func(isr_pio0_1)() {
DEBUG_PINS_SET(video_irq, 4);
top_up_timing_pio_fifo();
DEBUG_PINS_CLR(video_irq, 4);
}
#if !PICO_SCANVIDEO_NO_DMA_TRACKING
// DMA complete
void __isr __video_time_critical_func(isr_dma_0)() {
#if PICO_SCANVIDEO_ADJUST_BUS_PRIORITY
bus_ctrl_hw->priority = VIDEO_ADJUST_BUS_PRIORITY_VAL;
#endif