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Merge pull request #37 from thejpster/prepare-release
Prepare release
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‎README.md

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@@ -13,12 +13,13 @@ These libraries were originally written by Ferrous Systems, and are based on the
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[`cortex-m` libraries]: https://github.com/rust-embedded/cortex-m
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[Rust Embedded Devices Working Group]: https://github.com/rust-embedded
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There are currently three libraries here:
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There are currently five libraries here:
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* [cortex-ar](./cortex-ar/) - support library for Cortex-R and Cortex-A CPUs (like [cortex-m])
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* [cortex-r-rt](./cortex-r-rt/) - run-time library for Cortex-R CPUs (like [cortex-m-rt])
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* [cortex-a-rt](./cortex-a-rt/) - run-time library for Cortex-A CPUs (like [cortex-m-rt])
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* [arm-targets](./arm-targets/) - a helper library for your build.rs that sets various `--cfg` flags according to the current target
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* [cortex-ar-rt-macros](./cortex-ar-rt-macros/) - macros for `cortex-a-rt` and `cortex-r-rt` (this is an implementation detail - do not use this crate directly)
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There are also example programs for QEMU in the [examples](./examples/) folder.
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‎arm-targets/CHANGELOG.md

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# Change Log
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All notable changes to this project will be documented in this file.
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The format is based on [Keep a Changelog](http://keepachangelog.com/)
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and this project adheres to [Semantic Versioning](http://semver.org/).
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## [Unreleased]
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No changes
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## [v0.2.0]
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### Added
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* `TargetInfo` struct
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* Armv7-A support
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### Changed
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* The `process_target` function returns a `TargetInfo`
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## [v0.1.0]
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Initial release
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[Unreleased]: https://github.com/rust-embedded/cortex-ar/compare/arm-targets-v0.2.0...HEAD
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[v0.2.0]: https://github.com/rust-embedded/cortex-ar/compare/arm-targets-v0.1.0...arm-targets-v0.2.0
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[v0.1.0]: https://github.com/rust-embedded/cortex-ar/releases/tag/arm-targets-v0.1.0

‎arm-targets/Cargo.toml

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[package]
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authors = [
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"Jonathan Pallant <[email protected]>",
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"The Cortex-R Team <cortex-r@teams.rust-embedded.org>"
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"The Embedded Devices Working Group Arm Team <arm@teams.rust-embedded.org>"
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]
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categories = ["development-tools::build-utils"]
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description = "Compile-time feature detection for Arm processors"
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repository = "https://github.com/rust-embedded/cortex-ar.git"
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homepage = "https://github.com/rust-embedded/cortex-ar.git"
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rust-version = "1.59"
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version = "0.1.0"
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version = "0.2.0"
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[dependencies]

‎arm-targets/README.md

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## Minimum Supported Rust Version (MSRV)
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This crate is guaranteed to compile on stable Rust 1.82.0 and up. It *might*
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compile with older versions but that may change in any new patch release.
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This crate is guaranteed to compile on stable Rust 1.59.0 and up, as recorded
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by the `package.rust-version` property in `Cargo.toml`.
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Increasing the MSRV is not considered a breaking change and may occur in a
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minor version release (e.g. from `0.3.0` to `0.3.1`, because this is still a
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`0.x` release).
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## Licence
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Copyright (c) Ferrous Systems, 2025
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* Copyright (c) Ferrous Systems
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* Copyright (c) The Rust Embedded Devices Working Group developers
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Licensed under either [MIT](./LICENSE-MIT) or [Apache-2.0](./LICENSE-APACHE) at
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your option.

‎cortex-a-rt/CHANGELOG.md

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The format is based on [Keep a Changelog](http://keepachangelog.com/)
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and this project adheres to [Semantic Versioning](http://semver.org/).
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## [unreleased]
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## [Unreleased]
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No changes
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## [v0.1.0]
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Initial release
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[unreleased]: https://github.com/rust-embedded/cortex-ar/compare/cortex-a-rt-v0.1.0...HEAD
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[Unreleased]: https://github.com/rust-embedded/cortex-ar/compare/cortex-a-rt-v0.1.0...HEAD
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[v0.1.0]: https://github.com/rust-embedded/cortex-ar/releases/tag/cortex-a-rt-v0.1.0

‎cortex-a-rt/Cargo.toml

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authors = [
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"Robin Mueller <[email protected]>",
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"Jonathan Pallant <[email protected]>",
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"The Cortex-R Team <cortex-r@teams.rust-embedded.org>"
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"The Embedded Devices Working Group Arm Team <arm@teams.rust-embedded.org>"
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]
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description = "Run-Time support for Arm Cortex-A"
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edition = "2021"
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version = "0.1.0"
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[dependencies]
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cortex-ar = {version = "0.1.0", path = "../cortex-ar"}
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cortex-ar = {version = "0.2.0", path = "../cortex-ar"}
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cortex-ar-rt-macros = { path = "../cortex-ar-rt-macros", version = "=0.1.0" }
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[features]
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vfp-dp = []
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[build-dependencies]
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arm-targets = {version = "0.1.0", path = "../arm-targets"}
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arm-targets = {version = "0.2.0", path = "../arm-targets"}
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[package.metadata.docs.rs]
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targets = ["armv7a-none-eabihf"]

‎cortex-a-rt/README.md

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# Arm Cortex-A Run-Time
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# Run-time support for Arm Cortex-A (AArch32)
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This library implements a simple Arm vector table, suitable for getting into a
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Rust application running in System Mode. It also provides a reference start
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up method. Most Cortex-A based systems will require chip specific start-up
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code, so the start-up method can over overridden.
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See <https://docs.rs/cortex-a-rt> for detailed documentation.
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## Features
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## Minimum Supported Rust Version (MSRV)
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This crate is guaranteed to compile on stable Rust 1.82.0 and up. It *might*
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compile with older versions but that may change in any new patch release.
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This crate is guaranteed to compile on stable Rust 1.82.0 and up, as recorded
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by the `package.rust-version` property in `Cargo.toml`.
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Increasing the MSRV is not considered a breaking change and may occur in a
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minor version release (e.g. from `0.3.0` to `0.3.1`, because this is still a
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`0.x` release).
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## Licence
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‎cortex-a-rt/src/lib.rs

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//! This library implements a simple Arm vector table, suitable for getting into
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//! a Rust application running in System Mode. It also provides a reference
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//! start up method. Most Cortex-A based systems will require chip specific
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//! start-up code, so the start-up method can over overriden.
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//! start-up code, so the start-up method can over overridden.
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//!
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//! The default startup routine provided by this crate does not include any
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//! special handling for multi-core support because this is oftentimes

‎cortex-ar-rt-macros/CHANGELOG.md

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# Change Log
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All notable changes to this project will be documented in this file.
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The format is based on [Keep a Changelog](http://keepachangelog.com/)
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and this project adheres to [Semantic Versioning](http://semver.org/).
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## [Unreleased]
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No changes
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## [v0.1.0]
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Initial release
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[Unreleased]: https://github.com/rust-embedded/cortex-ar/compare/cortex-ar-rt-macros-v0.1.0...HEAD
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[v0.1.0]: https://github.com/rust-embedded/cortex-ar/releases/tag/cortex-ar-rt-macros-v0.1.0

‎cortex-ar-rt-macros/Cargo.toml

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authors = [
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"Robin Mueller <[email protected]>",
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"Jonathan Pallant <[email protected]>",
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"The Cortex-R Team <cortex-r@teams.rust-embedded.org>"
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"The Embedded Devices Working Group Arm Team <arm@teams.rust-embedded.org>"
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]
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description = "Run-Time macros for Arm Cortex-A and Cortex-R"
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edition = "2021"

‎cortex-ar-rt-macros/README.md

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# Macros for `cortex-a-rt` and `cortex-r-rt`
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This crate contains proc-macros that are re-exported through the following crates:
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* [`cortex-a-rt`]
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* [`cortex-r-rt`]
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[cortex-a-rt]: https://crates.io/crates/cortex-a-rt
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[cortex-r-rt]: https://crates.io/crates/cortex-r-rt
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## Minimum Supported Rust Version (MSRV)
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This crate is guaranteed to compile on stable Rust 1.82.0 and up, as recorded
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by the `package.rust-version` property in `Cargo.toml`.
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Increasing the MSRV is not considered a breaking change and may occur in a
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minor version release (e.g. from `0.3.0` to `0.3.1`, because this is still a
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`0.x` release).
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## Licence
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* Copyright (c) Ferrous Systems
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* Copyright (c) The Rust Embedded Devices Working Group developers
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Licensed under either [MIT](./LICENSE-MIT) or [Apache-2.0](./LICENSE-APACHE) at
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your option.
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## Contribution
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Unless you explicitly state otherwise, any contribution intentionally submitted
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for inclusion in the work by you shall be licensed as above, without any
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additional terms or conditions.

‎cortex-ar/CHANGELOG.md

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The format is based on [Keep a Changelog](http://keepachangelog.com/)
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and this project adheres to [Semantic Versioning](http://semver.org/).
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## [unreleased]
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## [Unreleased]
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## [v0.2.0]
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### Added
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- General support for the Cortex-A architecture.
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- New `sev` function in ASM module.
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- Compiler fences for `dsb` and `isb`
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- Added multi-core-safe critical-section implementation
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- Additional EL1 MPU methods `set_region`, `set_attributes` and `background_region_enable`
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### Changed
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- Timer methods only need `&self` not `&mut self`
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- The `dsb` and `isb` functions now include compiler fences
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## [v0.1.0]
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Initial release
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[unreleased]: https://github.com/rust-embedded/cortex-ar/compare/cortex-ar-v0.1.0...HEAD
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[Unreleased]: https://github.com/rust-embedded/cortex-ar/compare/cortex-ar-v0.2.0...HEAD
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[v0.2.0]: https://github.com/rust-embedded/cortex-ar/compare/cortex-ar-v0.1.0...cortex-ar-v0.2.0
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[v0.1.0]: https://github.com/rust-embedded/cortex-ar/releases/tag/cortex-ar-v0.1.0

‎cortex-ar/Cargo.toml

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[package]
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authors = [
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"Jonathan Pallant <[email protected]>",
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"The Cortex-R Team <cortex-r@teams.rust-embedded.org>",
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"The Embedded Devices Working Group Arm Team <arm@teams.rust-embedded.org>",
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]
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categories = [
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"embedded",
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repository = "https://github.com/rust-embedded/cortex-ar.git"
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homepage = "https://github.com/rust-embedded/cortex-ar.git"
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rust-version = "1.82"
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version = "0.2.0"
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[dependencies]
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arbitrary-int = "1.3.0"
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defmt = {version = "0.3", optional = true}
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[build-dependencies]
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arm-targets = {version = "0.1.0", path = "../arm-targets"}
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arm-targets = {version = "0.2.0", path = "../arm-targets"}
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[features]
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# Adds a critical-section implementation that only disables interrupts.

‎cortex-ar/README.md

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## Minimum Supported Rust Version (MSRV)
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This crate is guaranteed to compile on stable Rust 1.82.0 and up. It *might*
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compile with older versions but that may change in any new patch release.
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This crate is guaranteed to compile on stable Rust 1.82.0 and up, as recorded
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by the `package.rust-version` property in `Cargo.toml`.
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Increasing the MSRV is not considered a breaking change and may occur in a
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minor version release (e.g. from `0.3.0` to `0.3.1`, because this is still a
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`0.x` release).
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## Licence
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Copyright (c) Ferrous Systems, 2025
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* Copyright (c) Ferrous Systems
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* Copyright (c) The Rust Embedded Devices Working Group developers
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Licensed under either [MIT](./LICENSE-MIT) or [Apache-2.0](./LICENSE-APACHE) at
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your option.

‎cortex-r-rt/CHANGELOG.md

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The format is based on [Keep a Changelog](http://keepachangelog.com/)
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and this project adheres to [Semantic Versioning](http://semver.org/).
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## [unreleased]
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## [Unreleased]
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## [v0.2.0]
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## Added
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- Added ABT und UND mode stack setup.
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- Default exception handlers for undefined, prefetch and data abort exceptions
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- Default exception handlers for undefined, prefetch abort and data abort exceptions
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- SMP support
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- Zeroing of registers on start-up
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- `#[entry]` and `#[exception]` and `#[interrupt]` macros
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## Changed
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- Fixed interrupt handler so interrupts can be re-entrant
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- Default Rust exception handler is now an empty permanent loop instead of a semihosting exit.
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- The SVC asm trampoline can now be over-ridden
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- The Undefined, Prefetch and Abort handlers can either return never, or can return a new address to continue executing from when the handler is over
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## [v0.1.0]
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Initial release
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[unreleased]: https://github.com/rust-embedded/cortex-ar/compare/cortex-r-rt-v0.1.0...HEAD
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[Unreleased]: https://github.com/rust-embedded/cortex-ar/compare/cortex-r-rt-v0.2.0...HEAD
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[v0.2.0]: https://github.com/rust-embedded/cortex-ar/compare/cortex-r-rt-v0.1.0...cortex-r-rt-v0.2.0
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[v0.1.0]: https://github.com/rust-embedded/cortex-ar/releases/tag/cortex-r-rt-v0.1.0

‎cortex-r-rt/Cargo.toml

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[package]
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authors = [
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"Jonathan Pallant <[email protected]>",
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"The Cortex-R Team <cortex-r@teams.rust-embedded.org>"
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"The Embedded Devices Working Group Arm Team <arm@teams.rust-embedded.org>"
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]
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categories = [
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"embedded",
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readme = "README.md"
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repository = "https://github.com/rust-embedded/cortex-r.git"
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rust-version = "1.82"
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version = "0.1.0"
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version = "0.2.0"
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[dependencies]
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cortex-ar = {version = "0.1.0", path = "../cortex-ar"}
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cortex-ar = {version = "0.2.0", path = "../cortex-ar"}
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semihosting = {version = "0.1.18", features = ["stdio"]}
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cortex-ar-rt-macros = { path = "../cortex-ar-rt-macros", version = "=0.1.0" }
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cortex-ar-rt-macros = {path = "../cortex-ar-rt-macros", version = "=0.1.0"}
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[features]
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# Enable the FPU on start-up, even on a soft-float EABI target
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eabi-fpu = []
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[build-dependencies]
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arm-targets = {version = "0.1.0", path = "../arm-targets"}
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arm-targets = {version = "0.2.0", path = "../arm-targets"}
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[package.metadata.docs.rs]
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targets = ["armv7r-none-eabihf", "armv7r-none-eabihf"]

‎cortex-r-rt/README.md

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# Arm Cortex-R Run-Time
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# Run-time support for Arm Cortex-R (AArch32)
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This library implements a simple Arm vector table, suitable for getting into a
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Rust application running in System Mode. It also provides a reference start
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up method. Most Cortex-R based systems will require chip specific start-up
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code, so the start-up method can over overridden.
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See <https://docs.rs/cortex-r-rt> for detailed documentation.
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## Minimum Supported Rust Version (MSRV)
411

5-
This crate is guaranteed to compile on stable Rust 1.82.0 and up. It *might*
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compile with older versions but that may change in any new patch release.
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This crate is guaranteed to compile on stable Rust 1.82.0 and up, as recorded
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by the `package.rust-version` property in `Cargo.toml`.
14+
15+
Increasing the MSRV is not considered a breaking change and may occur in a
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minor version release (e.g. from `0.3.0` to `0.3.1`, because this is still a
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`0.x` release).
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## Licence
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Copyright (c) Ferrous Systems, 2025
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* Copyright (c) Ferrous Systems
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* Copyright (c) The Rust Embedded Devices Working Group developers
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Licensed under either [MIT](./LICENSE-MIT) or [Apache-2.0](./LICENSE-APACHE) at
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your option.

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