Skip to content
This repository was archived by the owner on Nov 28, 2023. It is now read-only.

Commit 8bd0d5c

Browse files
bors[bot]smsxgli
andauthored
Merge #79
79: update to riscv 0.7 r=almindor a=smsxgli hi everyone, I am a new guy with both github, rust and riscv, and this is my first PR, so if I miss something or do something wrong, please let me know (and forgive my poor english, since I am not a native speaker). crate `riscv` v0.7 solved link error about [`different hardware float abi`](rust-embedded/riscv#85), but riscv-rt still depend on `riscv` v0.6. Co-authored-by: smsxgli <[email protected]>
2 parents 9813abf + 2d8c949 commit 8bd0d5c

28 files changed

+37
-9
lines changed

Cargo.toml

+1-1
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@ license = "ISC"
1010

1111
[dependencies]
1212
r0 = "1.0.0"
13-
riscv = "0.6"
13+
riscv = "0.7"
1414
riscv-rt-macros = { path = "macros", version = "0.1.6" }
1515

1616
[features]

assemble.ps1

+15-4
Original file line numberDiff line numberDiff line change
@@ -1,15 +1,26 @@
1+
New-Item -Force -Name bin -Type Directory
2+
13
# remove existing blobs because otherwise this will append object files to the old blobs
24
Remove-Item -Force bin/*.a
35

46
$crate = "riscv-rt"
5-
$extension_sets = @("i", "im", "ic", "imc")
7+
8+
$extension_sets = @("i", "im", "ic", "imc", "if", "ifc", "imf", "imfc", "ifd", "ifdc", "imfd", "imfdc")
9+
610
$pwd = Get-Location
711

8-
foreach ($ext in $extension_sets) {
9-
riscv64-unknown-elf-gcc -ggdb3 -fdebug-prefix-map=$pwd=/riscv-rt -c -mabi=ilp32 -march=rv32$ext asm.S -o bin/$crate.o
12+
foreach ($ext in $extension_sets)
13+
{
14+
$abi = ""
15+
if ($ext.contains("d"))
16+
{$abi = "d"}
17+
elseif ($ext.contains("f"))
18+
{$abi = "f"}
19+
20+
riscv64-unknown-elf-gcc -ggdb3 -fdebug-prefix-map=$pwd=/riscv-rt -c "-mabi=ilp32$abi" "-march=rv32$ext" asm.S -o bin/$crate.o
1021
riscv64-unknown-elf-ar crs bin/riscv32$ext-unknown-none-elf.a bin/$crate.o
1122

12-
riscv64-unknown-elf-gcc -ggdb3 -fdebug-prefix-map=$pwd=/riscv-rt -c -mabi=lp64 -march=rv64$ext asm.S -o bin/$crate.o
23+
riscv64-unknown-elf-gcc -ggdb3 -fdebug-prefix-map=$pwd=/riscv-rt -c "-mabi=lp64$abi" "-march=rv64$ext" asm.S -o bin/$crate.o
1324
riscv64-unknown-elf-ar crs bin/riscv64$ext-unknown-none-elf.a bin/$crate.o
1425
}
1526

assemble.sh

+20-3
Original file line numberDiff line numberDiff line change
@@ -7,12 +7,29 @@ crate=riscv-rt
77
# remove existing blobs because otherwise this will append object files to the old blobs
88
rm -f bin/*.a
99

10-
for ext in i ic im imc
10+
exts=('i' 'ic' 'im' 'imc' 'if' 'ifc' 'imf' 'imfc' 'ifd' 'ifdc' 'imfd' 'imfdc')
11+
12+
for ext in ${exts[@]}
1113
do
12-
riscv64-unknown-elf-gcc -ggdb3 -fdebug-prefix-map=$(pwd)=/riscv-rt -c -mabi=ilp32 -march=rv32${ext} asm.S -o bin/$crate.o
14+
case $ext in
15+
16+
*'d'*)
17+
abi='d'
18+
;;
19+
20+
*'f'*)
21+
abi='f'
22+
;;
23+
24+
*)
25+
abi=''
26+
;;
27+
esac
28+
29+
riscv64-unknown-elf-gcc -ggdb3 -fdebug-prefix-map=$(pwd)=/riscv-rt -c -mabi=ilp32${abi} -march=rv32${ext} asm.S -o bin/$crate.o
1330
riscv64-unknown-elf-ar crs bin/riscv32${ext}-unknown-none-elf.a bin/$crate.o
1431

15-
riscv64-unknown-elf-gcc -ggdb3 -fdebug-prefix-map=$(pwd)=/riscv-rt -c -mabi=lp64 -march=rv64${ext} asm.S -o bin/$crate.o
32+
riscv64-unknown-elf-gcc -ggdb3 -fdebug-prefix-map=$(pwd)=/riscv-rt -c -mabi=lp64${abi} -march=rv64${ext} asm.S -o bin/$crate.o
1633
riscv64-unknown-elf-ar crs bin/riscv64${ext}-unknown-none-elf.a bin/$crate.o
1734
done
1835

bin/riscv32i-unknown-none-elf.a

124 Bytes
Binary file not shown.

bin/riscv32ic-unknown-none-elf.a

124 Bytes
Binary file not shown.

bin/riscv32if-unknown-none-elf.a

8.01 KB
Binary file not shown.

bin/riscv32ifc-unknown-none-elf.a

7.87 KB
Binary file not shown.

bin/riscv32ifd-unknown-none-elf.a

8.01 KB
Binary file not shown.

bin/riscv32ifdc-unknown-none-elf.a

7.88 KB
Binary file not shown.

bin/riscv32im-unknown-none-elf.a

124 Bytes
Binary file not shown.

bin/riscv32imc-unknown-none-elf.a

124 Bytes
Binary file not shown.

bin/riscv32imf-unknown-none-elf.a

7.7 KB
Binary file not shown.

bin/riscv32imfc-unknown-none-elf.a

7.58 KB
Binary file not shown.

bin/riscv32imfd-unknown-none-elf.a

7.71 KB
Binary file not shown.

bin/riscv32imfdc-unknown-none-elf.a

7.58 KB
Binary file not shown.

bin/riscv64i-unknown-none-elf.a

128 Bytes
Binary file not shown.

bin/riscv64ic-unknown-none-elf.a

136 Bytes
Binary file not shown.

bin/riscv64if-unknown-none-elf.a

12.8 KB
Binary file not shown.

bin/riscv64ifc-unknown-none-elf.a

12.7 KB
Binary file not shown.

bin/riscv64ifd-unknown-none-elf.a

12.8 KB
Binary file not shown.

bin/riscv64ifdc-unknown-none-elf.a

12.7 KB
Binary file not shown.

bin/riscv64im-unknown-none-elf.a

152 Bytes
Binary file not shown.

bin/riscv64imc-unknown-none-elf.a

144 Bytes
Binary file not shown.

bin/riscv64imf-unknown-none-elf.a

12.3 KB
Binary file not shown.

bin/riscv64imfc-unknown-none-elf.a

12.2 KB
Binary file not shown.

bin/riscv64imfd-unknown-none-elf.a

12.3 KB
Binary file not shown.

bin/riscv64imfdc-unknown-none-elf.a

12.2 KB
Binary file not shown.

build.rs

+1-1
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,7 @@ fn main() {
1414

1515
if target.starts_with("riscv") {
1616
let mut target = Target::from_target_str(&target);
17-
target.retain_extensions("imc");
17+
target.retain_extensions("imfdc");
1818

1919
let target = target.to_string();
2020

0 commit comments

Comments
 (0)