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1 parent 7f3acb5 commit 7ee0f86Copy full SHA for 7ee0f86
src/lib.rs
@@ -2202,7 +2202,20 @@ impl Build {
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cmd.arg("-g");
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}
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- println!("cargo:warning=The MSVC ARM assemblers do not support -D flags");
+ for &(ref key, ref value) in self.definitions.iter() {
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+ cmd.arg("-PreDefine");
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+ if let Some(ref value) = *value {
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+ if let Ok(i) = value.parse::<i32>() {
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+ cmd.arg(&format!("{} SETA {}", key, i));
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+ } else if value.starts_with('"') && value.ends_with('"') {
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+ cmd.arg(&format!("{} SETS {}", key, value));
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+ } else {
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+ cmd.arg(&format!("{} SETS \"{}\"", key, value));
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+ }
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+ cmd.arg(&format!("{} SETL {}", key, "{TRUE}"));
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} else {
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if self.get_debug() {
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cmd.arg("-Zi");
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