@@ -904,8 +904,8 @@ fn llvm_asm_scalar_type<'ll>(cx: &CodegenCx<'ll, '_>, scalar: Scalar) -> &'ll Ty
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Primitive :: Int ( Integer :: I16 , _) => cx. type_i16 ( ) ,
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Primitive :: Int ( Integer :: I32 , _) => cx. type_i32 ( ) ,
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Primitive :: Int ( Integer :: I64 , _) => cx. type_i64 ( ) ,
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- Primitive :: F32 => cx. type_f32 ( ) ,
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- Primitive :: F64 => cx. type_f64 ( ) ,
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+ Primitive :: Float ( Float :: F32 ) => cx. type_f32 ( ) ,
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+ Primitive :: Float ( Float :: F64 ) => cx. type_f64 ( ) ,
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// FIXME(erikdesjardins): handle non-default addrspace ptr sizes
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Primitive :: Pointer ( _) => cx. type_from_integer ( dl. ptr_sized_integer ( ) ) ,
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_ => unreachable ! ( ) ,
@@ -950,7 +950,7 @@ fn llvm_fixup_input<'ll, 'tcx>(
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bx. shuffle_vector ( value, bx. const_undef ( vec_ty) , bx. const_vector ( & indices) )
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}
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( InlineAsmRegClass :: X86 ( X86InlineAsmRegClass :: reg_abcd) , Abi :: Scalar ( s) )
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- if s. primitive ( ) == Primitive :: F64 =>
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+ if s. primitive ( ) == Primitive :: Float ( Float :: F64 ) =>
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{
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bx. bitcast ( value, bx. cx . type_i64 ( ) )
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}
@@ -986,8 +986,8 @@ fn llvm_fixup_input<'ll, 'tcx>(
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match s. primitive ( ) {
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// MIPS only supports register-length arithmetics.
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Primitive :: Int ( Integer :: I8 | Integer :: I16 , _) => bx. zext ( value, bx. cx . type_i32 ( ) ) ,
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- Primitive :: F32 => bx. bitcast ( value, bx. cx . type_i32 ( ) ) ,
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- Primitive :: F64 => bx. bitcast ( value, bx. cx . type_i64 ( ) ) ,
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+ Primitive :: Float ( Float :: F32 ) => bx. bitcast ( value, bx. cx . type_i32 ( ) ) ,
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+ Primitive :: Float ( Float :: F64 ) => bx. bitcast ( value, bx. cx . type_i64 ( ) ) ,
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_ => value,
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}
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}
@@ -1027,7 +1027,7 @@ fn llvm_fixup_output<'ll, 'tcx>(
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bx. shuffle_vector ( value, bx. const_undef ( vec_ty) , bx. const_vector ( & indices) )
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}
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( InlineAsmRegClass :: X86 ( X86InlineAsmRegClass :: reg_abcd) , Abi :: Scalar ( s) )
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- if s. primitive ( ) == Primitive :: F64 =>
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+ if s. primitive ( ) == Primitive :: Float ( Float :: F64 ) =>
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{
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bx. bitcast ( value, bx. cx . type_f64 ( ) )
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}
@@ -1064,8 +1064,8 @@ fn llvm_fixup_output<'ll, 'tcx>(
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// MIPS only supports register-length arithmetics.
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Primitive :: Int ( Integer :: I8 , _) => bx. trunc ( value, bx. cx . type_i8 ( ) ) ,
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Primitive :: Int ( Integer :: I16 , _) => bx. trunc ( value, bx. cx . type_i16 ( ) ) ,
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- Primitive :: F32 => bx. bitcast ( value, bx. cx . type_f32 ( ) ) ,
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- Primitive :: F64 => bx. bitcast ( value, bx. cx . type_f64 ( ) ) ,
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+ Primitive :: Float ( Float :: F32 ) => bx. bitcast ( value, bx. cx . type_f32 ( ) ) ,
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+ Primitive :: Float ( Float :: F64 ) => bx. bitcast ( value, bx. cx . type_f64 ( ) ) ,
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_ => value,
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}
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}
@@ -1100,7 +1100,7 @@ fn llvm_fixup_output_type<'ll, 'tcx>(
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cx. type_vector ( elem_ty, count * 2 )
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}
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( InlineAsmRegClass :: X86 ( X86InlineAsmRegClass :: reg_abcd) , Abi :: Scalar ( s) )
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- if s. primitive ( ) == Primitive :: F64 =>
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+ if s. primitive ( ) == Primitive :: Float ( Float :: F64 ) =>
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{
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cx. type_i64 ( )
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}
@@ -1136,8 +1136,8 @@ fn llvm_fixup_output_type<'ll, 'tcx>(
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match s. primitive ( ) {
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// MIPS only supports register-length arithmetics.
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Primitive :: Int ( Integer :: I8 | Integer :: I16 , _) => cx. type_i32 ( ) ,
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- Primitive :: F32 => cx. type_i32 ( ) ,
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- Primitive :: F64 => cx. type_i64 ( ) ,
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+ Primitive :: Float ( Float :: F32 ) => cx. type_i32 ( ) ,
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+ Primitive :: Float ( Float :: F64 ) => cx. type_i64 ( ) ,
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_ => layout. llvm_type ( cx) ,
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}
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}
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