|
| 1 | +# stm32f4 |
| 2 | +This crate provides an autogenerated API for access to STM32F4 peripherals. |
| 3 | +The API is generated using [svd2rust] with patched svd files containing |
| 4 | +extensive type-safe support. For more information please see the [main repo]. |
| 5 | + |
| 6 | +Refer to the [documentation] for full details. |
| 7 | + |
| 8 | +[svd2rust]: https://github.com/japaric/svd2rust |
| 9 | +[main repo]: https://github.com/stm32-rs/stm32-rs |
| 10 | +[documentation]: https://docs.rs/stm32f4/latest/stm32f4/ |
| 11 | + |
| 12 | +## Usage |
| 13 | +Each device supported by this crate is behind a feature gate so that you only |
| 14 | +compile the device(s) you want. To use, in your Cargo.toml: |
| 15 | + |
| 16 | +```toml |
| 17 | +[dependencies.stm32f4] |
| 18 | +version = "0.12.1" |
| 19 | +features = ["stm32f401", "rt"] |
| 20 | +``` |
| 21 | + |
| 22 | +The `rt` feature is optional and brings in support for `cortex-m-rt`. |
| 23 | + |
| 24 | +In your code: |
| 25 | + |
| 26 | +```rust |
| 27 | +use stm32f4::stm32f401; |
| 28 | + |
| 29 | +let mut peripherals = stm32f401::Peripherals::take().unwrap(); |
| 30 | +let gpioa = &peripherals.GPIOA; |
| 31 | +gpioa.odr.modify(|_, w| w.odr0().set_bit()); |
| 32 | +``` |
| 33 | + |
| 34 | +For full details on the autogenerated API, please see: |
| 35 | +https://docs.rs/svd2rust/0.17.0/svd2rust/#peripheral-api |
| 36 | + |
| 37 | +## Supported Devices |
| 38 | + |
| 39 | +| Module | Devices | Links | |
| 40 | +|:------:|:-------:|:-----:| |
| 41 | +| stm32f401 | STM32F401 | [RM0368](https://www.st.com/resource/en/reference_manual/dm00096844.pdf), [st.com](https://www.st.com/en/microcontrollers-microprocessors/stm32f401.html) | |
| 42 | +| stm32f405 | STM32F405, STM32F415 | [RM0090](https://www.st.com/resource/en/reference_manual/dm00031020.pdf), [st.com](https://www.st.com/en/microcontrollers-microprocessors/stm32f405-415.html) | |
| 43 | +| stm32f407 | STM32F407, STM32F417 | [RM0090](https://www.st.com/resource/en/reference_manual/dm00031020.pdf), [st.com](https://www.st.com/en/microcontrollers-microprocessors/stm32f407-417.html) | |
| 44 | +| stm32f410 | STM32F410 | [RM0401](https://www.st.com/resource/en/reference_manual/dm00180366.pdf), [st.com](https://www.st.com/en/microcontrollers-microprocessors/stm32f410.html) | |
| 45 | +| stm32f411 | STM32F411 | [RM0383](https://www.st.com/resource/en/reference_manual/dm00119316.pdf), [st.com](https://www.st.com/en/microcontrollers-microprocessors/stm32f411.html) | |
| 46 | +| stm32f412 | STM32F412 | [RM0402](https://www.st.com/resource/en/reference_manual/dm00180369.pdf), [st.com](https://www.st.com/en/microcontrollers-microprocessors/stm32f412.html) | |
| 47 | +| stm32f413 | STM32F413, STM32F423 | [RM0430](https://www.st.com/resource/en/reference_manual/dm00305666.pdf), [st.com](https://www.st.com/en/microcontrollers-microprocessors/stm32f413-423.html) | |
| 48 | +| stm32f427 | STM32F427, STM32F437 | [RM0090](https://www.st.com/resource/en/reference_manual/dm00031020.pdf), [st.com](https://www.st.com/en/microcontrollers-microprocessors/stm32f427-437.html) | |
| 49 | +| stm32f429 | STM32F429, STM32F439 | [RM0090](https://www.st.com/resource/en/reference_manual/dm00031020.pdf), [st.com](https://www.st.com/en/microcontrollers-microprocessors/stm32f429-439.html) | |
| 50 | +| stm32f446 | STM32F446 | [RM0390](https://www.st.com/resource/en/reference_manual/dm00135183.pdf), [st.com](https://www.st.com/en/microcontrollers-microprocessors/stm32f446.html) | |
| 51 | +| stm32f469 | STM32F469, STM32F479 | [RM0386](https://www.st.com/resource/en/reference_manual/dm00127514.pdf), [st.com](https://www.st.com/en/microcontrollers-microprocessors/stm32f469-479.html) | |
0 commit comments