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Update comment and cleanup doc links
Signed-off-by: Joe Richey <[email protected]>
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src/registers/segmentation.rs

Lines changed: 19 additions & 10 deletions
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@@ -6,13 +6,15 @@ use bit_field::BitField;
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use core::fmt;
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// imports for intra doc links
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#[cfg(doc)]
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use crate::registers::control::Cr4Flags;
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use crate::{
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registers::control::Cr4Flags,
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structures::gdt::{Descriptor, DescriptorFlags, GlobalDescriptorTable},
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};
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/// An x86 segment
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///
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/// Segment registers on x86 are 16-bit [`SegmentSelector`]s, which index into
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/// the [`GlobalDescriptorTable`](crate::structures::gdt::GlobalDescriptorTable). The
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/// corresponding GDT entry is used to
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/// the [`GlobalDescriptorTable`]. The corresponding GDT entry is used to
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/// configure the segment itself. Note that most segmentation functionality is
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/// disabled in 64-bit mode. See the individual segments for more information.
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pub trait Segment {
@@ -107,20 +109,27 @@ impl fmt::Debug for SegmentSelector {
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/// Code Segment
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///
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/// Most fields like the segment base and limit are unused in 64-bit mode.
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/// Only the LONG_MODE, PRESENT, USER_SEGMENT, EXECUTABLE, DEFAULT_SIZE (default operand size)
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/// and DPL_RING_3 (descriptor privilege-level) fields of the
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/// descriptor are recognized by the CPU. Some of them (e.g. DEFAULT_SIZE) are required to hold
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/// a specific value and can't be changed. Others like the DPL_RING_3 and LONG_MODE
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/// can be used to change privilege level or enable/disable long mode.
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/// While most fields in the Code-Segment [`Descriptor`] are unused in 64-bit
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/// long mode, some of them must be set to a specific value. The
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/// [`EXECUTABLE`](DescriptorFlags::EXECUTABLE),
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/// [`USER_SEGMENT`](DescriptorFlags::USER_SEGMENT), and
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/// [`LONG_MODE`](DescriptorFlags::LONG_MODE) bits must be set, while the
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/// [`DEFAULT_SIZE`](DescriptorFlags::DEFAULT_SIZE) bit must be unset.
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///
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/// The [`DPL_RING_3`](DescriptorFlags::DPL_RING_3) field can be used to change
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/// privilege level. The [`PRESENT`](DescriptorFlags::PRESENT) bit can be used
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/// to make a segment present or not present.
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///
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/// All other fields (like the segment base and limit) are ignored by the
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/// processor and setting them has no effect.
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#[derive(Debug)]
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pub struct CS;
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/// Stack Segment
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///
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/// Entirely unused in 64-bit mode; setting the segment register does nothing.
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/// However, in ring 3, the SS register still has to point to a valid
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/// [`Descriptor`](crate::structures::gdt::Descriptor) (it cannot be zero). This
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/// [`Descriptor`] (it cannot be zero). This
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/// means a user-mode read/write segment descriptor must be present in the GDT.
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///
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/// This register is also set by the `syscall`/`sysret` and

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