Abstractions over debug registers (DR0-DR7)

[mkroening]

Working on the GDB support for uhyve, I wrote abstractions for the debug registers (DR0-DR7) to be able to easily configure hardware breakpoints. See a work-in-progress and undocumented version here.

Would such abstractions be in scope of this project?

[josephlr]

I would think so, it seems like configuring the debug registers could work similar to our configuration of the control registers, see x86_64::registers::control.

I think if we added a x86_64::registers::debug module with similar abstractions.

• We could have a way to read/write the VirtAddr for Dr0/Dr1/Dr2/Dr3
  • similar to what we currently do for Cr2
  • These should probably have a common type or trait
• We would have Dr6/D6Flags and Dr7/Dr7Flags
  • similar to what we do for Cr0 and Cr4
  • Dr6 might make more sense to just have read and clear methods
  • Dr7 should have read and write methods

[josephlr]

In addition to the AMD/Intel manuals, it might also be useful to look at how Linux does things

[mkroening]

Thanks for the quick reply! I'll prepare a PR soon. 👍

Regarding Dr7Flags: DR7 has fields (not flags, R/W and LEN), which are two bits long. Using bitflags! for those wouldn't work nicely, would it?