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carlosedpcarlosedp
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Create empty Chisel project
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‎.gitignore

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# Scala .gitignore
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#
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# JARs aren't checked in, they are fetched by sbt
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#
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/lib/*.jar
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/test/files/codelib/*.jar
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/test/files/lib/*.jar
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/test/files/speclib/instrumented.jar
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/tools/*.jar
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# Developer specific properties
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/build.properties
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/buildcharacter.properties
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# might get generated when testing Jenkins scripts locally
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/jenkins.properties
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# target directory for build
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/build/
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# other
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/out/
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/bin/
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/sandbox/
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# intellij
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/src/intellij*/*.iml
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/src/intellij*/*.ipr
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/src/intellij*/*.iws
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**/.cache
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/.idea
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/.settings
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# vscode
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/.vscode
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# Standard symbolic link to build/quick/bin
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/qbin
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# sbt's target directories
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/target/
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/project/**/target/
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/test/macro-annot/target/
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/test/files/target/
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/test/target/
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/build-sbt/
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local.sbt
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jitwatch.out
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# Used by the restarr/restarrFull commands as target directories
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/build-restarr/
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/target-restarr/
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# metals
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.metals
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.bloop
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project/**/metals.sbt
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project/metals.sbt
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# custom
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.bsp
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.addons-dont-touch
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.DS_Store
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generated
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docs/generated
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test_run_dir
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tmp

‎.scalafix.conf

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rules = [
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RemoveUnused,
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DisableSyntax,
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LeakingImplicitClassVal,
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NoAutoTupling,
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NoValInForComprehension,
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OrganizeImports,
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ProcedureSyntax,
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]
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OrganizeImports {
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groupedImports = Merge
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}
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RemoveUnused {
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imports = false // handled by OrganizeImports
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}

‎.scalafmt.conf

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version = "2.7.5"
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maxColumn = 120
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align.preset = most
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align.multiline = false
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continuationIndent.defnSite = 2
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assumeStandardLibraryStripMargin = true
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docstrings = JavaDoc
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lineEndings = preserve
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includeCurlyBraceInSelectChains = false
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danglingParentheses.preset = true
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optIn.annotationNewlines = true
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newlines.alwaysBeforeMultilineDef = false
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rewrite.rules = [RedundantBraces]
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rewrite.redundantBraces.generalExpressions = false
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rewriteTokens = {
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"⇒": "=>"
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"→": "->"
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"←": "<-"
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}

‎LICENSE

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© IBM Corp. 2019
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This softcore is licensed under and subject to the terms of the CC-BY 4.0
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license (https://creativecommons.org/licenses/by/4.0/legalcode).
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Additional rights, including the right to physically implement a softcore
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that is compliant with the required sections of the Power ISA
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Specification, will be available at no cost via the OpenPOWER Foundation.
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This README will be updated with additional information when OpenPOWER's
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license is available.

‎Makefile

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SHELL = bash
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# Project name
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project = toplevel
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generated_files = generated
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# Targets
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chisel: check-board-vars clean ## Generates Verilog code from Chisel sources using Mill
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scripts/mill $(project).run -board ${BOARD} -td $(generated_files)
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chisel-sbt: check-board-vars clean ## Generates Verilog code from Chisel sources using SBT
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sbt "run -board ${BOARD} -td $(generated_files)"
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chisel_tests:
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scripts/mill $(project).test
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chisel_tests_sbt:
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sbt "test"
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check: chisel_tests ## Run Chisel tests using Mill
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check-sbt: chisel_tests_sbt ## Run Chisel tests using SBT
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fmt: ## Formats code using scalafmt and scalafix
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scripts/mill all $(project).{reformat,fix}
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check-board-vars:
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@test -n "$(BOARD)" || (echo "Set BOARD variable to one of the supported boards: " ; cat pmod1.core|grep "\-board" |cut -d '-' -f 2|sed s/\"//g | sed s/board\ //g |tr -s '\n' ','| sed 's/,$$/\n/'; echo "Eg. make chisel BOARD=ulx3s"; echo; exit 1)
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clean: ## Clean all generated files
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@./scripts/mill clean
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@rm -rf obj_dir test_run_dir target
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@rm -rf $(generated_files)
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@rm -rf out
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@rm -f $(project)
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help:
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@echo "Makefile targets:"
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@echo ""
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@grep -E '^[a-zA-Z_-]+:.*?## .*$$' $(MAKEFILE_LIST) | sort | awk 'BEGIN {FS = "[:##]"}; {printf "\033[36m%-20s\033[0m %s\n", $$1, $$4}'
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@echo ""
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.PHONY: chisel clean prog help
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.DEFAULT_GOAL := help

‎README.md

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# Chisel Blinky
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This is a simple Blinky project to demonstrate Chisel functionality with scripts
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and tooling to be able to synth on FPGA boards.
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## Synthesis using Open Source tools (yosys/nextpnr)
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Synthesis on FPGAs is supported with yosys/nextpnr. At the moment the tools support
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Lattice ECP5 FPGAs. The build process uses Docker images, so no software other than Docker needs
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to be installed. If you prefer podman you can use that too, just adjust it in
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`Makefile`, `DOCKER=podman`.
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### Building and programming the FPGA
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The `Makefile` currently supports the following FPGA boards by defining the `BOARD` parameter on make:
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* Lattice [ECP5 Evaluation Board](http://www.latticesemi.com/ecp5-evaluation) - `evn`
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* Radiona [ULX3S](https://radiona.org/ulx3s/) - `ulx3s`
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* Greg Davill [Orangecrab](https://github.com/gregdavill/OrangeCrab) - `orangecrab`
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* Q3k [Colorlight](https://github.com/q3k/chubby75/tree/master/5a-75b) - `colorlight`
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For example, to build for the ULX3S Board, run:
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```sh
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make BOARD=ulx3s synth`
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```
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and to program the FPGA:
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```sh
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make BOARD=ulx3s prog
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# or if your USB device has a different path, pass it on USBDEVICE, like:
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make BOARD=ulx3s USBDEVICE=/dev/tty.usbserial-120001 prog
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```
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Programming using OpenOCD on Docker does not work on Docker Desktop for Mac/Windows since the container is run in a Linux VM and can not see the physical devices connected to the Host.
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For the ULX3S board, the current OpenOCD does not support ft232 protocol so to program it, download [ujprog](https://github.com/emard/ulx3s-bin/tree/master/usb-jtag) for your platform and program using `./ujprog chiselwatt.bit` or to persist in the flash, `./ujprog -j FLASH chiselwatt.bit`.

‎build.sbt

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// See README.md for license details.
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ThisBuild / organization := "com.carlosedp"
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ThisBuild / description := "ChiselV is a RISC-V core written in Chisel"
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ThisBuild / homepage := Some(url("https://carlosedp.com"))
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ThisBuild / licenses := Seq("MIT" -> url("https://opensource.org/licenses/MIT"))
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ThisBuild / scmInfo := Some(
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ScmInfo(url("https://github.com/carlosedp/"), "[email protected]:carlosedp/.git")
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)
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ThisBuild / developers := List(
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Developer("carlosedp", "Carlos Eduardo de Paula", "[email protected]", url("https://github.com/carlosedp"))
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)
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ThisBuild / scalafixDependencies += "com.github.liancheng" %% "organize-imports" % "0.5.0"
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Global / semanticdbEnabled := true
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Global / semanticdbVersion := "4.4.28" //scalafixSemanticdb.revision // Force version due to compatibility issues
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Global / onChangedBuildSource := ReloadOnSourceChanges
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lazy val chiselv = (project in file("."))
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.settings(
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name := "chiselv",
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version := "0.0.1",
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scalaVersion := "2.13.6"
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)
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// Default library versions
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val defaultVersions = Map(
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"chisel3" -> "3.5-SNAPSHOT",
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"chiseltest" -> "0.5-SNAPSHOT",
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"scalatest" -> "3.2.9",
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"organize-imports" -> "0.5.0"
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)
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// Import libraries
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libraryDependencies ++= Seq("chisel3", "chiseltest").map { dep: String =>
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"edu.berkeley.cs" %% dep % sys.props
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.getOrElse(dep + "Version", defaultVersions(dep))
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}
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libraryDependencies += "org.scalatest" %% "scalatest" % defaultVersions("scalatest")
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libraryDependencies += "com.carlosedp" %% "scalautils" % "0.4.0"
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ThisBuild / scalafixDependencies += "com.github.liancheng" %% "organize-imports" % defaultVersions("organize-imports")
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addCompilerPlugin("edu.berkeley.cs" % "chisel3-plugin" % defaultVersions("chisel3") cross CrossVersion.full)
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// Aliases
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addCommandAlias("com", "all compile test:compile")
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addCommandAlias("rel", "reload")
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addCommandAlias("fmt", "all scalafmtSbt scalafmtAll;all compile:scalafix test:scalafix")
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addCommandAlias("fix", "all Compile / scalafixAll Test / scalafixAll")
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addCommandAlias("lint", "fmt;fix")
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addCommandAlias("deps", "reload plugins; dependencyUpdates; reload return; dependencyUpdates")
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resolvers ++= Seq(
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Resolver.sonatypeRepo("snapshots"),
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Resolver.sonatypeRepo("releases")
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)
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scalacOptions ++= Seq(
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"-unchecked",
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"-deprecation",
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"-language:reflectiveCalls",
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"-feature",
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"-Xcheckinit",
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"-Xfatal-warnings",
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"-Ywarn-value-discard",
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"-Ywarn-dead-code",
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"-Ywarn-unused"
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)

‎project/build.properties

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sbt.version=1.5.5

‎project/plugins.sbt

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addSbtPlugin("org.scalameta" % "sbt-scalafmt" % "2.4.2")
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addSbtPlugin("ch.epfl.scala" % "sbt-scalafix" % "0.9.29")
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addSbtPlugin("io.github.davidgregory084" % "sbt-tpolecat" % "0.1.19")
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addSbtPlugin("com.timushev.sbt" % "sbt-updates" % "0.6.0")

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