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a rewrite for portenta + bugfixes
1 parent d6b83cb commit 74face7

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2 files changed

+135
-21
lines changed

2 files changed

+135
-21
lines changed

src/drivers/hardware_specific/stm32/stm32_mcu.cpp

+1-1
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@
44
#include "./stm32_timerutils.h"
55
#include "./stm32_searchtimers.h"
66

7-
#if defined(_STM32_DEF_) || defined(TARGET_STM32H7)
7+
#if defined(_STM32_DEF_) || defined(TARGET_STM32H7) // if stm32duino or portenta
88

99
#pragma message("")
1010
#pragma message("SimpleFOC: compiling for STM32")

src/drivers/hardware_specific/stm32/stm32_timerutils.cpp

+134-20
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@
22
#include "./stm32_timerutils.h"
33
#include <Arduino.h>
44

5-
#if defined(_STM32_DEF_) || defined(STM32H7xx)
5+
#if defined(_STM32_DEF_) || defined(TARGET_STM32H7) // if stm32duino or portenta
66

77

88
void stm32_pauseTimer(TIM_HandleTypeDef* handle){
@@ -213,11 +213,17 @@ int stm32_getInternalSourceTrigger(TIM_HandleTypeDef* master, TIM_HandleTypeDef*
213213
#endif
214214
return -1;
215215
}
216-
#elif defined(STM32F4xx) || defined(STM32F1xx) || defined(STM32L4xx) || defined(STM32F7xx) || defined(STM32H7xx)
216+
#elif defined(STM32F4xx) || defined(STM32F1xx) || defined(STM32L4xx) || defined(STM32F7xx) || defined(STM32H7xx) || defined(TARGET_STM32H7)
217217

218218
// function finds the appropriate timer source trigger for the master/slave timer combination
219219
// returns -1 if no trigger source is found
220-
// currently supports the master timers to be from TIM1 to TIM4 and TIM8
220+
// currently supports the master timers to be from
221+
//
222+
// fammilies | timers
223+
// --------------| --------------------------------
224+
// f1,f4,f7 | TIM1 to TIM4 and TIM8
225+
// l4 | TIM1 to TIM4, TIM8 and TIM15
226+
// h7 | TIM1 to TIM5, TIM8, TIM15, TIM23 and TIM24
221227
int stm32_getInternalSourceTrigger(TIM_HandleTypeDef* master, TIM_HandleTypeDef* slave) {
222228
// put master and slave in temp variables to avoid arrows
223229
TIM_TypeDef *TIM_master = master->Instance;
@@ -236,6 +242,14 @@ int stm32_getInternalSourceTrigger(TIM_HandleTypeDef* master, TIM_HandleTypeDef*
236242
#if defined(TIM8)
237243
else if(TIM_slave == TIM8) return LL_TIM_TS_ITR0;
238244
#endif
245+
#if defined(STM32H7xx) || defined(TARGET_STM32H7)
246+
#if defined(TIM23)
247+
else if(TIM_slave == TIM23) return LL_TIM_TS_ITR0;
248+
#endif
249+
#if defined(TIM24)
250+
else if(TIM_slave == TIM24) return LL_TIM_TS_ITR0;
251+
#endif
252+
#endif
239253
}
240254
#endif
241255
#if defined(TIM2) && defined(LL_TIM_TS_ITR1)
@@ -252,8 +266,17 @@ int stm32_getInternalSourceTrigger(TIM_HandleTypeDef* master, TIM_HandleTypeDef*
252266
#if defined(TIM8)
253267
else if(TIM_slave == TIM8) return LL_TIM_TS_ITR1;
254268
#endif
255-
#if defined(TIM5) && !defined(STM32H7xx)
256-
else if(TIM_slave == TIM5) return LL_TIM_TS_ITR0;
269+
#if defined(STM32H7xx) || defined(TARGET_STM32H7)
270+
#if defined(TIM23)
271+
else if(TIM_slave == TIM23) return LL_TIM_TS_ITR1;
272+
#endif
273+
#if defined(TIM24)
274+
else if(TIM_slave == TIM24) return LL_TIM_TS_ITR1;
275+
#endif
276+
#else
277+
#if defined(TIM5)
278+
else if(TIM_slave == TIM5) return LL_TIM_TS_ITR0;
279+
#endif
257280
#endif
258281
}
259282
#endif
@@ -268,11 +291,20 @@ int stm32_getInternalSourceTrigger(TIM_HandleTypeDef* master, TIM_HandleTypeDef*
268291
#if defined(TIM4)
269292
else if(TIM_slave == TIM4) return LL_TIM_TS_ITR2;
270293
#endif
271-
#if defined(TIM5) && !defined(STM32H7xx)
272-
else if(TIM_slave == TIM5) return LL_TIM_TS_ITR1;
273-
#endif
274-
#if defined(TIM5) && defined(STM32H7xx)
275-
else if(TIM_slave == TIM5) return LL_TIM_TS_ITR2;
294+
#if defined(STM32H7xx) || defined(TARGET_STM32H7)
295+
#if defined(TIM5)
296+
else if(TIM_slave == TIM5) return LL_TIM_TS_ITR2;
297+
#endif
298+
#if defined(TIM23)
299+
else if(TIM_slave == TIM23) return LL_TIM_TS_ITR2;
300+
#endif
301+
#if defined(TIM24)
302+
else if(TIM_slave == TIM24) return LL_TIM_TS_ITR2;
303+
#endif
304+
#else
305+
#if defined(TIM5)
306+
else if(TIM_slave == TIM5) return LL_TIM_TS_ITR1;
307+
#endif
276308
#endif
277309
}
278310
#endif
@@ -290,17 +322,27 @@ int stm32_getInternalSourceTrigger(TIM_HandleTypeDef* master, TIM_HandleTypeDef*
290322
#if defined(TIM8)
291323
else if(TIM_slave == TIM8) return LL_TIM_TS_ITR2;
292324
#endif
293-
#if defined(TIM5) && !defined(STM32H7xx)
294-
else if(TIM_slave == TIM5) return LL_TIM_TS_ITR1;
295-
#endif
296-
#if defined(TIM5) && defined(STM32H7xx)
297-
else if(TIM_slave == TIM5) return LL_TIM_TS_ITR3;
325+
326+
#if defined(STM32H7xx) || defined(TARGET_STM32H7)
327+
#if defined(TIM5)
328+
else if(TIM_slave == TIM5) return LL_TIM_TS_ITR3;
329+
#endif
330+
#if defined(TIM23)
331+
else if(TIM_slave == TIM23) return LL_TIM_TS_ITR3;
332+
#endif
333+
#if defined(TIM24)
334+
else if(TIM_slave == TIM24) return LL_TIM_TS_ITR3;
335+
#endif
336+
#else
337+
#if defined(TIM5)
338+
else if(TIM_slave == TIM5) return LL_TIM_TS_ITR2;
339+
#endif
298340
#endif
299341
}
300342
#endif
301343
#if defined(TIM5)
302344
else if (TIM_master == TIM5){
303-
#if !defined(STM32L4xx) // only difference between F4,F1 and L4
345+
#if defined(STM32F4xx) || defined(STM32F1xx) || defined(STM32F7xx) // f1, f4 adn f7 have tim5 sycned with tim1 and tim3 while others (l4, h7) have tim15
304346
#if defined(TIM1)
305347
if(TIM_slave == TIM1) return LL_TIM_TS_ITR0;
306348
#endif
@@ -311,6 +353,15 @@ int stm32_getInternalSourceTrigger(TIM_HandleTypeDef* master, TIM_HandleTypeDef*
311353
#if defined(TIM8)
312354
if(TIM_slave == TIM8) return LL_TIM_TS_ITR3;
313355
#endif
356+
357+
#if defined(STM32H7xx) || defined(TARGET_STM32H7)
358+
#if defined(TIM23)
359+
else if(TIM_slave == TIM23) return LL_TIM_TS_ITR4;
360+
#endif
361+
#if defined(TIM24)
362+
else if(TIM_slave == TIM24) return LL_TIM_TS_ITR4;
363+
#endif
364+
#endif
314365
}
315366
#endif
316367
#if defined(TIM8)
@@ -321,12 +372,25 @@ int stm32_getInternalSourceTrigger(TIM_HandleTypeDef* master, TIM_HandleTypeDef*
321372
#if defined(TIM4)
322373
else if(TIM_slave == TIM4) return LL_TIM_TS_ITR3;
323374
#endif
324-
#if defined(TIM5)
325-
else if(TIM_slave == TIM5) return LL_TIM_TS_ITR3;
375+
376+
#if defined(STM32H7xx) || defined(TARGET_STM32H7)
377+
#if defined(TIM5)
378+
else if(TIM_slave == TIM5) return LL_TIM_TS_ITR1;
379+
#endif
380+
#if defined(TIM23)
381+
else if(TIM_slave == TIM23) return LL_TIM_TS_ITR5;
382+
#endif
383+
#if defined(TIM24)
384+
else if(TIM_slave == TIM24) return LL_TIM_TS_ITR5;
385+
#endif
386+
#else
387+
#if defined(TIM5)
388+
else if(TIM_slave == TIM5) return LL_TIM_TS_ITR3;
389+
#endif
326390
#endif
327391
}
328392
#endif
329-
#if defined(TIM15) && defined(STM32H7xx)
393+
#if defined(TIM15) && (defined(STM32L4xx) || defined(STM32H7xx) || defined(TARGET_STM32H7) )
330394
else if (TIM_master == TIM15){
331395
#if defined(TIM1)
332396
if(TIM_slave == TIM1) return LL_TIM_TS_ITR0;
@@ -336,6 +400,56 @@ int stm32_getInternalSourceTrigger(TIM_HandleTypeDef* master, TIM_HandleTypeDef*
336400
#endif
337401
}
338402
#endif
403+
#if defined(TIM23) && (defined(STM32H7xx) || defined(TARGET_STM32H7))
404+
else if (TIM_master == TIM23){
405+
#if defined(TIM1)
406+
if(TIM_slave == TIM1) return LL_TIM_TS_ITR12;
407+
#endif
408+
#if defined(TIM2)
409+
if(TIM_slave == TIM2) return LL_TIM_TS_ITR12;
410+
#endif
411+
#if defined(TIM3)
412+
if(TIM_slave == TIM3) return LL_TIM_TS_ITR12;
413+
#endif
414+
#if defined(TIM4)
415+
if(TIM_slave == TIM4) return LL_TIM_TS_ITR12;
416+
#endif
417+
#if defined(TIM5)
418+
if(TIM_slave == TIM5) return LL_TIM_TS_ITR12;
419+
#endif
420+
#if defined(TIM8)
421+
if(TIM_slave == TIM8) return LL_TIM_TS_ITR12;
422+
#endif
423+
#if defined(TIM24)
424+
if(TIM_slave == TIM24) return LL_TIM_TS_ITR12;
425+
#endif
426+
}
427+
#endif
428+
#if defined(TIM24) && (defined(STM32H7xx) || defined(TARGET_STM32H7))
429+
else if (TIM_master == TIM24){
430+
#if defined(TIM1)
431+
if(TIM_slave == TIM1) return LL_TIM_TS_ITR13;
432+
#endif
433+
#if defined(TIM2)
434+
if(TIM_slave == TIM2) return LL_TIM_TS_ITR13;
435+
#endif
436+
#if defined(TIM3)
437+
if(TIM_slave == TIM3) return LL_TIM_TS_ITR13;
438+
#endif
439+
#if defined(TIM4)
440+
if(TIM_slave == TIM4) return LL_TIM_TS_ITR13;
441+
#endif
442+
#if defined(TIM5)
443+
if(TIM_slave == TIM5) return LL_TIM_TS_ITR13;
444+
#endif
445+
#if defined(TIM8)
446+
if(TIM_slave == TIM8) return LL_TIM_TS_ITR13;
447+
#endif
448+
#if defined(TIM23)
449+
if(TIM_slave == TIM23) return LL_TIM_TS_ITR13;
450+
#endif
451+
}
452+
#endif
339453
return -1; // combination not supported
340454
}
341455
#else
@@ -514,7 +628,7 @@ uint32_t stm32_getTimerClockFreq(TIM_HandleTypeDef *handle) {
514628
return 0;
515629
}
516630

517-
#if defined(STM32H7xx) || defined(STM32H7xx)
631+
#if defined(STM32H7xx) || defined(TARGET_STM32H7)
518632
/* When TIMPRE bit of the RCC_CFGR register is reset,
519633
* if APBx prescaler is 1 or 2 then TIMxCLK = HCLK,
520634
* otherwise TIMxCLK = 2x PCLKx.

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