Minor updates

Added simplied defintions and error checking to setClock() and configure(). More detailed comments.

Author: adamgarbo

Diff for: libraries/WDT/examples/Example1_WDT_Basic/Example1_WDT_Basic.ino

@@ -21,7 +21,7 @@
   Tested with SparkFun Artemis Redboard.
 */
 
-#include <WDT.h>
+#include "WDT.h"
 
 APM3_WDT wdt;
 
@@ -57,7 +57,6 @@ void loop()
       Serial.println("Warning: Watchdog has triggered a system reset");
     }
   }
-
   watchdogFlag = false; // Clear watchdog flag
   delay(1);
 }

Diff for: libraries/WDT/examples/Example2_WDT_Config/Example2_WDT_Config.ino

@@ -6,17 +6,17 @@
   This example demonstrates how to modify the configuration of the Artemis
   Watchdog Timer (WDT).
 
-  The watchdog timer is controlled by a clock divider, interrupt ticks and 
+  The watchdog timer is controlled by a clock divider, interrupt ticks and
   reset ticks. To achieve desired watchdog timing, a simple calculation can be made:
 
-  period = # ticks / clock divider frequency 
+  period = # ticks / clock divider frequency
 
-  Examples: 
+  Examples:
   128 interrupt ticks / 128 Hz clock = 1 second
   64 interrupt ticks / 16 Hz clock = 4 seconds
   32 interrupt ticks / 1 Hz clock = 32 seconds
   16 interrupt ticks / 1/16 Hz clock = 256 seconds
-  
+
   The following code will configure the watchdog for both interrupt and reset
   generation, and immediately start the watchdog timer.
   The watchdog ISR provided will 'pet' the watchdog four times. On the fifth
@@ -29,7 +29,7 @@
   Tested with SparkFun Artemis Redboard.
 */
 
-#include <WDT.h>
+#include "WDT.h"
 
 APM3_WDT wdt;
 
@@ -47,17 +47,19 @@ void setup()
 
   // Configure the watchdog
   /*
-    Available watchdog timer clock dividers:
-    0 = Low Power Mode. This setting disables the watch dog timer
-    1 = 128 Hz 
-    2 = 16 Hz 
-    3 = 1 Hz
-    4 = 1/16th Hz
+    Available watchdog timer clock dividers.
+    Users can choose either the clock definition (i.e. WDT_128HZ) or Apoll3 core enumeration (i.e. 1)
+    WDT_OFF       = 0     = Low Power Mode. This setting disables the watch dog timer
+    WDT_128HZ     = 1     = 128 Hz
+    WDT_16HZ      = 2     = 16 Hz
+    WDT_1HZ       = 3     = 1 Hz
+    WDT1_16HZ     = 4     = 1/16th Hz
   */
   // Set watchdog timer clock to 128 Hz
   // Set watchdog interrupt to 1 seconds (128 ticks / 128 Hz = 1 second)
   // Set watchdog reset ~2 seconds (255 ticks / 128 Hz = 1.99 seconds)
-  wdt.configure(1, 128, 255); // Note: Ticks are limited to 255 (8-bit)
+  // Note: Ticks are limited to 255 (8-bit)
+  wdt.configure(WDT_128HZ, 128, 255); // Equivalent to: wdt.configure(1, 128, 255);
   wdt.start(); // Start the watchdog
 }
 
@@ -74,9 +76,14 @@ void loop()
     Serial.print(" Period: "); Serial.print(currentMillis); Serial.println(" ms");
 
     // The watchdog configurations can also be set individually
-    wdt.setClock(2); // Set watchdog timer clock to 16 Hz
+    wdt.setClock(WDT_16HZ); // Set watchdog timer clock to 16 Hz
     wdt.setInterrupt(64); // Set watchdog interrupt to 4 second (64 ticks / 16 Hz = 4 seconds)
     wdt.setReset(96); // Set watchdog reset to 8 seconds (96 ticks / 16 Hz = 8 seconds)
+
+    if (watchdogInterrupt == 9)
+    {
+      Serial.println("Warning: Watchdog has triggered a system reset");
+    }
   }
   watchdogFlag = false; // Clear watchdog flag
   delay(1);

Diff for: libraries/WDT/examples/Example3_WDT_LowPower/Example3_WDT_LowPower.ino

@@ -17,8 +17,8 @@
   the watchdog interrput counter.
 */
 
-#include <RTC.h>
-#include <WDT.h>
+#include "RTC.h"
+#include "WDT.h"
 
 APM3_RTC rtc;
 APM3_WDT wdt;
@@ -43,7 +43,7 @@ void setup()
 
   // Configure the watchdog timer
   // See Example2_WDT_Config for more information on how to configure the watchdog
-  wdt.configure(2, 160, 240); // 16 Hz clock, 10-second interrupt period, 15-second reset period
+  wdt.configure(WDT_16HZ, 160, 240); // 16 Hz clock, 10-second interrupt period, 15-second reset period
 
   // Start the watchdog
   wdt.start();

Diff for: libraries/WDT/keywords.txt

@@ -22,7 +22,12 @@ configure	KEYWORD2
 setClock	KEYWORD2
 setInterrupt	KEYWORD2
 setReset	KEYWORD2
-
+WDT_OFF	KEYWORD2
+WDT_128HZ	KEYWORD2
+WDT_16	KEYWORD2
+WDT_1HZ	KEYWORD2
+WDT1_16HZ	KEYWORD2
+    
 #######################################
 # Constants (LITERAL1)
 #######################################

Diff for: libraries/WDT/src/WDT.cpp

@@ -9,17 +9,39 @@ APM3_WDT::APM3_WDT()
 }
 
 // Configure the watchdog timer
+// clock:     set the LFRC clock frequency of the watchdog timer (see setClock below)
+// interrupt: number of watchdog timer ticks allowed before a watchdog interrupt event is generated
+// reset:     number of watchdog timer ticks allowed before the watchdog will issue a system reset
 void APM3_WDT::configure(uint8_t clock, uint8_t interrupt, uint8_t reset)
 {
-  WDT->CFG_b.CLKSEL = clock; 
+  if(clock <= 4)
+  {
+    WDT->CFG_b.CLKSEL = clock;
+  }
+  else
+  {
+    WDT->CFG_b.CLKSEL = WDT_CFG_CLKSEL_16HZ; // Default to 16Hz LFRC clock divider
+  }
   WDT->CFG_b.INTVAL = interrupt; 
   WDT->CFG_b.RESVAL = reset; 
 }
 
 // Set the LFRC clock frequency of the watchdog timer
+// WDT_OFF     WDT_CFG_CLKSEL_OFF      // = 0    Low Power Mode. This setting disables the watch dog timer
+// WDT_128HZ   WDT_CFG_CLKSEL_128HZ    // = 1,   128 Hz LFRC clock
+// WDT_16HZ    WDT_CFG_CLKSEL_16HZ     // = 2    16 Hz LFRC clock
+// WDT_1HZ     WDT_CFG_CLKSEL_1HZ      // = 3,   1 Hz LFRC clock
+// WDT_1_16HZ  WDT_CFG_CLKSEL_1_16HZ   // = 4,   1/16th Hz LFRC clock
 void APM3_WDT::setClock(uint8_t clock)
 {
-  WDT->CFG_b.CLKSEL = clock; 
+  if(clock <= 4)
+  {
+    WDT->CFG_b.CLKSEL = clock;
+  }
+  else
+  {
+    WDT->CFG_b.CLKSEL = WDT_CFG_CLKSEL_16HZ; // Default to 16Hz LFRC clock divider
+  }
 }
 
 // Set number of watchdog timer ticks allowed before a watchdog interrupt event is generated
@@ -37,8 +59,8 @@ void APM3_WDT::setReset(uint8_t reset)
 // Enable the watchdog
 void APM3_WDT::start()
 {
-  // Enable the interrupt for the watchdog in the NVIC
-  NVIC_EnableIRQ(WDT_IRQn);
+  am_hal_interrupt_master_enable(); // Enable interrupts to the core
+  NVIC_EnableIRQ(WDT_IRQn); // Enable the interrupt for the watchdog in the NVIC
   am_hal_wdt_start();
 }
 

Diff for: libraries/WDT/src/WDT.h

@@ -3,6 +3,13 @@
 
 #include <Arduino.h>
 
+// Simplified WDT Clock Divider Selections
+#define WDT_OFF     WDT_CFG_CLKSEL_OFF      // = 0    Low Power Mode. This setting disables the watch dog timer
+#define WDT_128HZ   WDT_CFG_CLKSEL_128HZ    // = 1,   128 Hz LFRC clock
+#define WDT_16HZ    WDT_CFG_CLKSEL_16HZ     // = 2    16 Hz LFRC clock
+#define WDT_1HZ     WDT_CFG_CLKSEL_1HZ      // = 3,   1 Hz LFRC clock
+#define WDT_1_16HZ  WDT_CFG_CLKSEL_1_16HZ   // = 4,   1/16th Hz LFRC clock
+
 class APM3_WDT
 {
 public: