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Add remaining PGA modes
1 parent ff07d75 commit 861a3e7

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3 files changed

+490
-138
lines changed

3 files changed

+490
-138
lines changed

examples/opamp.rs

+4-4
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@
55

66
use stm32g4xx_hal::adc::AdcClaim;
77
use stm32g4xx_hal::adc::ClockSource;
8-
use stm32g4xx_hal::opamp::{InternalOutput, NonInvertingGain, PgaModeInternal};
8+
use stm32g4xx_hal::opamp::{Gain, InternalOutput};
99
use stm32g4xx_hal::prelude::*;
1010
use stm32g4xx_hal::pwr::PwrExt;
1111

@@ -50,15 +50,15 @@ fn main() -> ! {
5050
// Configure opamp1 with pa1 as non-inverting input and set gain to x2
5151
let _opamp1 = opamp1.pga(
5252
pa1,
53-
PgaModeInternal::gain(NonInvertingGain::Gain2),
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pa2, // Route output to pin pa2
54+
Gain::Gain2,
5555
);
5656

5757
// Configure op with pa7 as non-inverting input and set gain to x4
5858
let opamp2 = opamp2.pga(
5959
pa7,
60-
PgaModeInternal::gain(NonInvertingGain::Gain4),
6160
InternalOutput, // Do not route output to any external pin, use internal AD instead
61+
Gain::Gain4,
6262
);
6363

6464
// Lock opamp2. After the opamp is locked its registers cannot be written
@@ -85,7 +85,7 @@ fn main() -> ! {
8585

8686
#[allow(unreachable_code)]
8787
{
88-
let (_opamp1, _mode, _pin) = _opamp1.disable();
88+
let (_opamp1, _pin) = _opamp1.disable();
8989

9090
loop {
9191
delay.delay_ms(100);

src/adc.rs

+1-1
Original file line numberDiff line numberDiff line change
@@ -93,7 +93,7 @@ macro_rules! adc_opamp {
9393
fn channel() -> u8 { $chan }
9494
}
9595

96-
impl<A, B> Channel<stm32::$adc> for opamp::Pga<$opamp, A, B, InternalOutput> {
96+
impl<A> Channel<stm32::$adc> for opamp::Pga<$opamp, A, InternalOutput> {
9797
type ID = u8;
9898
fn channel() -> u8 { $chan }
9999
}

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