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serial
1 parent a079511 commit 3a0a3d0

10 files changed

+140
-50
lines changed
File renamed without changes.

Cargo.toml

+3-1
Original file line numberDiff line numberDiff line change
@@ -42,6 +42,9 @@ version = "1.0"
4242
[dependencies.embedded-hal-nb]
4343
version = "1.0"
4444

45+
[dependencies.embedded-io]
46+
version = "0.6.1"
47+
4548
[dependencies.stm32-usbd]
4649
version = "0.6.0"
4750
optional = true
@@ -56,7 +59,6 @@ heapless = "0.7.16"
5659
mfrc522 = "0.3.0"
5760
usb-device = "0.2.8"
5861
usbd-serial = "0.1.1"
59-
unwrap-infallible = "0.1.5"
6062

6163
[features]
6264
device-selected = []

examples/serial-interrupt-idle.rs

+1-1
Original file line numberDiff line numberDiff line change
@@ -69,7 +69,7 @@ static mut WIDX: usize = 0;
6969
unsafe fn write(buf: &[u8]) {
7070
if let Some(tx) = TX.as_mut() {
7171
buf.iter()
72-
.for_each(|w| if let Err(_err) = nb::block!(tx.write(*w)) {})
72+
.for_each(|w| if let Err(_err) = nb::block!(tx.write_u8(*w)) {})
7373
}
7474
}
7575
#[interrupt]

examples/serial.rs

+2-3
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,6 @@ use stm32f1xx_hal::{
1919
prelude::*,
2020
serial::{Config, Serial},
2121
};
22-
use unwrap_infallible::UnwrapInfallible;
2322

2423
#[entry]
2524
fn main() -> ! {
@@ -71,7 +70,7 @@ fn main() -> ! {
7170

7271
// Loopback test. Write `X` and wait until the write is successful.
7372
let sent = b'X';
74-
block!(serial.tx.write(sent)).unwrap_infallible();
73+
block!(serial.tx.write_u8(sent)).unwrap();
7574

7675
// Read the byte that was just sent. Blocks until the read is complete
7776
let received = block!(serial.rx.read()).unwrap();
@@ -85,7 +84,7 @@ fn main() -> ! {
8584
// You can also split the serial struct into a receiving and a transmitting part
8685
let (mut tx, mut rx) = serial.split();
8786
let sent = b'Y';
88-
block!(tx.write(sent)).unwrap_infallible();
87+
block!(tx.write_u8(sent)).unwrap();
8988
let received = block!(rx.read()).unwrap();
9089
assert_eq!(received, sent);
9190
asm::bkpt();

examples/serial_9bits.rs

+6-8
Original file line numberDiff line numberDiff line change
@@ -9,16 +9,14 @@
99
#![no_main]
1010
#![no_std]
1111

12-
use core::convert::Infallible;
1312
use cortex_m_rt::entry;
1413
use nb::block;
1514
use panic_halt as _;
1615
use stm32f1xx_hal::{
1716
pac,
1817
prelude::*,
19-
serial::{self, Config, Serial},
18+
serial::{self, Config, Error, Serial},
2019
};
21-
use unwrap_infallible::UnwrapInfallible;
2220

2321
// The address of the slave device.
2422
const SLAVE_ADDR: u8 = 123;
@@ -79,19 +77,19 @@ where
7977
// Send message.
8078
fn send_msg<TX>(serial_tx: &mut TX, msg: &[u8])
8179
where
82-
TX: embedded_hal_02::serial::Write<u8, Error = Infallible>
83-
+ embedded_hal_02::serial::Write<u16, Error = Infallible>,
80+
TX: embedded_hal_02::serial::Write<u8, Error = Error>
81+
+ embedded_hal_02::serial::Write<u16, Error = Error>,
8482
{
8583
// Send address.
86-
block!(serial_tx.write(SLAVE_ADDR as u16 | 0x100)).unwrap_infallible();
84+
block!(serial_tx.write(SLAVE_ADDR as u16 | 0x100)).unwrap();
8785

8886
// Send message len.
8987
assert!(msg.len() <= MSG_MAX_LEN);
90-
block!(serial_tx.write(msg.len() as u8)).unwrap_infallible();
88+
block!(serial_tx.write(msg.len() as u8)).unwrap();
9189

9290
// Send message.
9391
for &b in msg {
94-
block!(serial_tx.write(b)).unwrap_infallible();
92+
block!(serial_tx.write(b)).unwrap();
9593
}
9694
}
9795

examples/serial_config.rs

+2-3
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,6 @@ use stm32f1xx_hal::{
1717
prelude::*,
1818
serial::{self, Serial},
1919
};
20-
use unwrap_infallible::UnwrapInfallible;
2120

2221
#[entry]
2322
fn main() -> ! {
@@ -75,8 +74,8 @@ fn main() -> ! {
7574
let (mut tx, _rx) = serial.split();
7675

7776
let sent = b'U';
78-
block!(tx.write(sent)).unwrap_infallible();
79-
block!(tx.write(sent)).unwrap_infallible();
77+
block!(tx.write_u8(sent)).unwrap();
78+
block!(tx.write_u8(sent)).unwrap();
8079

8180
loop {}
8281
}

examples/serial_reconfigure.rs

+2-3
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,6 @@ use stm32f1xx_hal::{
1919
prelude::*,
2020
serial::{self, Config, Serial},
2121
};
22-
use unwrap_infallible::UnwrapInfallible;
2322

2423
#[entry]
2524
fn main() -> ! {
@@ -71,7 +70,7 @@ fn main() -> ! {
7170

7271
// Loopback test. Write `X` and wait until the write is successful.
7372
let sent = b'X';
74-
block!(serial.tx.write(sent)).unwrap_infallible();
73+
block!(serial.tx.write_u8(sent)).unwrap();
7574

7675
// Read the byte that was just sent. Blocks until the read is complete
7776
let received = block!(serial.rx.read()).unwrap();
@@ -88,7 +87,7 @@ fn main() -> ! {
8887

8988
// Let's see if it works.'
9089
let sent = b'Y';
91-
block!(serial.tx.write(sent)).unwrap_infallible();
90+
block!(serial.tx.write_u8(sent)).unwrap();
9291
let received = block!(serial.rx.read()).unwrap();
9392
assert_eq!(received, sent);
9493
asm::bkpt();

src/serial.rs

+32-15
Original file line numberDiff line numberDiff line change
@@ -49,10 +49,10 @@
4949
//!
5050
//! // Write data (9 bits) to the USART.
5151
//! // Depending on the configuration, only the lower 7, 8, or 9 bits are used.
52-
//! block!(tx.write_u16(0x1FF)).unwrap_infallible();
52+
//! block!(tx.write_u16(0x1FF)).unwrap();
5353
//!
5454
//! // Write 'R' (8 bits) to the USART
55-
//! block!(tx.write(b'R')).unwrap_infallible();
55+
//! block!(tx.write_u8(b'R')).unwrap();
5656
//!
5757
//! // Receive a data (9 bits) from the USART and store it in "received"
5858
//! let received = block!(rx.read_u16()).unwrap();
@@ -61,7 +61,6 @@
6161
//! let received = block!(rx.read()).unwrap();
6262
//! ```
6363
64-
use core::convert::Infallible;
6564
use core::marker::PhantomData;
6665
use core::ops::Deref;
6766
use core::sync::atomic::{self, Ordering};
@@ -134,8 +133,26 @@ inst! {
134133
USART3
135134
}
136135

137-
/// Serial error
138-
pub use embedded_hal_nb::serial::ErrorKind as Error;
136+
/// Serial error kind
137+
///
138+
/// This represents a common set of serial operation errors. HAL implementations are
139+
/// free to define more specific or additional error types. However, by providing
140+
/// a mapping to these common serial errors, generic code can still react to them.
141+
#[derive(Debug, Copy, Clone, Eq, PartialEq, Ord, PartialOrd, Hash)]
142+
#[non_exhaustive]
143+
pub enum Error {
144+
/// The peripheral receive buffer was overrun.
145+
Overrun,
146+
/// Received data does not conform to the peripheral configuration.
147+
/// Can be caused by a misconfigured device on either end of the serial line.
148+
FrameFormat,
149+
/// Parity check failed.
150+
Parity,
151+
/// Serial line is too noisy to read valid data.
152+
Noise,
153+
/// A different error occurred. The original error may contain more information.
154+
Other,
155+
}
139156

140157
pub enum WordLength {
141158
/// When parity is enabled, a word has 7 data bits + 1 parity bit,
@@ -321,7 +338,7 @@ impl<USART: Instance, PINS> Serial<USART, PINS> {
321338
&mut self,
322339
config: impl Into<Config>,
323340
clocks: &Clocks,
324-
) -> nb::Result<(), Infallible> {
341+
) -> nb::Result<(), Error> {
325342
reconfigure(&mut self.tx, &mut self.rx, config, clocks)
326343
}
327344

@@ -403,7 +420,7 @@ pub fn reconfigure<USART: Instance>(
403420
#[allow(unused_variables)] rx: &mut Rx<USART>,
404421
config: impl Into<Config>,
405422
clocks: &Clocks,
406-
) -> nb::Result<(), Infallible> {
423+
) -> nb::Result<(), Error> {
407424
// if we're currently busy transmitting, we have to wait until that is
408425
// over -- regarding reception, we assume that the caller -- with
409426
// exclusive access to the Serial instance due to &mut self -- knows
@@ -419,7 +436,7 @@ impl<USART: Instance> Tx<USART> {
419436
/// If the UART/USART was configured with `WordLength::Bits9`, the 9 least significant bits will
420437
/// be transmitted and the other 7 bits will be ignored. Otherwise, the 8 least significant bits
421438
/// will be transmitted and the other 8 bits will be ignored.
422-
pub fn write_u16(&mut self, word: u16) -> nb::Result<(), Infallible> {
439+
pub fn write_u16(&mut self, word: u16) -> nb::Result<(), Error> {
423440
let usart = unsafe { &*USART::ptr() };
424441

425442
if usart.sr.read().txe().bit_is_set() {
@@ -430,25 +447,25 @@ impl<USART: Instance> Tx<USART> {
430447
}
431448
}
432449

433-
pub fn write(&mut self, word: u8) -> nb::Result<(), Infallible> {
450+
pub fn write_u8(&mut self, word: u8) -> nb::Result<(), Error> {
434451
self.write_u16(word as u16)
435452
}
436453

437-
pub fn bwrite_all_u16(&mut self, buffer: &[u16]) -> Result<(), Infallible> {
454+
pub fn bwrite_all_u16(&mut self, buffer: &[u16]) -> Result<(), Error> {
438455
for &w in buffer {
439456
nb::block!(self.write_u16(w))?;
440457
}
441458
Ok(())
442459
}
443460

444-
pub fn bwrite_all(&mut self, buffer: &[u8]) -> Result<(), Infallible> {
461+
pub fn bwrite_all_u8(&mut self, buffer: &[u8]) -> Result<(), Error> {
445462
for &w in buffer {
446-
nb::block!(self.write(w))?;
463+
nb::block!(self.write_u8(w))?;
447464
}
448465
Ok(())
449466
}
450467

451-
pub fn flush(&mut self) -> nb::Result<(), Infallible> {
468+
pub fn flush(&mut self) -> nb::Result<(), Error> {
452469
let usart = unsafe { &*USART::ptr() };
453470

454471
if usart.sr.read().tc().bit_is_set() {
@@ -458,7 +475,7 @@ impl<USART: Instance> Tx<USART> {
458475
}
459476
}
460477

461-
pub fn bflush(&mut self) -> Result<(), Infallible> {
478+
pub fn bflush(&mut self) -> Result<(), Error> {
462479
nb::block!(self.flush())
463480
}
464481

@@ -485,7 +502,7 @@ impl<USART: Instance> Tx<USART> {
485502
impl<USART: Instance> core::fmt::Write for Tx<USART> {
486503
fn write_str(&mut self, s: &str) -> core::fmt::Result {
487504
s.bytes()
488-
.try_for_each(|c| nb::block!(self.write(c)))
505+
.try_for_each(|c| nb::block!(self.write_u8(c)))
489506
.map_err(|_| core::fmt::Error)
490507
}
491508
}

src/serial/hal_02.rs

+12-12
Original file line numberDiff line numberDiff line change
@@ -2,10 +2,10 @@ use super::*;
22
use embedded_hal_02::{blocking::serial as blocking, serial};
33

44
impl<USART: Instance> serial::Write<u8> for Tx<USART> {
5-
type Error = Infallible;
5+
type Error = Error;
66

77
fn write(&mut self, word: u8) -> nb::Result<(), Self::Error> {
8-
self.write(word)
8+
self.write_u8(word)
99
}
1010

1111
fn flush(&mut self) -> nb::Result<(), Self::Error> {
@@ -14,7 +14,7 @@ impl<USART: Instance> serial::Write<u8> for Tx<USART> {
1414
}
1515

1616
impl<USART: Instance> serial::Write<u16> for Tx<USART> {
17-
type Error = Infallible;
17+
type Error = Error;
1818

1919
fn write(&mut self, word: u16) -> nb::Result<(), Self::Error> {
2020
self.write_u16(word)
@@ -42,10 +42,10 @@ impl<USART: Instance> serial::Read<u16> for Rx<USART> {
4242
}
4343

4444
impl<USART: Instance, PINS> serial::Write<u8> for Serial<USART, PINS> {
45-
type Error = Infallible;
45+
type Error = Error;
4646

4747
fn write(&mut self, word: u8) -> nb::Result<(), Self::Error> {
48-
self.tx.write(word)
48+
self.tx.write_u8(word)
4949
}
5050

5151
fn flush(&mut self) -> nb::Result<(), Self::Error> {
@@ -54,7 +54,7 @@ impl<USART: Instance, PINS> serial::Write<u8> for Serial<USART, PINS> {
5454
}
5555

5656
impl<USART: Instance, PINS> serial::Write<u16> for Serial<USART, PINS> {
57-
type Error = Infallible;
57+
type Error = Error;
5858

5959
fn write(&mut self, word: u16) -> nb::Result<(), Self::Error> {
6060
self.tx.write_u16(word)
@@ -84,10 +84,10 @@ impl<USART: Instance, PINS> serial::Read<u16> for Serial<USART, PINS> {
8484
// Blocking
8585

8686
impl<USART: Instance> blocking::Write<u8> for Tx<USART> {
87-
type Error = Infallible;
87+
type Error = Error;
8888

8989
fn bwrite_all(&mut self, buffer: &[u8]) -> Result<(), Self::Error> {
90-
self.bwrite_all(buffer)
90+
self.bwrite_all_u8(buffer)
9191
}
9292

9393
fn bflush(&mut self) -> Result<(), Self::Error> {
@@ -96,7 +96,7 @@ impl<USART: Instance> blocking::Write<u8> for Tx<USART> {
9696
}
9797

9898
impl<USART: Instance> blocking::Write<u16> for Tx<USART> {
99-
type Error = Infallible;
99+
type Error = Error;
100100

101101
fn bwrite_all(&mut self, buffer: &[u16]) -> Result<(), Self::Error> {
102102
self.bwrite_all_u16(buffer)
@@ -108,10 +108,10 @@ impl<USART: Instance> blocking::Write<u16> for Tx<USART> {
108108
}
109109

110110
impl<USART: Instance, PINS> blocking::Write<u8> for Serial<USART, PINS> {
111-
type Error = Infallible;
111+
type Error = Error;
112112

113113
fn bwrite_all(&mut self, buffer: &[u8]) -> Result<(), Self::Error> {
114-
self.tx.bwrite_all(buffer)
114+
self.tx.bwrite_all_u8(buffer)
115115
}
116116

117117
fn bflush(&mut self) -> Result<(), Self::Error> {
@@ -120,7 +120,7 @@ impl<USART: Instance, PINS> blocking::Write<u8> for Serial<USART, PINS> {
120120
}
121121

122122
impl<USART: Instance, PINS> blocking::Write<u16> for Serial<USART, PINS> {
123-
type Error = Infallible;
123+
type Error = Error;
124124

125125
fn bwrite_all(&mut self, buffer: &[u16]) -> Result<(), Self::Error> {
126126
self.tx.bwrite_all_u16(buffer)

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