Skip to content

Commit 4c4db73

Browse files
burrbullburrbull
authored
Merge pull request #506 from stm32-rs/cc
gpio field enums
2 parents 11ada00 + 38ef8bd commit 4c4db73

12 files changed

+228
-175
lines changed

‎CHANGELOG.md

+10-4
Original file line numberDiff line numberDiff line change
@@ -11,10 +11,10 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
1111

1212
- Relax pin type generics for `Serial`, `I2c`, `Spi`, `Can`. [#462]
1313
Use enums of pin tuples and `Enum::from<(tuple)>` for pin remap before passing to peripheral.
14-
Remove `RemapStruct`s. [#462]
14+
Remove `RemapStruct`s. [#462] [#506]
1515
- Use independent `Spi` and `SpiSlave` structures instead of `OP` generic [#462]
1616
- Take `&Clocks` instead of `Clocks` [#498]
17-
- Temporary replace `stm32f1` with `stm32f1-staging`
17+
- Temporary replace `stm32f1` with `stm32f1-staging` [#503]
1818

1919
### Changed
2020

@@ -23,8 +23,9 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
2323
- Replace UB code by a legitimate pointer access [#480]
2424
- Fix flash error flag clearing [#489]
2525
- Clarify README for windows users [#496]
26-
- Check "device selected" in `build.rs`
27-
- Unmacro `dma.rs`
26+
- Check "device selected" in `build.rs` [#502]
27+
- Use gpio field enums internally [#506]
28+
- Unmacro `dma.rs` [#505]
2829

2930
### Added
3031

@@ -35,6 +36,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
3536
- Reexport `Direction` from `qei` [#479]
3637
- Add DAC [#483]
3738
- Add an option to allow overclocking [#494]
39+
- `new` on gpio mode [#506]
3840

3941
[#416]: https://github.com/stm32-rs/stm32f1xx-hal/pull/416
4042
[#453]: https://github.com/stm32-rs/stm32f1xx-hal/pull/453
@@ -48,6 +50,10 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
4850
[#494]: https://github.com/stm32-rs/stm32f1xx-hal/pull/494
4951
[#496]: https://github.com/stm32-rs/stm32f1xx-hal/pull/496
5052
[#498]: https://github.com/stm32-rs/stm32f1xx-hal/pull/498
53+
[#502]: https://github.com/stm32-rs/stm32f1xx-hal/pull/502
54+
[#503]: https://github.com/stm32-rs/stm32f1xx-hal/pull/503
55+
[#505]: https://github.com/stm32-rs/stm32f1xx-hal/pull/505
56+
[#506]: https://github.com/stm32-rs/stm32f1xx-hal/pull/506
5157

5258
## [v0.10.0] - 2022-12-12
5359

‎examples/blinky_timer_irq.rs

+4-3
Original file line numberDiff line numberDiff line change
@@ -15,7 +15,7 @@ use panic_halt as _;
1515
use stm32f1xx_hal as hal;
1616

1717
use crate::hal::{
18-
gpio::{gpioc, Output, PushPull},
18+
gpio::{gpioc, Output, PinState, PushPull},
1919
pac::{interrupt, Interrupt, Peripherals, TIM2},
2020
prelude::*,
2121
timer::{CounterMs, Event},
@@ -79,8 +79,9 @@ fn main() -> ! {
7979

8080
// Configure PC13 pin to blink LED
8181
let mut gpioc = dp.GPIOC.split();
82-
let mut led = gpioc.pc13.into_push_pull_output(&mut gpioc.crh);
83-
let _ = led.set_high(); // Turn off
82+
let led = Output::new(gpioc.pc13, &mut gpioc.crh, PinState::High);
83+
//or
84+
//let led = gpioc.pc13.into_push_pull_output_with_state(&mut gpioc.crh, PinState::High);
8485

8586
// Move the pin into our global storage
8687
cortex_m::interrupt::free(|cs| *G_LED.borrow(cs).borrow_mut() = Some(led));

‎examples/can-echo.rs

+3-5
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@ use panic_halt as _;
1010
use bxcan::filter::Mask32;
1111
use cortex_m_rt::entry;
1212
use nb::block;
13-
use stm32f1xx_hal::{gpio::Floating, pac, prelude::*};
13+
use stm32f1xx_hal::{pac, prelude::*};
1414

1515
#[entry]
1616
fn main() -> ! {
@@ -31,7 +31,7 @@ fn main() -> ! {
3131
let rx = gpioa.pa11;
3232
let tx = gpioa.pa12;
3333

34-
let can = dp.CAN1.can::<Floating>(
34+
let can = dp.CAN1.can(
3535
#[cfg(not(feature = "connectivity"))]
3636
dp.USB,
3737
(tx, rx, &mut afio.mapr),
@@ -51,9 +51,7 @@ fn main() -> ! {
5151
#[cfg(feature = "connectivity")]
5252
let _can2 = {
5353
let gpiob = dp.GPIOB.split();
54-
let can = dp
55-
.CAN2
56-
.can::<Floating>((gpiob.pb6, gpiob.pb5, &mut afio.mapr));
54+
let can = dp.CAN2.can((gpiob.pb6, gpiob.pb5, &mut afio.mapr));
5755

5856
// APB1 (PCLK1): 8MHz, Bit rate: 125kBit/s, Sample Point 87.5%
5957
// Value was calculated with http://www.bittiming.can-wiki.info/

‎examples/serial_9bits.rs

+5-4
Original file line numberDiff line numberDiff line change
@@ -13,10 +13,9 @@ use cortex_m_rt::entry;
1313
use nb::block;
1414
use panic_halt as _;
1515
use stm32f1xx_hal::{
16-
gpio::{Floating, PushPull},
1716
pac,
1817
prelude::*,
19-
serial::{self, Config, Error, Serial},
18+
serial::{self, Config, Error},
2019
};
2120

2221
// The address of the slave device.
@@ -119,8 +118,10 @@ fn main() -> ! {
119118

120119
// Set up the usart device. Take ownership over the USART register and tx/rx pins. The rest of
121120
// the registers are used to enable and configure the device.
122-
let serial = Serial::<_, PushPull, Floating>::new(
123-
p.USART3,
121+
//
122+
//let serial = Serial::<_, PushPull, Floating>::new(p.USART3,
123+
// or shorter
124+
let serial = p.USART3.serial(
124125
(tx_pin, rx_pin, &mut afio.mapr),
125126
Config::default()
126127
.baudrate(9600.bps())

‎examples/spi-slave.rs

+1-2
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,6 @@ pub const MODE: Mode = Mode {
2020
};
2121

2222
use stm32f1xx_hal::{
23-
gpio::Floating,
2423
pac::{self, interrupt, Peripherals, SPI2},
2524
prelude::*,
2625
spi::{Event, SpiSlave},
@@ -49,7 +48,7 @@ fn main() -> ! {
4948

5049
let spi1 = dp
5150
.SPI1
52-
.spi::<Floating>((sck, miso, mosi, &mut afio.mapr), MODE, 10.kHz(), &clocks);
51+
.spi((sck, miso, mosi, &mut afio.mapr), MODE, 10.kHz(), &clocks);
5352

5453
// SPI2
5554
// Convert pins before SPI initialization

‎src/adc.rs

+20-37
Original file line numberDiff line numberDiff line change
@@ -400,11 +400,10 @@ macro_rules! adc_hal {
400400
self.rb.sqr3().modify(|_, w| unsafe { w.sq1().bits(chan) });
401401

402402
// ADC start conversion of regular sequence
403-
self.rb.cr2().modify(|_, w|
404-
w
405-
.swstart().set_bit()
406-
.align().bit(self.align.into())
407-
);
403+
self.rb.cr2().modify(|_, w| {
404+
w.swstart().set_bit();
405+
w.align().bit(self.align.into())
406+
});
408407
while self.rb.cr2().read().swstart().bit_is_set() {}
409408
// ADC wait for conversion results
410409
while self.rb.sr().read().eoc().bit_is_clear() {}
@@ -680,14 +679,10 @@ macro_rules! adcdma {
680679
Self: SetChannels<PINS>,
681680
{
682681
self.rb.cr2().modify(|_, w| {
683-
w.adon()
684-
.clear_bit()
685-
.dma()
686-
.clear_bit()
687-
.cont()
688-
.clear_bit()
689-
.align()
690-
.bit(self.align.into())
682+
w.adon().clear_bit();
683+
w.dma().clear_bit();
684+
w.cont().clear_bit();
685+
w.align().bit(self.align.into())
691686
});
692687
self.rb
693688
.cr1()
@@ -761,18 +756,12 @@ macro_rules! adcdma {
761756
atomic::compiler_fence(Ordering::Release);
762757

763758
self.channel.ch().cr().modify(|_, w| {
764-
w.mem2mem()
765-
.clear_bit()
766-
.pl()
767-
.medium()
768-
.msize()
769-
.bits16()
770-
.psize()
771-
.bits16()
772-
.circ()
773-
.set_bit()
774-
.dir()
775-
.clear_bit()
759+
w.mem2mem().clear_bit();
760+
w.pl().medium();
761+
w.msize().bits16();
762+
w.psize().bits16();
763+
w.circ().set_bit();
764+
w.dir().clear_bit()
776765
});
777766

778767
self.start();
@@ -799,18 +788,12 @@ macro_rules! adcdma {
799788

800789
atomic::compiler_fence(Ordering::Release);
801790
self.channel.ch().cr().modify(|_, w| {
802-
w.mem2mem()
803-
.clear_bit()
804-
.pl()
805-
.medium()
806-
.msize()
807-
.bits16()
808-
.psize()
809-
.bits16()
810-
.circ()
811-
.clear_bit()
812-
.dir()
813-
.clear_bit()
791+
w.mem2mem().clear_bit();
792+
w.pl().medium();
793+
w.msize().bits16();
794+
w.psize().bits16();
795+
w.circ().clear_bit();
796+
w.dir().clear_bit()
814797
});
815798
self.start();
816799

‎src/can.rs

+10-10
Original file line numberDiff line numberDiff line change
@@ -122,34 +122,34 @@ macro_rules! remap {
122122
use remap;
123123

124124
pub trait CanExt: Sized + Instance {
125-
fn can<PULL>(
125+
fn can(
126126
self,
127127
#[cfg(not(feature = "connectivity"))] usb: pac::USB,
128-
pins: impl Into<Self::Pins<PULL>>,
129-
) -> Can<Self, PULL>;
130-
fn can_loopback<PULL>(
128+
pins: impl Into<Self::Pins<Floating>>,
129+
) -> Can<Self, Floating>;
130+
fn can_loopback(
131131
self,
132132
#[cfg(not(feature = "connectivity"))] usb: pac::USB,
133-
) -> Can<Self, PULL>;
133+
) -> Can<Self, Floating>;
134134
}
135135

136136
impl<CAN: Instance> CanExt for CAN {
137-
fn can<PULL>(
137+
fn can(
138138
self,
139139
#[cfg(not(feature = "connectivity"))] usb: pac::USB,
140-
pins: impl Into<Self::Pins<PULL>>,
141-
) -> Can<Self, PULL> {
140+
pins: impl Into<Self::Pins<Floating>>,
141+
) -> Can<Self, Floating> {
142142
Can::new(
143143
self,
144144
#[cfg(not(feature = "connectivity"))]
145145
usb,
146146
pins,
147147
)
148148
}
149-
fn can_loopback<PULL>(
149+
fn can_loopback(
150150
self,
151151
#[cfg(not(feature = "connectivity"))] usb: pac::USB,
152-
) -> Can<Self, PULL> {
152+
) -> Can<Self, Floating> {
153153
Can::new_loopback(
154154
self,
155155
#[cfg(not(feature = "connectivity"))]

0 commit comments

Comments
 (0)