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nicolas-robinburrbull
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add an option to allow overclocking
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CHANGELOG.md

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@@ -15,11 +15,14 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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- Add dac
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- Fix flash error flag clearing
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- Clarify README for windows users
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- Add an option to allow overclocking [#494]
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### Added
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- Allow to set HSE bypass bit in `RCC` clock configuration register to use an external clock input on the `OSC_IN` pin
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- support `embedded-hal-1.0`
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[#494]: https://github.com/stm32-rs/stm32f1xx-hal/pull/494
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## [v0.10.0] - 2022-12-12
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src/rcc.rs

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@@ -507,6 +507,7 @@ pub struct Config {
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#[cfg(any(feature = "stm32f103", feature = "connectivity"))]
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pub usbpre: UsbPre,
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pub adcpre: AdcPre,
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pub allow_overclock: bool,
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}
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impl Default for Config {
@@ -521,6 +522,7 @@ impl Default for Config {
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#[cfg(any(feature = "stm32f103", feature = "connectivity"))]
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usbpre: UsbPre::Div15,
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adcpre: AdcPre::Div2,
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allow_overclock: false,
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}
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}
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}
@@ -681,6 +683,7 @@ impl Config {
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#[cfg(any(feature = "stm32f103", feature = "connectivity"))]
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usbpre,
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adcpre: apre_bits,
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allow_overclock: false,
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}
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}
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@@ -724,11 +727,12 @@ impl Config {
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);
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assert!(
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sysclk <= 72_000_000
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&& hclk <= 72_000_000
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&& pclk1 <= 36_000_000
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&& pclk2 <= 72_000_000
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&& adcclk <= 14_000_000
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self.allow_overclock
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|| (sysclk <= 72_000_000
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&& hclk <= 72_000_000
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&& pclk1 <= 36_000_000
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&& pclk2 <= 72_000_000
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&& adcclk <= 14_000_000)
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);
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Clocks {
@@ -763,6 +767,7 @@ fn rcc_config_usb() {
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#[cfg(any(feature = "stm32f103", feature = "connectivity"))]
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usbpre: UsbPre::Div1,
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adcpre: AdcPre::Div8,
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allow_overclock: false,
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};
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assert_eq!(config, config_expected);
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