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ag88ag88
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ag88
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fix(variants): WeActMiniH7xx and DevEBoxH7xx enable peripheral pll clks (#1585)
in previous commit some clocks from PLL2, PLL3 are not distributed to some peripherals: #1552 #1585 Originally to save some power. However, users using those peripherals may mistake that it is not working. This fix distributes the missed out PLL clocks to all peripherals those clocks are at 80 MHz Co-authored-by: ag88 <[email protected]>
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+12
-24
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+12
-24
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Diff for: variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_DevEBoxH7xx.cpp

+6-12
Original file line numberDiff line numberDiff line change
@@ -235,29 +235,23 @@ WEAK void SystemClock_Config(void)
235235
// QSPI from PLL1 qclk
236236
PeriphClkInitStruct.QspiClockSelection = RCC_QSPICLKSOURCE_PLL;
237237
// SDMMC from PLL1 qclk
238-
PeriphClkInitStruct.SdmmcClockSelection = 0;
239-
//PeriphClkInitStruct.SdmmcClockSelection = RCC_SDMMCCLKSOURCE_PLL;
238+
PeriphClkInitStruct.SdmmcClockSelection = RCC_SDMMCCLKSOURCE_PLL;
240239
// LPUART from PLL2 qclk
241-
PeriphClkInitStruct.Lpuart1ClockSelection = 0;
242-
//PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2;
240+
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2;
243241
// USART from PLL2 qclk
244242
PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_PLL2;
245243
// USART from PLL2 qclk
246-
PeriphClkInitStruct.Usart234578ClockSelection = 0;
247-
//PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_PLL2;
244+
PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_PLL2;
248245
// I2C123 from PLL3 rclk
249246
PeriphClkInitStruct.I2c123ClockSelection = RCC_I2C123CLKSOURCE_PLL3;
250247
// I2C4 from PLL3 rclk
251-
PeriphClkInitStruct.I2c4ClockSelection = 0;
252-
//PeriphClkInitStruct.I2c4ClockSelection = RCC_I2C4CLKSOURCE_PLL3;
248+
PeriphClkInitStruct.I2c4ClockSelection = RCC_I2C4CLKSOURCE_PLL3;
253249
// SPI123 from PLL2 pclk
254250
PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL2;
255251
// SPI45 from PLL2 qclk
256-
PeriphClkInitStruct.Spi45ClockSelection = 0;
257-
//PeriphClkInitStruct.Spi45ClockSelection = RCC_SPI45CLKSOURCE_PLL2;
252+
PeriphClkInitStruct.Spi45ClockSelection = RCC_SPI45CLKSOURCE_PLL2;
258253
// SPI6 from PLL2 qclk
259-
PeriphClkInitStruct.Spi6ClockSelection = 0;
260-
//PeriphClkInitStruct.Spi6ClockSelection = RCC_SPI6CLKSOURCE_PLL2;
254+
PeriphClkInitStruct.Spi6ClockSelection = RCC_SPI6CLKSOURCE_PLL2;
261255

262256

263257
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {

Diff for: variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH7xx.cpp

+6-12
Original file line numberDiff line numberDiff line change
@@ -235,29 +235,23 @@ WEAK void SystemClock_Config(void)
235235
// QSPI from PLL1 qclk
236236
PeriphClkInitStruct.QspiClockSelection = RCC_QSPICLKSOURCE_PLL;
237237
// SDMMC from PLL1 qclk
238-
PeriphClkInitStruct.SdmmcClockSelection = 0;
239-
//PeriphClkInitStruct.SdmmcClockSelection = RCC_SDMMCCLKSOURCE_PLL;
238+
PeriphClkInitStruct.SdmmcClockSelection = RCC_SDMMCCLKSOURCE_PLL;
240239
// LPUART from PLL2 qclk
241-
PeriphClkInitStruct.Lpuart1ClockSelection = 0;
242-
//PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2;
240+
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2;
243241
// USART from PLL2 qclk
244242
PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_PLL2;
245243
// USART from PLL2 qclk
246-
PeriphClkInitStruct.Usart234578ClockSelection = 0;
247-
//PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_PLL2;
244+
PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_PLL2;
248245
// I2C123 from PLL3 rclk
249246
PeriphClkInitStruct.I2c123ClockSelection = RCC_I2C123CLKSOURCE_PLL3;
250247
// I2C4 from PLL3 rclk
251-
PeriphClkInitStruct.I2c4ClockSelection = 0;
252-
//PeriphClkInitStruct.I2c4ClockSelection = RCC_I2C4CLKSOURCE_PLL3;
248+
PeriphClkInitStruct.I2c4ClockSelection = RCC_I2C4CLKSOURCE_PLL3;
253249
// SPI123 from PLL2 pclk
254250
PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL2;
255251
// SPI45 from PLL2 qclk
256-
PeriphClkInitStruct.Spi45ClockSelection = 0;
257-
//PeriphClkInitStruct.Spi45ClockSelection = RCC_SPI45CLKSOURCE_PLL2;
252+
PeriphClkInitStruct.Spi45ClockSelection = RCC_SPI45CLKSOURCE_PLL2;
258253
// SPI6 from PLL2 qclk
259-
PeriphClkInitStruct.Spi6ClockSelection = 0;
260-
//PeriphClkInitStruct.Spi6ClockSelection = RCC_SPI6CLKSOURCE_PLL2;
254+
PeriphClkInitStruct.Spi6ClockSelection = RCC_SPI6CLKSOURCE_PLL2;
261255

262256

263257
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {

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