diff --git a/README.md b/README.md index a06ea59da8..6e9835de45 100644 --- a/README.md +++ b/README.md @@ -94,6 +94,12 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | :---: | --- | :---: | :--- | | :green_heart: | [STEVAL-MKSBOX1V1 (SensorTile.box)](https://www.st.com/en/evaluation-tools/steval-mksbox1v1.html) | *1.7.0* | | +| Status | [STM32MP1 series coprocessor](https://www.st.com/content/st_com/en/products/microcontrollers-microprocessors/stm32-arm-cortex-mpus/stm32mp1-series.html) | Release | Comment | +| :---: | --- | :---: | :--- | +| :yellow_heart: | [STM32MP157A-DK1](https://www.st.com/en/evaluation-tools/stm32mp157a-dk1.html) | **1.8.0** | See [the documentation](https://github.com/stm32duino/Arduino_Core_STM32/tree/master/variants/STM32MP157_DK/README.md) to use this board| +| :yellow_heart: | [STM32MP157C-DK2](https://www.st.com/en/evaluation-tools/stm32mp157c-dk2.html) | **1.8.0** | See [the documentation](https://github.com/stm32duino/Arduino_Core_STM32/tree/master/variants/STM32MP157_DK/README.md) to use this board| + + | Status | Generic STM32F0xx | Release | Comment | | :---: | --- | :---: | :--- | | :green_heart: | [STM32F030F4 Demo board](https://stm32-base.org/boards/STM32F030F4P6-STM32F030-DEMO-BOARD-V1.1) | *1.5.0* | | diff --git a/boards.txt b/boards.txt index 60734d2a92..6343c08e06 100644 --- a/boards.txt +++ b/boards.txt @@ -663,6 +663,40 @@ Eval.menu.upload_method.dfuMethod.upload.protocol=2 Eval.menu.upload_method.dfuMethod.upload.options=-g Eval.menu.upload_method.dfuMethod.upload.tool=stm32CubeProg +################################################################################ +# STM32MP1 microprocessor series (MPU + MCU) + +STM32MP1.name=STM32MP1 series coprocessor + +STM32MP1.build.vid=0x0483 +STM32MP1.build.core=arduino +STM32MP1.build.board=STM32MP1 +STM32MP1.build.mcu=cortex-m4 +STM32MP1.build.flags.fp=-mfpu=fpv4-sp-d16 -mfloat-abi=hard +STM32MP1.build.series=STM32MP1xx +STM32MP1.build.cmsis_lib_gcc=arm_cortexM4l_math +STM32MP1.build.extra_flags=-DCORE_CM4 -DUSE_FULL_LL_DRIVER -D{build.product_line} {build.xSerial} + +# STM32MP157A-DK1 board +STM32MP1.menu.pnum.STM32MP157A_DK1=STM32MP157A-DK1 +STM32MP1.menu.pnum.STM32MP157A_DK1.upload.maximum_size=131072 +STM32MP1.menu.pnum.STM32MP157A_DK1.upload.maximum_data_size=131072 +STM32MP1.menu.pnum.STM32MP157A_DK1.build.board=STM32MP157A_DK1 +STM32MP1.menu.pnum.STM32MP157A_DK1.build.product_line=STM32MP157Axx +STM32MP1.menu.pnum.STM32MP157A_DK1.build.variant=STM32MP157_DK + +# STM32MP157C-DK2 board +STM32MP1.menu.pnum.STM32MP157C_DK2=STM32MP157C-DK2 +STM32MP1.menu.pnum.STM32MP157C_DK2.upload.maximum_size=131072 +STM32MP1.menu.pnum.STM32MP157C_DK2.upload.maximum_data_size=131072 +STM32MP1.menu.pnum.STM32MP157C_DK2.build.board=STM32MP157C_DK2 +STM32MP1.menu.pnum.STM32MP157C_DK2.build.product_line=STM32MP157Cxx +STM32MP1.menu.pnum.STM32MP157C_DK2.build.variant=STM32MP157_DK + +# Upload menu +STM32MP1.menu.upload_method.MassStorage=Generate run_arduino.sh (You need to copy this manually) +STM32MP1.menu.upload_method.MassStorage.upload.protocol= +STM32MP1.menu.upload_method.MassStorage.upload.tool=remoteproc_gen ################################################################################ # Other boards @@ -1451,6 +1485,13 @@ Eval.menu.xserial.none.build.xSerial=-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE Eval.menu.xserial.disabled=Disabled (no Serial support) Eval.menu.xserial.disabled.build.xSerial= +STM32MP1.menu.xserial.generic=UART only (generic 'Serial') +STM32MP1.menu.xserial.generic.build.xSerial=-DHAL_UART_MODULE_ENABLED +STM32MP1.menu.xserial.none=UART only (no generic 'Serial') +STM32MP1.menu.xserial.none.build.xSerial=-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE +STM32MP1.menu.xserial.disabled=Disabled (no Serial support) +STM32MP1.menu.xserial.disabled.build.xSerial= + GenF0.menu.xserial.generic=Enabled (generic 'Serial') GenF0.menu.xserial.none=Enabled (no generic 'Serial') GenF0.menu.xserial.none.build.xSerial=-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE @@ -1752,6 +1793,24 @@ Eval.menu.opt.o3lto.build.flags.optimize=-O3 -flto Eval.menu.opt.ogstd=Debug (-g) Eval.menu.opt.ogstd.build.flags.optimize=-g -Og +STM32MP1.menu.opt.osstd=Smallest (-Os default) +STM32MP1.menu.opt.oslto=Smallest (-Os) with LTO +STM32MP1.menu.opt.oslto.build.flags.optimize=-Os -flto +STM32MP1.menu.opt.o1std=Fast (-O1) +STM32MP1.menu.opt.o1std.build.flags.optimize=-O1 +STM32MP1.menu.opt.o1lto=Fast (-O1) with LTO +STM32MP1.menu.opt.o1lto.build.flags.optimize=-O1 -flto +STM32MP1.menu.opt.o2std=Faster (-O2) +STM32MP1.menu.opt.o2std.build.flags.optimize=-O2 +STM32MP1.menu.opt.o2lto=Faster (-O2) with LTO +STM32MP1.menu.opt.o2lto.build.flags.optimize=-O2 -flto +STM32MP1.menu.opt.o3std=Fastest (-O3) +STM32MP1.menu.opt.o3std.build.flags.optimize=-O3 +STM32MP1.menu.opt.o3lto=Fastest (-O3) with LTO +STM32MP1.menu.opt.o3lto.build.flags.optimize=-O3 -flto +STM32MP1.menu.opt.ogstd=Debug (-g) +STM32MP1.menu.opt.ogstd.build.flags.optimize=-g -Og + GenF0.menu.opt.osstd=Smallest (-Os default) GenF0.menu.opt.oslto=Smallest (-Os) with LTO GenF0.menu.opt.oslto.build.flags.optimize=-Os -flto @@ -1985,6 +2044,16 @@ Eval.menu.rtlib.nanofps.build.flags.ldspecs=--specs=nano.specs -u _printf_float Eval.menu.rtlib.full=Newlib Standard Eval.menu.rtlib.full.build.flags.ldspecs= +STM32MP1.menu.rtlib.nano=Newlib Nano (default) +STM32MP1.menu.rtlib.nanofp=Newlib Nano + Float Printf +STM32MP1.menu.rtlib.nanofp.build.flags.ldspecs=--specs=nano.specs -u _printf_float +STM32MP1.menu.rtlib.nanofs=Newlib Nano + Float Scanf +STM32MP1.menu.rtlib.nanofs.build.flags.ldspecs=--specs=nano.specs -u _scanf_float +STM32MP1.menu.rtlib.nanofps=Newlib Nano + Float Printf/Scanf +STM32MP1.menu.rtlib.nanofps.build.flags.ldspecs=--specs=nano.specs -u _printf_float -u _scanf_float +STM32MP1.menu.rtlib.full=Newlib Standard +STM32MP1.menu.rtlib.full.build.flags.ldspecs= + GenF0.menu.rtlib.nano=Newlib Nano (default) GenF0.menu.rtlib.nanofp=Newlib Nano + Float Printf GenF0.menu.rtlib.nanofp.build.flags.ldspecs=--specs=nano.specs -u _printf_float diff --git a/cores/arduino/HardwareTimer.cpp b/cores/arduino/HardwareTimer.cpp index 081ad5dae4..948997b274 100644 --- a/cores/arduino/HardwareTimer.cpp +++ b/cores/arduino/HardwareTimer.cpp @@ -913,6 +913,11 @@ timer_index_t get_timer_index(TIM_TypeDef *instance) */ uint32_t HardwareTimer::getTimerClkFreq() { +#if defined(STM32MP1xx) + uint8_t timerClkSrc = getTimerClkSrc(_timerObj.handle.Instance); + uint64_t clkSelection = timerClkSrc == 1 ? RCC_PERIPHCLK_TIMG1 : RCC_PERIPHCLK_TIMG2; + return HAL_RCCEx_GetPeriphCLKFreq(clkSelection); +#else RCC_ClkInitTypeDef clkconfig = {}; uint32_t pFLatency = 0U; uint32_t uwTimclock = 0U, uwAPBxPrescaler = 0U; @@ -1028,6 +1033,7 @@ uint32_t HardwareTimer::getTimerClkFreq() } #endif /* STM32H7xx */ return uwTimclock; +#endif /* STM32MP1xx */ } /** diff --git a/cores/arduino/stm32/PinNames.h b/cores/arduino/stm32/PinNames.h index 62913a0c1b..1032947039 100644 --- a/cores/arduino/stm32/PinNames.h +++ b/cores/arduino/stm32/PinNames.h @@ -207,6 +207,24 @@ typedef enum { PK_13 = (PortK << 4) + 0x0D, PK_14 = (PortK << 4) + 0x0E, PK_15 = (PortK << 4) + 0x0F, +#endif +#if defined GPIOZ_BASE + PZ_0 = (PortZ << 4) + 0x00, + PZ_1 = (PortZ << 4) + 0x01, + PZ_2 = (PortZ << 4) + 0x02, + PZ_3 = (PortZ << 4) + 0x03, + PZ_4 = (PortZ << 4) + 0x04, + PZ_5 = (PortZ << 4) + 0x05, + PZ_6 = (PortZ << 4) + 0x06, + PZ_7 = (PortZ << 4) + 0x07, + PZ_8 = (PortZ << 4) + 0x08, + PZ_9 = (PortZ << 4) + 0x09, + PZ_10 = (PortZ << 4) + 0x0A, + PZ_11 = (PortZ << 4) + 0x0B, + PZ_12 = (PortZ << 4) + 0x0C, + PZ_13 = (PortZ << 4) + 0x0D, + PZ_14 = (PortZ << 4) + 0x0E, + PZ_15 = (PortZ << 4) + 0x0F, #endif // Specific pin name PADC_BASE = 0x100, @@ -221,6 +239,14 @@ typedef enum { #endif #ifdef ADC_CHANNEL_VBAT PADC_VBAT, +#endif + ANA_START, + // ANAx pins for STM32MP1 line, those pins are hard-wired to ADC directly. +#ifdef SYSCFG_PMCSETR_ANA0_SEL_Pos + ANA_0, +#endif +#ifdef SYSCFG_PMCSETR_ANA1_SEL_Pos + ANA_1, #endif // Specific pin name define in the variant #if __has_include("PinNamesVar.h") diff --git a/cores/arduino/stm32/PortNames.c b/cores/arduino/stm32/PortNames.c index da33885d81..af534aea38 100644 --- a/cores/arduino/stm32/PortNames.c +++ b/cores/arduino/stm32/PortNames.c @@ -59,6 +59,9 @@ GPIO_TypeDef *GPIOPort[MAX_NB_PORT] = { #if defined GPIOK_BASE , (GPIO_TypeDef *)GPIOK_BASE #endif +#if defined GPIOZ_BASE + , (GPIO_TypeDef *)GPIOZ_BASE +#endif }; /* Enable GPIO clock and return GPIO base address */ @@ -132,6 +135,12 @@ GPIO_TypeDef *set_GPIO_Port_Clock(uint32_t port_idx) gpioPort = (GPIO_TypeDef *)GPIOK_BASE; __HAL_RCC_GPIOK_CLK_ENABLE(); break; +#endif +#if defined GPIOZ_BASE + case PortZ: + gpioPort = (GPIO_TypeDef *)GPIOZ_BASE; + __HAL_RCC_GPIOZ_CLK_ENABLE(); + break; #endif default: // wrong port number diff --git a/cores/arduino/stm32/PortNames.h b/cores/arduino/stm32/PortNames.h index da17e988a6..45237226ea 100644 --- a/cores/arduino/stm32/PortNames.h +++ b/cores/arduino/stm32/PortNames.h @@ -69,8 +69,11 @@ typedef enum { #if defined GPIOK_BASE PortK, #endif +#if defined GPIOZ_BASE PortZ, - LastPort = PortZ - 1 +#endif + PortEND, + LastPort = PortEND - 1 } PortName; #define MAX_NB_PORT (LastPort-FirstPort+1) diff --git a/cores/arduino/stm32/analog.cpp b/cores/arduino/stm32/analog.cpp index 1cd924a152..61feb5af4f 100644 --- a/cores/arduino/stm32/analog.cpp +++ b/cores/arduino/stm32/analog.cpp @@ -623,9 +623,10 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef *hadc) #ifdef __HAL_RCC_ADC_CLK_ENABLE __HAL_RCC_ADC_CLK_ENABLE(); #endif - /* For STM32F1xx and STM32H7xx, ADC prescaler is configured in + /* For STM32F1xx, STM32H7xx, and STM32MP1xx ADC prescaler is configured in SystemClock_Config (variant.cpp) */ -#if defined(__HAL_RCC_ADC_CONFIG) && !defined(STM32F1xx) && !defined(STM32H7xx) +#if defined(__HAL_RCC_ADC_CONFIG) && !defined(STM32F1xx) && \ + !defined(STM32H7xx) && !defined(STM32MP1xx) /* ADC Periph interface clock configuration */ __HAL_RCC_ADC_CONFIG(RCC_ADCCLKSOURCE_SYSCLK); #endif @@ -766,7 +767,7 @@ uint16_t adc_read_value(PinName pin) uint32_t samplingTime = ADC_SAMPLINGTIME; uint32_t channel = 0; - if (pin & PADC_BASE) { + if ((pin & PADC_BASE) && (pin < ANA_START)) { #if defined(STM32H7xx) AdcHandle.Instance = ADC3; #else @@ -811,7 +812,8 @@ uint16_t adc_read_value(PinName pin) #endif #if !defined(STM32F1xx) && !defined(STM32F2xx) && !defined(STM32F3xx) && \ !defined(STM32F4xx) && !defined(STM32F7xx) && !defined(STM32G4xx) && \ - !defined(STM32H7xx) && !defined(STM32L4xx) && !defined(STM32WBxx) + !defined(STM32H7xx) && !defined(STM32L4xx) && !defined(STM32MP1xx) && \ + !defined(STM32WBxx) AdcHandle.Init.LowPowerAutoPowerOff = DISABLE; /* ADC automatically powers-off after a conversion and automatically wakes-up when a new conversion is triggered */ #endif #ifdef ADC_CHANNELS_BANK_A @@ -829,7 +831,7 @@ uint16_t adc_read_value(PinName pin) #if !defined(STM32F1xx) && !defined(STM32F373xC) && !defined(STM32F378xx) AdcHandle.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; /* Parameter discarded because software trigger chosen */ #endif -#if !defined(STM32F1xx) && !defined(STM32H7xx) && \ +#if !defined(STM32F1xx) && !defined(STM32H7xx) && !defined(STM32MP1xx) && \ !defined(STM32F373xC) && !defined(STM32F378xx) AdcHandle.Init.DMAContinuousRequests = DISABLE; /* DMA one-shot mode selected (not applied to this example) */ #endif diff --git a/cores/arduino/stm32/backup.h b/cores/arduino/stm32/backup.h index 72186c916a..7940c35ce7 100644 --- a/cores/arduino/stm32/backup.h +++ b/cores/arduino/stm32/backup.h @@ -31,7 +31,8 @@ extern "C" { /* Exported macro ------------------------------------------------------------*/ #if (!defined(STM32F0xx) && !defined(STM32F3xx) && !defined(STM32L0xx) &&\ - !defined(STM32L1xx) && !defined(STM32L4xx)) || defined(RTC_BACKUP_SUPPORT) + !defined(STM32L1xx) && !defined(STM32L4xx) && !defined(STM32MP1xx)) || \ + defined(RTC_BACKUP_SUPPORT) #if !defined(STM32L412xx) && !defined(STM32L422xx) #define ENABLE_BACKUP_SUPPORT #endif diff --git a/cores/arduino/stm32/clock.c b/cores/arduino/stm32/clock.c index 33c589e9a8..bf99493283 100644 --- a/cores/arduino/stm32/clock.c +++ b/cores/arduino/stm32/clock.c @@ -43,6 +43,16 @@ extern "C" { #endif +#if defined(STM32MP1xx) +#include "stm32mp1xx_hal.h" +/* STM32MP1xx does not have own stm32mp1xx_ll_cortex.h so define functions manually. + */ +__STATIC_INLINE uint32_t LL_SYSTICK_IsActiveCounterFlag(void) +{ + return ((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) == (SysTick_CTRL_COUNTFLAG_Msk)); +} +#endif + /** * @brief Function called to read the current micro second * @param None @@ -100,6 +110,15 @@ void enableClock(sourceClock_t source) RCC_OscInitTypeDef RCC_OscInitStruct = {0}; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; +#if defined(STM32MP1xx) + /** Clock source selection is done by First Stage Boot Loader on Cortex A + * See variant.cpp for corresponding boards. + */ + if (!IS_ENGINEERING_BOOT_MODE()) { + return; + } +#endif /* STM32MP1xx */ + enableBackupDomain(); switch (source) { @@ -118,7 +137,11 @@ void enableClock(sourceClock_t source) if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) { RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; RCC_OscInitStruct.HSIState = RCC_HSI_ON; +#if defined(STM32MP1xx) + RCC_OscInitStruct.HSICalibrationValue = 0x00; +#else RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; +#endif } break; case LSE_CLOCK: diff --git a/cores/arduino/stm32/hw_config.c b/cores/arduino/stm32/hw_config.c index e5a8281d2e..3434d6da96 100644 --- a/cores/arduino/stm32/hw_config.c +++ b/cores/arduino/stm32/hw_config.c @@ -66,6 +66,10 @@ void hw_config_init(void) USBD_CDC_init(); #endif +#if defined (STM32MP1xx) + __HAL_RCC_HSEM_CLK_ENABLE(); +#endif + } #ifdef __cplusplus } diff --git a/cores/arduino/stm32/interrupt.cpp b/cores/arduino/stm32/interrupt.cpp index 85e872c754..2b8368a419 100644 --- a/cores/arduino/stm32/interrupt.cpp +++ b/cores/arduino/stm32/interrupt.cpp @@ -69,6 +69,23 @@ static gpio_irq_conf_str gpio_irq_conf[NB_EXTI] = { {.irqnb = EXTI4_15_IRQn, .callback = NULL}, //GPIO_PIN_13 {.irqnb = EXTI4_15_IRQn, .callback = NULL}, //GPIO_PIN_14 {.irqnb = EXTI4_15_IRQn, .callback = NULL} //GPIO_PIN_15 +#elif defined (STM32MP1xx) + {.irqnb = EXTI0_IRQn, .callback = NULL}, //GPIO_PIN_0 + {.irqnb = EXTI1_IRQn, .callback = NULL}, //GPIO_PIN_1 + {.irqnb = EXTI2_IRQn, .callback = NULL}, //GPIO_PIN_2 + {.irqnb = EXTI3_IRQn, .callback = NULL}, //GPIO_PIN_3 + {.irqnb = EXTI4_IRQn, .callback = NULL}, //GPIO_PIN_4 + {.irqnb = EXTI5_IRQn, .callback = NULL}, //GPIO_PIN_5 + {.irqnb = EXTI6_IRQn, .callback = NULL}, //GPIO_PIN_6 + {.irqnb = EXTI7_IRQn, .callback = NULL}, //GPIO_PIN_7 + {.irqnb = EXTI8_IRQn, .callback = NULL}, //GPIO_PIN_8 + {.irqnb = EXTI9_IRQn, .callback = NULL}, //GPIO_PIN_9 + {.irqnb = EXTI10_IRQn, .callback = NULL}, //GPIO_PIN_10 + {.irqnb = EXTI11_IRQn, .callback = NULL}, //GPIO_PIN_11 + {.irqnb = EXTI12_IRQn, .callback = NULL}, //GPIO_PIN_12 + {.irqnb = EXTI13_IRQn, .callback = NULL}, //GPIO_PIN_13 + {.irqnb = EXTI14_IRQn, .callback = NULL}, //GPIO_PIN_14 + {.irqnb = EXTI15_IRQn, .callback = NULL} //GPIO_PIN_15 #else {.irqnb = EXTI0_IRQn, .callback = NULL}, //GPIO_PIN_0 {.irqnb = EXTI1_IRQn, .callback = NULL}, //GPIO_PIN_1 diff --git a/cores/arduino/stm32/lock_resource.c b/cores/arduino/stm32/lock_resource.c new file mode 100644 index 0000000000..2f8f85d5da --- /dev/null +++ b/cores/arduino/stm32/lock_resource.c @@ -0,0 +1,94 @@ +/** + ****************************************************************************** + * @file lock_resource.c + * @author MCD Application Team + * @brief This sample code provides hardware semaphore using HSEM for + * synchronization and mutual exclusion between heterogeneous processors + * and those not operating under a single, shared operating system. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2019 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "lock_resource.h" + +#if defined(HAL_HSEM_MODULE_ENABLED) \ + && defined(STM32MP1xx) + +/* Private macro -------------------------------------------------------------*/ + +/* + * This macro provides a semaphore id for a dedicated peripheral. + * This macro shall be configured by user according its needs and aligned with remote processors + * (e.g. same semaphore id shall be used between processors for a dedicated peripheral) + */ +#define GET_HSEM_SEM_INDEX(__Peripheral__) (uint8_t)(((GPIO_TypeDef *)(__Peripheral__) == (GPIOA))? 0U :\ + ((GPIO_TypeDef *)(__Peripheral__) == (GPIOB))? 0U :\ + ((GPIO_TypeDef *)(__Peripheral__) == (GPIOC))? 0U :\ + ((GPIO_TypeDef *)(__Peripheral__) == (GPIOD))? 0U :\ + ((GPIO_TypeDef *)(__Peripheral__) == (GPIOE))? 0U :\ + ((GPIO_TypeDef *)(__Peripheral__) == (GPIOF))? 0U :\ + ((GPIO_TypeDef *)(__Peripheral__) == (GPIOG))? 0U :\ + ((GPIO_TypeDef *)(__Peripheral__) == (GPIOH))? 0U :\ + ((GPIO_TypeDef *)(__Peripheral__) == (GPIOI))? 0U :\ + ((GPIO_TypeDef *)(__Peripheral__) == (GPIOJ))? 0U :\ + ((GPIO_TypeDef *)(__Peripheral__) == (GPIOK))? 0U :\ + ((GPIO_TypeDef *)(__Peripheral__) == (GPIOZ))? 0U :\ + ((EXTI_TypeDef *)(__Peripheral__) == (EXTI))? 1U : HSEM_SEMID_MAX + 1U) + +/* Private user code ---------------------------------------------------------*/ + + +/** + * @brief Periph_Lock function is used for register protection of shared @Peripheral + * and shall be called before accessing registers of this shared @Peripheral + * If Semaphore id is already taken, the function will busy loop waiting for it to + * be released, but give up after @Timeout msecs have elapsed. + * @param Peripheral: used to identify which peripheral to protect. + * Semaphore id deduced from this peripheral. + * Timeout: timeout value in msecs + * @retval Return Status + */ +LockResource_Status_t Periph_Lock(void *Peripheral, uint32_t Timeout) +{ + uint32_t tickstart = 0U; + LockResource_Status_t ret = LOCK_RESOURCE_STATUS_OK; + + /* Init tickstart for timeout management*/ + tickstart = HAL_GetTick(); + + /* Try to Take HSEM assigned to the Peripheral */ + while (HAL_HSEM_FastTake(GET_HSEM_SEM_INDEX(Peripheral)) != HAL_OK) { + + if ((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout)) { + ret = LOCK_RESOURCE_STATUS_TIMEOUT; + Error_Handler(); + } + } + + return ret; +} + +/** + * @brief The Periph_Unlock released a previously-acquired semaphore which we want to unlock + * @param Peripheral: used to identify which peripheral and the related semaphore + * @retval None + */ +void Periph_Unlock(void *Peripheral) +{ + /* Release HSEM */ + HAL_HSEM_Release(GET_HSEM_SEM_INDEX(Peripheral), 0); + +} + +#endif // defined(HAL_HSEM_MODULE_ENABLED) diff --git a/cores/arduino/stm32/lock_resource.h b/cores/arduino/stm32/lock_resource.h new file mode 100644 index 0000000000..acb000c3ab --- /dev/null +++ b/cores/arduino/stm32/lock_resource.h @@ -0,0 +1,52 @@ +/** + ****************************************************************************** + * @file lock_resource.h + * @author MCD Application Team + * @brief Header for lock_resource.c + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2019 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef _LOCK_RESOURCE_H +#define _LOCK_RESOURCE_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm32_def.h" + + +/* Exported types ------------------------------------------------------------*/ +typedef enum { + LOCK_RESOURCE_STATUS_OK = 0x00U, + LOCK_RESOURCE_STATUS_ERROR = 0x01U, + LOCK_RESOURCE_STATUS_TIMEOUT = 0x02U +} LockResource_Status_t; + +/* Exported constants --------------------------------------------------------*/ +#define LOCK_RESOURCE_TIMEOUT 100U /* timeout in ms */ + +/* Exported macro ------------------------------------------------------------*/ +#define PERIPH_LOCK(__Periph__) Periph_Lock(__Periph__, LOCK_RESOURCE_TIMEOUT) +#define PERIPH_UNLOCK(__Periph__) Periph_Unlock(__Periph__) + +/* Exported functions ------------------------------------------------------- */ +LockResource_Status_t Periph_Lock(void *Peripheral, uint32_t Timeout); +void Periph_Unlock(void *Peripheral); + + + + +#endif /* _LOCK_RESOURCE_H */ + + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/cores/arduino/stm32/low_power.c b/cores/arduino/stm32/low_power.c index 8275fa0fc0..28a37f2e20 100644 --- a/cores/arduino/stm32/low_power.c +++ b/cores/arduino/stm32/low_power.c @@ -63,7 +63,7 @@ static void (*WakeUpUartCb)(void) = NULL; */ void LowPower_init() { -#if !defined(STM32H7xx) && ! defined(STM32WBxx) +#if !defined(STM32H7xx) && !defined(STM32MP1xx) && !defined(STM32WBxx) /* Enable Power Clock */ __HAL_RCC_PWR_CLK_ENABLE(); #endif diff --git a/cores/arduino/stm32/pinconfig.h b/cores/arduino/stm32/pinconfig.h index 4db6bf971e..73c688c504 100644 --- a/cores/arduino/stm32/pinconfig.h +++ b/cores/arduino/stm32/pinconfig.h @@ -34,6 +34,10 @@ #include "PinAF_STM32F1.h" #include "stm32yyxx_ll_gpio.h" +#if defined(STM32MP1xx) +#include "lock_resource.h" +#endif + static inline void pin_DisconnectDebug(PinName pin) { #ifdef STM32F1xx @@ -45,6 +49,9 @@ static inline void pin_DisconnectDebug(PinName pin) static inline void pin_PullConfig(GPIO_TypeDef *gpio, uint32_t ll_pin, uint32_t pull_config) { +#if defined(STM32MP1xx) + PERIPH_LOCK(gpio); +#endif #ifdef STM32F1xx uint32_t function = LL_GPIO_GetPinMode(gpio, ll_pin); #endif @@ -77,10 +84,16 @@ static inline void pin_PullConfig(GPIO_TypeDef *gpio, uint32_t ll_pin, uint32_t #endif break; } +#if defined(STM32MP1xx) + PERIPH_UNLOCK(gpio); +#endif } static inline void pin_SetAFPin(GPIO_TypeDef *gpio, PinName pin, uint32_t afnum) { +#if defined(STM32MP1xx) + PERIPH_LOCK(gpio); +#endif #ifdef STM32F1xx UNUSED(gpio); UNUSED(pin); @@ -94,6 +107,9 @@ static inline void pin_SetAFPin(GPIO_TypeDef *gpio, PinName pin, uint32_t afnum) LL_GPIO_SetAFPin_0_7(gpio, ll_pin, afnum); } #endif +#if defined(STM32MP1xx) + PERIPH_UNLOCK(gpio); +#endif } #endif diff --git a/cores/arduino/stm32/pinmap.c b/cores/arduino/stm32/pinmap.c index 76e4c734ac..2fb16a32c4 100644 --- a/cores/arduino/stm32/pinmap.c +++ b/cores/arduino/stm32/pinmap.c @@ -18,6 +18,10 @@ #include "pinconfig.h" #include "stm32yyxx_ll_gpio.h" +#if defined(STM32MP1xx) +#include "lock_resource.h" +#endif + /* Map STM_PIN to LL */ const uint32_t pin_map_ll[16] = { LL_GPIO_PIN_0, @@ -70,6 +74,9 @@ void pin_function(PinName pin, int function) /* Enable GPIO clock */ GPIO_TypeDef *gpio = set_GPIO_Port_Clock(port); +#if defined(STM32MP1xx) + PERIPH_LOCK(gpio); +#endif /* Set default speed to high. * For most families there are dedicated registers so it is * not so important, register can be set at any time. @@ -128,6 +135,10 @@ void pin_function(PinName pin, int function) pin_PullConfig(gpio, ll_pin, STM_PIN_PUPD(function)); pin_DisconnectDebug(pin); + +#if defined(STM32MP1xx) + PERIPH_UNLOCK(gpio); +#endif } void pinmap_pinout(PinName pin, const PinMap *map) diff --git a/cores/arduino/stm32/rtc.c b/cores/arduino/stm32/rtc.c index 2acf99d6f1..a2c7ccc2e7 100644 --- a/cores/arduino/stm32/rtc.c +++ b/cores/arduino/stm32/rtc.c @@ -39,6 +39,15 @@ #include "rtc.h" #ifdef HAL_RTC_MODULE_ENABLED +#if defined(STM32MP1xx) +/** + * Currently there is no RTC driver for STM32MP1xx. If RTC is used in the future + * the function call HAL_RCCEx_PeriphCLKConfig() shall be done under + * if(IS_ENGINEERING_BOOT_MODE()), since clock source selection is done by + * First Stage Boot Loader on Cortex-A. + */ +#error "RTC shall not be handled by Arduino in STM32MP1xx." +#endif /* STM32MP1xx */ #ifdef __cplusplus extern "C" { diff --git a/cores/arduino/stm32/spi_com.c b/cores/arduino/stm32/spi_com.c index bbbaec8255..c8bf25dcf9 100644 --- a/cores/arduino/stm32/spi_com.c +++ b/cores/arduino/stm32/spi_com.c @@ -60,6 +60,29 @@ uint32_t spi_getClkFreqInst(SPI_TypeDef *spi_inst) UNUSED(spi_inst); /* SPIx source CLK is PCKL1 */ spi_freq = HAL_RCC_GetPCLK1Freq(); +#elif defined(STM32MP1xx) + /* Get source clock depending on SPI instance */ + if (spi_inst != NP) { + switch ((uint32_t)spi_inst) { + case (uint32_t)SPI1: + spi_freq = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SPI1); + break; + case (uint32_t)SPI2: + case (uint32_t)SPI3: + spi_freq = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SPI23); + break; + case (uint32_t)SPI4: + case (uint32_t)SPI5: + spi_freq = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SPI45); + break; + case (uint32_t)SPI6: + spi_freq = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SPI6); + break; + default: + core_debug("CLK: SPI instance not set"); + break; + } + } #else if (spi_inst != NP) { /* Get source clock depending on SPI instance */ @@ -223,7 +246,7 @@ void spi_init(spi_t *obj, uint32_t speed, spi_mode_e mode, uint8_t msb) handle->Init.TIMode = SPI_TIMODE_DISABLE; #if defined(STM32F0xx) || defined(STM32F3xx) || defined(STM32F7xx) ||\ defined(STM32G0xx) || defined(STM32H7xx) || defined(STM32L4xx) ||\ - defined(STM32WBxx) + defined(STM32WBxx) || defined(STM32MP1xx) handle->Init.NSSPMode = SPI_NSS_PULSE_DISABLE; #endif diff --git a/cores/arduino/stm32/stm32_eeprom.c b/cores/arduino/stm32/stm32_eeprom.c index bbbe97aa0d..cbc6ad26f7 100644 --- a/cores/arduino/stm32/stm32_eeprom.c +++ b/cores/arduino/stm32/stm32_eeprom.c @@ -115,6 +115,8 @@ static inline uint32_t get_flash_end(void) defined(STM32WBxx) /* If FLASH_PAGE_NUMBER is defined by user, this is not really end of the flash */ #define FLASH_END ((uint32_t)(FLASH_BASE + (((FLASH_PAGE_NUMBER +1) * FLASH_PAGE_SIZE))-1)) +#elif defined(EEPROM_RETRAM_MODE) +#define FLASH_END ((uint32_t)(EEPROM_RETRAM_START_ADDRESS + EEPROM_RETRAM_MODE_SIZE -1)) #endif #ifndef FLASH_END #error "FLASH_END could not be defined" @@ -130,6 +132,8 @@ static inline uint32_t get_flash_end(void) */ #if defined(STM32L0xx) #define FLASH_BASE_ADDRESS ((uint32_t)(DATA_EEPROM_BASE)) +#elif defined(EEPROM_RETRAM_MODE) +#define FLASH_BASE_ADDRESS EEPROM_RETRAM_START_ADDRESS #else #define FLASH_BASE_ADDRESS ((uint32_t)((FLASH_END + 1) - FLASH_PAGE_SIZE)) #endif @@ -194,6 +198,20 @@ void eeprom_buffer_fill(void) memcpy(eeprom_buffer, (uint8_t *)(FLASH_BASE_ADDRESS), E2END + 1); } +#if defined(EEPROM_RETRAM_MODE) + +/** + * @brief This function writes the buffer content into the flash + * @param none + * @retval none + */ +void eeprom_buffer_flush(void) +{ + memcpy((uint8_t *)(FLASH_BASE_ADDRESS), eeprom_buffer, E2END + 1); +} + +#else /* defined(EEPROM_RETRAM_MODE) */ + /** * @brief This function writes the buffer content into the flash * @param none @@ -306,6 +324,8 @@ void eeprom_buffer_flush(void) #endif } +#endif /* defined(EEPROM_RETRAM_MODE) */ + #ifdef __cplusplus } #endif diff --git a/cores/arduino/stm32/stm32_eeprom.h b/cores/arduino/stm32/stm32_eeprom.h index 73d594c2c1..879e7fbf65 100644 --- a/cores/arduino/stm32/stm32_eeprom.h +++ b/cores/arduino/stm32/stm32_eeprom.h @@ -45,6 +45,31 @@ extern "C" { /* Exported types ------------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/ +#if defined(STM32MP1xx) +/* Note for STM32MP1xx devices: + * Those devices do not have non-volatile memory. The emulation is done + * in RETRAM. Therefore data will be preserved *only* when VBAT is supplied + * (e.g. A coin battery is connected to CN3 on STM32MP157A_DK1) and + * the coprocessor is waken up from STANBY mode. + * The data won't be preserved from cold boot, even if VBAT is connected. + * See: https://community.st.com/s/question/0D50X0000B44pHUSQY/doesnt-the-mcu-coprocessor-have-nonvolatile-memory + */ +#define EEPROM_RETRAM_MODE +/* 4kB is the same size as EEPROM size of ATMega2560. */ +#ifndef EEPROM_RETRAM_MODE_SIZE +#define EEPROM_RETRAM_MODE_SIZE ((uint32_t)(4*1024)) +#endif +/* RETRAM start address is 0x00000000 (retset entry) and end address is + * 0x00020000 (64kB in total). The by default, ldscript.ld for STM32MP1xx + * does not define address between 0x00000298 (end of ISR Vector) and 0x00020000. + * So it is okay to use in this address range. Make sure ldscript.ld does not + * overrap the following address range. + */ +#ifndef EEPROM_RETRAM_START_ADDRESS +#define EEPROM_RETRAM_START_ADDRESS (0x00000400UL) +#endif +#define E2END (EEPROM_RETRAM_MODE_SIZE - 1) +#else #ifndef FLASH_PAGE_SIZE /* * FLASH_PAGE_SIZE is not defined for STM32F2xx, STM32F4xx and STM32F7xx @@ -56,6 +81,7 @@ extern "C" { #define FLASH_PAGE_SIZE ((uint32_t)(16*1024)) /* 16kB page */ #endif #define E2END (FLASH_PAGE_SIZE - 1) +#endif /* Exported macro ------------------------------------------------------------*/ /* Exported functions ------------------------------------------------------- */ diff --git a/cores/arduino/stm32/stm32yyxx_hal_conf.h b/cores/arduino/stm32/stm32yyxx_hal_conf.h index e249f6a2b0..02e28185d8 100644 --- a/cores/arduino/stm32/stm32yyxx_hal_conf.h +++ b/cores/arduino/stm32/stm32yyxx_hal_conf.h @@ -89,6 +89,7 @@ */ /*#define HAL_UART_MODULE_ENABLED*/ /*#define HAL_PCD_MODULE_ENABLED*/ +/*#define HAL_IPCC_MODULE_ENABLED*/ /* * Unused HAL modules diff --git a/cores/arduino/stm32/timer.h b/cores/arduino/stm32/timer.h index 3f8b8abb11..6685427ac4 100644 --- a/cores/arduino/stm32/timer.h +++ b/cores/arduino/stm32/timer.h @@ -53,7 +53,7 @@ extern "C" { #elif defined(STM32F2xx) || defined(STM32F4xx) || defined(STM32F7xx) #define TIM1_IRQn TIM1_UP_TIM10_IRQn #define TIM1_IRQHandler TIM1_UP_TIM10_IRQHandler -#elif defined(STM32H7xx) +#elif defined(STM32H7xx) || defined(STM32MP1xx) #define TIM1_IRQn TIM1_UP_IRQn #define TIM1_IRQHandler TIM1_UP_IRQHandler #endif @@ -63,7 +63,7 @@ extern "C" { #if defined(STM32G0xx) #define TIM6_IRQn TIM6_DAC_LPTIM1_IRQn #define TIM6_IRQHandler TIM6_DAC_LPTIM1_IRQHandler -#elif !defined(STM32F1xx) && !defined(STM32L1xx) +#elif !defined(STM32F1xx) && !defined(STM32L1xx) && !defined(STM32MP1xx) #define TIM6_IRQn TIM6_DAC_IRQn #define TIM6_IRQHandler TIM6_DAC_IRQHandler #endif @@ -84,7 +84,7 @@ extern "C" { || defined(STM32H7xx) #define TIM8_IRQn TIM8_UP_TIM13_IRQn #define TIM8_IRQHandler TIM8_UP_TIM13_IRQHandler -#elif defined(STM32F3xx) || defined(STM32G4xx) || defined(STM32L4xx) +#elif defined(STM32F3xx) || defined(STM32G4xx) || defined(STM32L4xx) || defined(STM32MP1xx) #define TIM8_IRQn TIM8_UP_IRQn #define TIM8_IRQHandler TIM8_UP_IRQHandler #endif diff --git a/cores/arduino/stm32/twi.c b/cores/arduino/stm32/twi.c index a6124d0e04..3ee7f7a567 100644 --- a/cores/arduino/stm32/twi.c +++ b/cores/arduino/stm32/twi.c @@ -166,6 +166,12 @@ typedef enum { #endif #if defined(I2C4_BASE) I2C4_INDEX, +#endif +#if defined(I2C5_BASE) + I2C5_INDEX, +#endif +#if defined(I2C6_BASE) + I2C6_INDEX, #endif I2C_NUM } i2c_index_t; @@ -182,6 +188,7 @@ static I2C_HandleTypeDef *i2c_handles[I2C_NUM]; static uint32_t i2c_getClkFreq(I2C_TypeDef *i2c) { uint32_t clkSrcFreq = 0; +#if !defined(STM32MP1xx) #ifdef STM32H7xx PLL3_ClocksTypeDef PLL3_Clocks; #endif @@ -338,6 +345,32 @@ static uint32_t i2c_getClkFreq(I2C_TypeDef *i2c) } } #endif // I2C4_BASE + +#elif defined(STM32MP1xx) + if (i2c == I2C1) { + clkSrcFreq = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_I2C12); + } + if (i2c == I2C2) { + clkSrcFreq = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_I2C12); + } + if (i2c == I2C3) { + clkSrcFreq = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_I2C35); + } + if (i2c == I2C4) { + clkSrcFreq = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_I2C46); + } +#endif // STM32MP1xx + +#if defined I2C5_BASE + if (i2c == I2C5) { + clkSrcFreq = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_I2C35); + } +#endif // I2C5_BASE +#if defined I2C6_BASE + if (i2c == I2C6) { + clkSrcFreq = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_I2C46); + } +#endif // I2C6_BASE return clkSrcFreq; } @@ -631,6 +664,28 @@ void i2c_custom_init(i2c_t *obj, uint32_t timing, uint32_t addressingMode, uint3 i2c_handles[I2C4_INDEX] = handle; } #endif // I2C4_BASE +#if defined I2C5_BASE + // Enable I2C5 clock if not done + if (obj->i2c == I2C5) { + __HAL_RCC_I2C5_CLK_ENABLE(); + __HAL_RCC_I2C5_FORCE_RESET(); + __HAL_RCC_I2C5_RELEASE_RESET(); + obj->irq = I2C5_EV_IRQn; + obj->irqER = I2C5_ER_IRQn; + i2c_handles[I2C5_INDEX] = handle; + } +#endif // I2C5_BASE +#if defined I2C6_BASE + // Enable I2C6 clock if not done + if (obj->i2c == I2C6) { + __HAL_RCC_I2C6_CLK_ENABLE(); + __HAL_RCC_I2C6_FORCE_RESET(); + __HAL_RCC_I2C6_RELEASE_RESET(); + obj->irq = I2C6_EV_IRQn; + obj->irqER = I2C6_ER_IRQn; + i2c_handles[I2C6_INDEX] = handle; + } +#endif // I2C6_BASE /* Configure I2C GPIO pins */ pinmap_pinout(obj->scl, PinMap_I2C_SCL); @@ -935,7 +990,7 @@ void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, ui obj->i2c_onSlaveTransmit(); } #if defined(STM32F0xx) || defined(STM32F1xx) || defined(STM32F2xx) || defined(STM32F3xx) ||\ - defined(STM32F4xx) || defined(STM32L0xx) || defined(STM32L1xx) + defined(STM32F4xx) || defined(STM32L0xx) || defined(STM32L1xx) || defined(STM32MP1xx) HAL_I2C_Slave_Seq_Transmit_IT(hi2c, (uint8_t *) obj->i2cTxRxBuffer, obj->i2cTxRxBufferSize, I2C_LAST_FRAME); #else @@ -948,7 +1003,7 @@ void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, ui /* We don't know in advance how many bytes will be sent by master so * we'll fetch one by one until master ends the sequence */ #if defined(STM32F0xx) || defined(STM32F1xx) || defined(STM32F2xx) || defined(STM32F3xx) ||\ - defined(STM32F4xx) || defined(STM32L0xx) || defined(STM32L1xx) + defined(STM32F4xx) || defined(STM32L0xx) || defined(STM32L1xx) || defined(STM32MP1xx) HAL_I2C_Slave_Seq_Receive_IT(hi2c, (uint8_t *) & (obj->i2cTxRxBuffer[obj->slaveRxNbData]), 1, I2C_NEXT_FRAME); #else @@ -997,7 +1052,7 @@ void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c) /* Restart interrupt mode for next Byte */ if (obj->slaveMode == SLAVE_MODE_RECEIVE) { #if defined(STM32F0xx) || defined(STM32F1xx) || defined(STM32F2xx) || defined(STM32F3xx) ||\ - defined(STM32F4xx) || defined(STM32L0xx) || defined(STM32L1xx) + defined(STM32F4xx) || defined(STM32L0xx) || defined(STM32L1xx) || defined(STM32MP1xx) HAL_I2C_Slave_Seq_Receive_IT(hi2c, (uint8_t *) & (obj->i2cTxRxBuffer[obj->slaveRxNbData]), 1, I2C_NEXT_FRAME); #else @@ -1150,6 +1205,55 @@ void I2C4_ER_IRQHandler(void) HAL_I2C_ER_IRQHandler(handle); } #endif // I2C4_BASE + +#if defined(I2C5_BASE) +/** +* @brief This function handles I2C5 interrupt. +* @param None +* @retval None +*/ +void I2C5_EV_IRQHandler(void) +{ + I2C_HandleTypeDef *handle = i2c_handles[I2C5_INDEX]; + HAL_I2C_EV_IRQHandler(handle); +} + +/** +* @brief This function handles I2C5 interrupt. +* @param None +* @retval None +*/ +void I2C5_ER_IRQHandler(void) +{ + I2C_HandleTypeDef *handle = i2c_handles[I2C5_INDEX]; + HAL_I2C_ER_IRQHandler(handle); +} +#endif // I2C5_BASE + +#if defined(I2C6_BASE) +/** +* @brief This function handles I2C6 interrupt. +* @param None +* @retval None +*/ +void I2C6_EV_IRQHandler(void) +{ + I2C_HandleTypeDef *handle = i2c_handles[I2C6_INDEX]; + HAL_I2C_EV_IRQHandler(handle); +} + +/** +* @brief This function handles I2C6 interrupt. +* @param None +* @retval None +*/ +void I2C6_ER_IRQHandler(void) +{ + I2C_HandleTypeDef *handle = i2c_handles[I2C6_INDEX]; + HAL_I2C_ER_IRQHandler(handle); +} +#endif // I2C6_BASE + #endif /* HAL_I2C_MODULE_ENABLED */ #ifdef __cplusplus diff --git a/platform.txt b/platform.txt index e2b44c282a..be4c4dbef1 100644 --- a/platform.txt +++ b/platform.txt @@ -201,3 +201,12 @@ tools.maple_upload.path.linux={runtime.tools.STM32Tools.path}/tools/linux tools.maple_upload.upload.params.verbose=-d tools.maple_upload.upload.params.quiet=n tools.maple_upload.upload.pattern="{path}/{cmd}" {serial.port.file} {upload.altID} {upload.usbID} "{build.path}/{build.project_name}.bin" + +# STM32MP1 self-contained shell script +tools.remoteproc_gen.path={runtime.tools.STM32Tools.path}/tools +tools.remoteproc_gen.busybox= +tools.remoteproc_gen.busybox.windows={path}/win/busybox.exe +tools.remoteproc_gen.script=run_arduino_gen.sh +tools.remoteproc_gen.upload.params.verbose= +tools.remoteproc_gen.upload.params.quiet= +tools.remoteproc_gen.upload.pattern="{busybox}" sh "{path}/{script}" generate "{build.path}/{build.project_name}.elf" "{build.path}/run_arduino.sh" diff --git a/system/STM32MP1xx/stm32mp1xx_hal_conf_default.h b/system/STM32MP1xx/stm32mp1xx_hal_conf_default.h index 1e097d157b..0482786469 100644 --- a/system/STM32MP1xx/stm32mp1xx_hal_conf_default.h +++ b/system/STM32MP1xx/stm32mp1xx_hal_conf_default.h @@ -19,7 +19,7 @@ * * ****************************************************************************** - */ + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32MP1xx_HAL_CONF_DEFAULT_H @@ -37,6 +37,19 @@ * @brief Include the default list of modules to be used in the HAL driver * and manage module deactivation */ + +#define HAL_RTC_MODULE_DISABLED /* RTC MODULE on Cortex-M side is not supported. + Linux on Cortex-A will handle this. */ +#define HAL_ETH_MODULE_DISABLED /* ETH module is also not intended to be used */ +#define HAL_HSEM_MODULE_ENABLED +#define HAL_MDMA_MODULE_ENABLED /* Some other modules (e.g. USART) require this */ + +#if defined(ARDUINO_STM32MP157A_DK1) || defined(ARDUINO_STM32MP157C_DK2) +// Cannot use them in this board, or define them in the kernel device tree. +#define HAL_QSPI_MODULE_DISABLED +#define HAL_FDCAN_MODULE_DISABLED +#endif // defined(ARDUINO_STM32MP157A_DK1) && defined(ARDUINO_STM32MP157C_DK2) + #include "stm32yyxx_hal_conf.h" #if 0 /** diff --git a/system/STM32MP1xx/system_stm32mp1xx.c b/system/STM32MP1xx/system_stm32mp1xx.c index 0eebfc974a..3cab2c0c32 100644 --- a/system/STM32MP1xx/system_stm32mp1xx.c +++ b/system/STM32MP1xx/system_stm32mp1xx.c @@ -58,6 +58,10 @@ #define HSI_VALUE ((uint32_t)64000000) /*!< Value of the Internal oscillator in Hz*/ #endif /* HSI_VALUE */ +#if !defined (CSI_VALUE) + #define CSI_VALUE 4000000U /*!< Value of the Internal oscillator in Hz*/ +#endif /* CSI_VALUE */ + /** * @} */ diff --git a/variants/STM32MP157_DK/PeripheralPins.c b/variants/STM32MP157_DK/PeripheralPins.c new file mode 100644 index 0000000000..c9780fb4c9 --- /dev/null +++ b/variants/STM32MP157_DK/PeripheralPins.c @@ -0,0 +1,661 @@ +/* + ******************************************************************************* + * Copyright (c) 2019, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + * Automatically generated from STM32MP157AAAx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +WEAK const PinMap PinMap_ADC[] = { + // {ANA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_INN1 + {ANA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_INP0 + // {ANA_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_INN1 + // {ANA_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_INP0 + {ANA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_INP1 + // {ANA_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_INP1 + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_INP16 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_INN16 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 17, 0)}, // ADC1_INP17 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_INP14 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_INP15 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC1_INP18 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC2_INP18 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC1_INN18 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 19, 0)}, // ADC1_INP19 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC2_INN18 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 19, 0)}, // ADC2_INP19 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_INP3 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_INP3 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_INN3 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_INP7 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_INN3 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_INP7 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_INN5 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_INP9 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_INN5 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_INP9 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_INP5 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_INP5 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_INP10 + {PC_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_INP10 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_INN10 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_INP11 + {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_INN10 + {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_INP11 + {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_INN11 + {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_INP12 + // {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_INN12 + {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_INP13 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_INP4 + {PC_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_INP4 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_INN4 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_INP8 + {PC_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_INN4 + {PC_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_INP8 + {PF_11, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_INP2 + // {PF_12, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_INN2 + {PF_12, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_INP6 + {PF_13, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_INP2 + // {PF_14, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_INN2 + {PF_14, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_INP6 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +#ifdef HAL_DAC_MODULE_ENABLED +WEAK const PinMap PinMap_DAC[] = { + // {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC1_OUT1 + // {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC1_OUT2 + {NC, NP, 0} +}; +#endif + +//*** I2C *** +/** + * stm32mp157c-dk2-m4-examples.dts defines I2C5 only. + */ +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SDA[] = { + {PA_12, I2C5, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C5)}, + // {PA_12, I2C6, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF2_I2C6)}, + // {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + // {PB_7, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)}, + // {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + // {PB_9, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)}, + // {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + // {PC_9, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + // {PD_0, I2C5, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C5)}, + // {PD_0, I2C6, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF2_I2C6)}, + // {PD_13, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C1)}, + // {PD_13, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + // {PF_0, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + // {PF_15, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C1)}, + // {PF_15, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + // {PG_15, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + // {PH_5, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + // {PH_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + // {PH_12, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C1)}, + // {PH_12, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + // {PZ_1, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I2C2)}, + // {PZ_1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)}, + // {PZ_1, I2C5, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C5)}, + // {PZ_1, I2C6, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF2_I2C6)}, + // {PZ_3, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I2C2)}, + // {PZ_3, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)}, + // {PZ_3, I2C5, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C5)}, + // {PZ_3, I2C6, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF2_I2C6)}, + // {PZ_5, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I2C2)}, + // {PZ_5, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)}, + // {PZ_5, I2C5, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C5)}, + // {PZ_5, I2C6, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF2_I2C6)}, + // {PZ_7, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I2C2)}, + // {PZ_7, I2C6, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF2_I2C6)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SCL[] = { + // {PA_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_11, I2C5, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C5)}, + // {PA_11, I2C6, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF2_I2C6)}, + // {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + // {PB_6, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)}, + // {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + // {PB_8, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)}, + // {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + // {PD_1, I2C5, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C5)}, + // {PD_1, I2C6, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF2_I2C6)}, + // {PD_7, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + // {PD_12, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C1)}, + // {PD_12, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + // {PE_2, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + // {PF_1, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + // {PF_14, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C1)}, + // {PF_14, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + // {PH_4, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + // {PH_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + // {PH_11, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C1)}, + // {PH_11, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + // {PZ_0, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I2C2)}, + // {PZ_0, I2C6, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF2_I2C6)}, + // {PZ_2, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I2C2)}, + // {PZ_2, I2C6, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF2_I2C6)}, + // {PZ_4, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I2C2)}, + // {PZ_4, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)}, + // {PZ_4, I2C5, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C5)}, + // {PZ_4, I2C6, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF2_I2C6)}, + // {PZ_6, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I2C2)}, + // {PZ_6, I2C6, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF2_I2C6)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** +/** + * stm32mp157c-dk2-m4-examples.dts defines TIM1 only. + */ +#ifdef HAL_TIM_MODULE_ENABLED +WEAK const PinMap PinMap_PWM[] = { + // {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + // {PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 + // {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + // {PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 + // {PA_1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 1)}, // TIM15_CH1N + // {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + // {PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 + // {PA_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 0)}, // TIM15_CH1 + // {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + // {PA_3, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 + // {PA_3, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 2, 0)}, // TIM15_CH2 + // {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + // {PA_5, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + // {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + // {PA_6, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1 + // {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + // {PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + // {PA_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + // {PA_7, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1 + // {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + // {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + // {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + // {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + // {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + // {PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + // {PB_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + // {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + // {PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + // {PB_1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + // {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + // {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + // {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + // {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + // {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 1)}, // TIM16_CH1N + // {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + // {PB_7, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 1)}, // TIM17_CH1N + // {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + // {PB_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1 + // {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + // {PB_9, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 0)}, // TIM17_CH1 + // {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + // {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + // {PB_14, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + // {PB_14, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 1, 0)}, // TIM12_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + // {PB_15, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + // {PB_15, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 2, 0)}, // TIM12_CH2 + // {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + // {PC_6, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + // {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + // {PC_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + // {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + // {PC_8, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + // {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + // {PC_9, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + // {PD_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 1)}, // TIM16_CH1N + // {PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + // {PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + // {PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + // {PE_4, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 1)}, // TIM15_CH1N + // {PE_5, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 0)}, // TIM15_CH1 + // {PE_6, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 2, 0)}, // TIM15_CH2 + {PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + // {PF_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1 + // {PF_7, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 0)}, // TIM17_CH1 + // {PF_8, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1 + // {PF_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 1)}, // TIM16_CH1N + // {PF_9, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1 + // {PF_9, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 1)}, // TIM17_CH1N + // {PG_8, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PH_6, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 1, 0)}, // TIM12_CH1 + // {PH_9, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 2, 0)}, // TIM12_CH2 + // {PH_10, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 + // {PH_11, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 + // {PH_12, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 + // {PH_13, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + // {PH_14, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + // {PH_15, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + // {PI_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 + // {PI_2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + // {PI_5, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + // {PI_6, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + // {PI_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + // {PJ_6, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + // {PJ_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + // {PJ_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + // {PJ_8, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + // {PJ_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + // {PJ_9, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + // {PJ_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + // {PJ_10, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + // {PJ_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + // {PJ_11, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + // {PK_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + // {PK_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + // {PK_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + // {PK_1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** +/** + * stm32mp157c-dk2-m4-examples.dts defines UART7 only. + * + * Banned peripherals: + * UART8: Used by U-Boot UART + * UART4: Used by U-Boot debug + */ +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_TX[] = { + // {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + // {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + // {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + // {PA_12, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_UART4)}, + // {PA_13, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + // {PA_15, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_UART7)}, + // {PB_4, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_UART7)}, + // {PB_6, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_UART5)}, + // {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + // {PB_9, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + // {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + // {PB_13, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)}, + // {PB_14, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)}, + // {PC_6, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + // {PC_8, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_UART4)}, + // {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + // {PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + // {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + // {PD_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + // {PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + // {PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + // {PE_1, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_8, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + // {PF_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + // {PF_7, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + // {PG_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_UART4)}, + // {PG_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)}, + // {PG_14, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + // {PH_13, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + // {PJ_8, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + // {PZ_2, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + // {PZ_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RX[] = { + // {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + // {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + // {PA_8, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_UART7)}, + // {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + // {PA_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_UART4)}, + // {PB_2, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + // {PB_2, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)}, + // {PB_3, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_UART7)}, + // {PB_5, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_UART5)}, + // {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + // {PB_8, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + // {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + // {PB_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)}, + // {PB_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART3)}, + // {PB_15, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)}, + // {PC_7, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + // {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + // {PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + // {PD_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + // {PD_2, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_UART4)}, + // {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + // {PD_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + // {PD_9, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + // {PE_0, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_7, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + // {PF_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + // {PF_6, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + // {PG_9, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + // {PH_14, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + // {PI_9, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + // {PJ_9, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + // {PZ_1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + // {PZ_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RTS[] = { + // {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + // {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + // {PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + // {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + // {PC_8, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + // {PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + // {PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PE_9, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + // {PE_14, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + // {PF_8, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + // {PG_7, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + // {PG_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART3)}, + // {PG_8, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + // {PG_12, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + // {PZ_5, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_CTS[] = { + // {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + // {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + // {PB_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + // {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + // {PC_9, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + // {PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + // {PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + // {PD_14, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + // {PD_15, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_10, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + // {PE_15, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + // {PE_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + // {PF_9, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + // {PG_10, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + // {PG_13, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + // {PG_15, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + // {PI_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART3)}, + // {PZ_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** +/** + * stm32mp157c-dk2-m4-examples.dts defines SPI4 only. + */ + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MOSI[] = { + // {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PA_7, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + // {PA_8, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + // {PB_2, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI3)}, + // {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PB_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI3)}, + // {PB_5, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + // {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + // {PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + // {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + // {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + // {PD_6, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + // {PE_6, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_14, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + // {PF_9, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + // {PF_11, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + // {PG_14, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)}, + // {PI_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + // {PJ_10, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + // {PZ_2, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PZ_2, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MISO[] = { + // {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PA_6, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + // {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + // {PB_4, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + // {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + // {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + // {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + // {PD_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + // {PE_5, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_13, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + // {PF_8, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + // {PG_12, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)}, + // {PH_7, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + // {PI_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + // {PJ_11, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + // {PZ_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PZ_1, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SCLK[] = { + // {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PA_5, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + // {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + // {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PB_3, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + // {PB_3, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + // {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + // {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + // {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + // {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + // {PE_0, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + // {PE_2, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_12, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + // {PF_7, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + // {PG_13, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)}, + // {PH_6, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + // {PI_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + // {PK_0, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + // {PZ_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PZ_0, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SSEL[] = { + // {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PA_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + // {PA_4, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + // {PA_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + // {PA_11, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + // {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + // {PA_15, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI6)}, + // {PB_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI2)}, + // {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + // {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + // {PE_4, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_11, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + // {PF_6, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + // {PG_8, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)}, + // {PH_5, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + // {PI_0, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + // {PK_1, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + // {PZ_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PZ_3, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +//*** No CAN defined in the kernel device tree *** + +// #ifdef HAL_FDCAN_MODULE_ENABLED +// WEAK const PinMap PinMap_CAN_RD[] = { +// {PA_11, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, +// {PB_5, CANFD2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, +// {PB_8, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, +// {PB_12, CANFD2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, +// {PD_0, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, +// {PH_14, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, +// {PI_9, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, +// {NC, NP, 0} +// }; +// #endif + +// #ifdef HAL_FDCAN_MODULE_ENABLED +// WEAK const PinMap PinMap_CAN_TD[] = { +// {PA_12, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, +// {PB_6, CANFD2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, +// {PB_9, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, +// {PB_13, CANFD2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, +// {PD_1, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, +// {PH_13, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, +// {NC, NP, 0} +// }; +// #endif + +//*** ETHERNET *** + +//*** No ETHERNET defined in the kernel device tree *** + +// #ifdef HAL_ETH_MODULE_ENABLED +// WEAK const PinMap PinMap_Ethernet[] = { +// {PA_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_CRS +// {PA_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_ETH1)}, // ETH1_CLK +// {PA_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_REF_CLK|ETH1_RX_CLK +// {PA_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_MDIO +// {PA_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_COL +// {PA_7, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_CRS_DV|ETH1_RX_CTL|ETH1_RX_DV +// {PB_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_RXD2 +// {PB_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_RXD3 +// {PB_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_ETH1)}, // ETH1_CLK +// {PB_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_PPS_OUT +// {PB_8, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_TXD3 +// {PB_10, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_RX_ER +// {PB_11, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_TX_CTL|ETH1_TX_EN +// {PB_12, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_TXD0 +// {PB_13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_TXD1 +// {PC_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_MDC +// {PC_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_TXD2 +// {PC_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_TX_CLK +// {PC_4, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_RXD0 +// {PC_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_RXD1 +// {PE_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_TXD3 +// {PF_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_TX_ER +// {PF_12, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_RXD4 +// {PF_13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_RXD5 +// {PF_14, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_RXD6 +// {PF_15, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_RXD7 +// {PG_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_TXD4 +// {PG_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_TXD5 +// {PG_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_TXD6 +// {PG_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_TXD7 +// {PG_4, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_GTX_CLK +// {PG_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_CLK125 +// {PG_8, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_ETH1)}, // ETH1_CLK +// {PG_8, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_PPS_OUT +// {PG_11, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_TX_CTL|ETH1_TX_EN +// {PG_12, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_PHY_INTN +// {PG_13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_TXD0 +// {PG_14, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_TXD1 +// {PH_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_CRS +// {PH_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_COL +// {PH_6, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_RXD2 +// {PH_7, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_RXD3 +// {PI_10, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH1)}, // ETH1_RX_ER +// {NC, NP, 0} +// }; +// #endif + +//*** QUADSPI *** + +//*** No QUADSPI defined in the kernel device tree *** + +// #ifdef HAL_QSPI_MODULE_ENABLED +// WEAK const PinMap PinMap_QUADSPI[] = { +// {PA_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3 +// {PA_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK +// {PB_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_CLK +// {PB_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS +// {PB_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_NCS +// {PC_0, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_NCS +// {PC_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO0 +// {PC_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO1 +// {PC_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_NCS +// {PD_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO0 +// {PD_12, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO1 +// {PD_13, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3 +// {PE_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO2 +// {PE_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO0 +// {PE_8, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO1 +// {PE_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO2 +// {PE_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO3 +// {PF_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3 +// {PF_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO2 +// {PF_8, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 +// {PF_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 +// {PF_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_CLK +// {PG_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_QUADSPI)}, // QUADSPI_BK2_IO3 +// {PG_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_CLK +// {PG_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_IO2 +// {PG_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_QUADSPI)}, // QUADSPI_BK2_IO2 +// {PG_14, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_IO3 +// {PH_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_IO0 +// {PH_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_IO1 +// {NC, NP, 0} +// }; +// #endif + +//*** USB *** + +//*** No USB_OTG_FS *** + +// #ifdef HAL_PCD_MODULE_ENABLED +// WEAK const PinMap PinMap_USB_OTG_HS[] = { +// #ifdef USE_USB_HS_IN_FS +// {PA_8, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_SOF +// {PA_10, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF_NONE)}, // USB_OTG_HS_ID +// #endif /* USE_USB_HS_IN_FS */ +// {NC, NP, 0} +// }; +// #endif diff --git a/variants/STM32MP157_DK/PinNamesVar.h b/variants/STM32MP157_DK/PinNamesVar.h new file mode 100644 index 0000000000..f14e108b68 --- /dev/null +++ b/variants/STM32MP157_DK/PinNamesVar.h @@ -0,0 +1,25 @@ +/* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 +SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 +SYS_WKUP2 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN3 +SYS_WKUP3 = PC_13, +#endif +#ifdef PWR_WAKEUP_PIN4 +SYS_WKUP4 = PI_8, +#endif +#ifdef PWR_WAKEUP_PIN5 +SYS_WKUP5 = PI_11, +#endif +#ifdef PWR_WAKEUP_PIN6 +SYS_WKUP6 = PC_1, +#endif +#ifdef PWR_WAKEUP_PIN7 +SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 +SYS_WKUP8 = NC, +#endif diff --git a/variants/STM32MP157_DK/README.md b/variants/STM32MP157_DK/README.md new file mode 100644 index 0000000000..3867332f4a --- /dev/null +++ b/variants/STM32MP157_DK/README.md @@ -0,0 +1,164 @@ +# Discovery kit with STM32MP157x MPU Series + +This variant currently supports the following boards: + +* [STM32MP157A-DK1] +* [STM32MP157C-DK2] + +This port targets the Cortex-M4 coprocessor. __Note that the coprocessor is not a stand-alone microcontroller: the Arduino firmware for the coprocessor must be managed by the host Linux (Cortex-A side).__ In other words, [Cortex-M4 Engineering mode] is not supported and only Production mode is supported. + +Because every OS may have different software configurations (especially Device Tree) not all Linux distributions for these boards are supported. The currently supported distributions are the following: + +* [STM32MP15 Starter Package] +* [STM32 MPU OpenSTLinux Distribution] +* [Balena OS] + +Note that the first two OSes should select `stm32mp157c-dk2-m4-examples-sdcard` boot mode (or device tree configuration) on boot time. `stm32mp157c-dk2-sdcard` boot mode is also known to work but it is not guaranteed. See [ST Wiki page on boot mode] for more detail. If you are using it for your own OS, see the [Linux Device Tree considerations](#Linux-Device-Tree-considerations) section. + +## How to use + +After Verify and Upload, you will see a message similar to the following in Arduino IDE: + + /run_arduino.sh generated successfully. + This file should be uploaded manually by SCP, SFTP, Kermit, or etc. + Then run "sh ./run_arduino.sh start" command in the board's console. + For detailed instructions, please visit: + https://github.com/stm32duino/Arduino_Core_STM32/tree/master/variants/STM32MP157_DK/README.md + +In this example, the user **must** upload `/run_arduino.sh` file manually. Uploading instruction is described later in the [Uploading](#Uploading) section. + +After uploading the user can use `sh run_arduino.sh start` in the console of host Linux via either SSH or Serial Console, to run the Arduino firmware. + +Note: `sh run_arduino.sh start` is a one-shot command: the Arduino firmware only runs for the current boot. If you want to make it run after reboot, you need to use `sh run_arduino.sh install` command. + +`run_arduino.sh` help page summary: + + Usage: sh run_arduino.sh [start|stop|restart|generate|install|uninstall] + + run_arduino.sh is a helper script that helps managing an Arduino binary + file for the coprocessor using remoteproc framework. + + sh run_arduino.sh start + Upload the binary to the coprocessor then start it. + This command must be executed while the script contains the binary + after generate command is run. + + sh run_arduino.sh install + Run the binary on boot automatically by installing a systemd service. + + sh run_arduino.sh uninstall + Uninstall the autostart service. + + sh run_arduino.sh stop + Stop the coprocessor. + + sh run_arduino.sh restart + Restart the coprocessor. + +See the source code for the full help page and the more details about [run_arduino.sh]. + +## Pin mapping + +The boards have two pin headers: Raspberry Pi HAT headers and Arduino shield headers. This project currently supports Arduino Shield headers only, leaving RPi HAT headers for the Linux applications. + +Note that PWM N channel (e.g. TIM1_CH3N) outputs negative output to the corresponding channel, meaning it outputs inverted duty cycle. + +| Feature | ST | Arduino | | Arduino | ST | Feature | PWM | +|-----------|-------|:-------:|:-:|:-------:|-------|-----------|-----------| +| | | | | SCL | PA_11 | I2C5-SCL | TIM1_CH4 | +| | | | | SDA | PA_12 | I2C5-SDA | | +| | | | | Varef | | | | +| | | NC | | 13 | PE_12 | SPI4-SCK | TIM1_CH3N | +| | | 5V | | 12 | PE_13 | SPI4-MISO | TIM1_CH3 | +| | | RST | | 11 | PE_14 | SPI4-MOSI | TIM1_CH4 | +| | | 3.3V | | 10 | PE_11 | SPI4-SS | TIM1_CH2 | +| | | 5V | | 9 | PH_6 | | TIM12_CH1 | +| | | GND | | 8 | PG_3 | | | +| | | GND | | | | | | +| | | Vin | | 7 | PD_1 | | | +| | | | | 6 | PE_9 | | TIM1_CH1 | +| ADC1_IN0 | PF_14 | A0 | | 5 | PD_15 | | TIM4_CH4 | +| ADC1_IN1 | PF_13 | A1 | | 4 | PE_10 | | TIM1_CH2N | +| ADC1_IN6 | ANA_0 | A2 | | 3 | PD_14 | | TIM4_CH3 | +| ADC1_IN2 | ANA_1 | A3 | | 2 | PE_1 | | | +| ADC1_IN13 | PC_3 | A4 | | 1 | PE_8 | UART7-TX | TIM1_CH1N | +| ADC1_IN14 | PF_12 | A5 | | 0 | PE_7 | UART7-RX | | + +There are additional pins for LEDs and buttons. + +| ST | Arduino | Arduino (cont.) | Comment | +|-------|-------------------------------|----------------------|--------------------------------------------------| +| PA_14 | 16 / LED_GREEN | USER1_BTN / USER_BTN | Active Low, LED LD5, also connected to B3 button | +| PA_13 | 17 / LED_RED | USER2_BTN | Active Low, LED LD6, also connected to B4 button | +| PH_7 | 18 / LED_ORANGE / LED_BUILTIN | | Active High, LED LD7 | + +[`variant.h` of the board](https://github.com/stm32duino/Arduino_Core_STM32/tree/master/variants/STM32MP157_DK/variant.h) has the complete information about the pinouts. + +## Uploading + +As mentioned above `run_arduino.sh` file should be uploaded manually in order to work. There are many ways to upload the file. + +### Over Network + +* **SCP** and **SFTP** are good options to upload the file, since STM32MP1 board runs SSH server by default. There are a lot of online resources on how to use them on the internet. Here is the default SSH access information: +``` +host: (Varies. Search online to learn how to figure it out.) +username: root +password: (none by default) +``` + +### Over Serial + +* **C-Kermit** is a combined network and serial communication software package that allows users to transfer files over serial connection. [The ST Wiki page on C-Kermit] describes how to use it. + +## Linux Device Tree considerations + +To use the Arduino firmware for a custom OS, the user need to take into account in the Linux Device Tree, since a peripheral cannot be shared between the Linux host and the Arduino firmware, and Arduino must occupy some peripherals. + +For example, Arduino uses TIM1 for PWM `analogWrite()` implementation. The Device Tree must disable TIM1 for Linux usage like the following: +``` +&timers1 { + status = "disabled"; +}; +``` + +And then the Device Tree should enable TIM1 for the coprocessor, although this doesn't seems to be a strict requirement it is safer to do this: +``` +&m4_timers1 { + pinctrl-names = "rproc_default"; + pinctrl-0 = <&timer1_pins>; + status = "okay"; +}; +``` + +[stm32mp157c-dk2-m4-examples.dts] is a great example to begin with. For the full list of peripherals used by the Arduino firmware, see [PeripheralPins.c](/variants/STM32MP157_DK/PeripheralPins.c) of the board. + +## Limitations + +* Ethernet and USB are not supported. Use them in the Linux host. +* Currently there is no easy way for communication between the Linux host and Arduino coprocessor. There is ongoing work for virtual serial communications using OpenAMP rpmsg framework. Currently one possible way is to wire between UART7 (Arduino SCL/SDA pins) and USART3 (Linux RPi HAT GPIO14/GPIO15 pins), however, users should manually modify [Linux Device tree to enable `usart3` and recompile it](usart3). +* I2C pins on Raspberry Pi HAT header (GPIO2 and GPIO3) are not available in Linux host. This is because the Discovery board shares I2C pins on Arduino header and those on the HAT header. +* [Early firmware loading from U-Boot stage] is not supported. Only firmware loading on Linux boot stage by systemd supported. The binary itself may be loaded by U-Boot without any problems, but there is no out-of-box tool to configure U-Boot to load the firmware using Arduino IDE yet. +* EEPROM library: Those devices do not have non-volatile memory. The emulation is done using RETRAM. Therefore data will be preserved *only* when VBAT is supplied (e.g. A coin battery is connected to CN3 on STM32MP157A_DK1) and the coprocessor is waken up from sleep. This implies that cold boot the board may cause data loss, even if VBAT is supplied. See [discussions on RETRAM] for more detail. + + + +[STM32MP157A-DK1]: https://www.st.com/en/evaluation-tools/stm32mp157a-dk1.html +[STM32MP157C-DK2]: https://www.st.com/en/evaluation-tools/stm32mp157c-dk2.html + +[Cortex-M4 Engineering mode]: https://wiki.st.com/stm32mpu/wiki/STM32CubeMP1_development_guidelines +[STM32MP15 Starter Package]: https://wiki.st.com/stm32mpu/wiki/STM32MP15_Discovery_kits_-_Starter_Package +[STM32 MPU OpenSTLinux Distribution]: https://wiki.st.com/stm32mpu/wiki/STM32MP1_Distribution_Package +[Balena OS]: https://github.com/kbumsik/balena-st-stm32mp +[ST Wiki page on boot mode]: https://wiki.st.com/stm32mpu/wiki/STM32CubeMP1_Package#Getting_started_with_STM32CubeMP1_Package + +[run_arduino.sh]: https://github.com/stm32duino/Arduino_Tools/blob/master/linux/run_arduino_gen.sh + +[The ST Wiki page on C-Kermit]: https://wiki.st.com/stm32mpu/wiki/How_to_transfer_a_file_over_serial_console +[a bug in OpenSTLinux]: https://community.st.com/s/question/0D50X0000B9vHa4/cannot-get-download-a-file-using-kermit + +[stm32mp157c-dk2-m4-examples.dts]: https://github.com/STMicroelectronics/meta-st-stm32mp/blob/d8cbac759e1275b1a27d4ba38b64a0d83d0e8c9f/recipes-kernel/linux/linux-stm32mp/4.19/4.19.49/0029-ARM-stm32mp1-r2-DEVICETREE.patch#L4334 + +[usart3]: https://github.com/STMicroelectronics/meta-st-stm32mp/blob/d8cbac759e1275b1a27d4ba38b64a0d83d0e8c9f/recipes-kernel/linux/linux-stm32mp/4.19/4.19.49/0029-ARM-stm32mp1-r2-DEVICETREE.patch#L4274 +[Early firmware loading from U-Boot stage]: https://wiki.st.com/stm32mpu/wiki/How_to_start_the_coprocessor_from_the_bootloader +[discussions on RETRAM]: https://community.st.com/s/question/0D50X0000B44pHUSQY/doesnt-the-mcu-coprocessor-have-nonvolatile-memory diff --git a/variants/STM32MP157_DK/ldscript.ld b/variants/STM32MP157_DK/ldscript.ld new file mode 100644 index 0000000000..91b04d5410 --- /dev/null +++ b/variants/STM32MP157_DK/ldscript.ld @@ -0,0 +1,202 @@ +/* +****************************************************************************** +** +** File : LinkerScript.ld +** +** Abstract : Linker script for STM32MP1 series +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed “as is,” without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +**

© Copyright (c) 2019 STMicroelectronics. +** All rights reserved.

+** +** This software component is licensed by ST under BSD 3-Clause license, +** the License; You may not use this file except in compliance with the +** License. You may obtain a copy of the License at: +** opensource.org/licenses/BSD-3-Clause +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x10040000; /* end of RAM */ + +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + m_interrupts (RX) : ORIGIN = 0x00000000, LENGTH = 0x00000298 + m_text (RX) : ORIGIN = 0x10000000, LENGTH = 0x00020000 + m_data (RW) : ORIGIN = 0x10020000, LENGTH = 0x00020000 + m_ipc_shm (RW) : ORIGIN = 0x10040000, LENGTH = 0x00008000 +} + + /* Symbols needed for OpenAMP to enable rpmsg */ +__OPENAMP_region_start__ = ORIGIN(m_ipc_shm); +__OPENAMP_region_end__ = ORIGIN(m_ipc_shm)+LENGTH(m_ipc_shm); + +/* Sections */ +SECTIONS +{ + /* The startup code into ROM memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } > m_interrupts + + + /* The program code and other data into ROM memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } > m_text + + /* Constant data into ROM memory*/ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } > m_text + + .ARM.extab : { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } > m_text + + .ARM : { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } > m_text + + .preinit_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } > m_text + + .init_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } > m_text + + .fini_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } > m_text + + /* Used by the startup to initialize data */ + __DATA_ROM = .; + _sidata = LOADADDR(.data); + + /* Initialized data sections */ + .data : AT(__DATA_ROM) + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } > m_data + + __DATA_END = __DATA_ROM + (_edata - _sdata); + text_end = ORIGIN(m_text) + LENGTH(m_text); + ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data") + + .resource_table : + { + . = ALIGN(4); + KEEP (*(.resource_table*)) + . = ALIGN(4); + } > m_data + + + /* Uninitialized data section into RAM memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } > m_data + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } > m_data + + + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } + +} diff --git a/variants/STM32MP157_DK/variant.cpp b/variants/STM32MP157_DK/variant.cpp new file mode 100644 index 0000000000..64b2e59985 --- /dev/null +++ b/variants/STM32MP157_DK/variant.cpp @@ -0,0 +1,261 @@ +/* + ******************************************************************************* + * Copyright (c) 2017, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + */ + +#include "pins_arduino.h" + +#ifdef __cplusplus +extern "C" { +#endif + +// Pin number +// This array allows to wrap Arduino pin number(Dx or x) +// to STM32 PinName (PX_n) +const PinName digitalPin[] = { + //PX_n, //Dx + // CN14 Right Top Arduino Pins + PE_7, //D0 - USART7_RX + PE_8, //D1 - USART7_TX and TIM1_CH1N + PE_1, //D2 + PD_14, //D3 - TIM4_CH3 + PE_10, //D4 - TIM1_CH2N + PD_15, //D5 - TIM4_CH4 + PE_9, //D6 - TIM1_CH1 + PD_1, //D7 + // CN13 Right Bottom Arduino Pins + PG_3, //D8 + PH_6, //D9 - TIM12_CH1 + PE_11, //D10 - SPI4_NSS and TIM1_CH2 + PE_14, //D11 - SPI4_MOSI and TIM1_CH4 + PE_13, //D12 - SPI4_MISO and TIM1_CH3 + PE_12, //D13 - SPI4_SCK and TIM1_CH3N + PA_12, //D14 - I2C5_SDA + PA_11, //D15 - I2C5_SCL + // // CN2 Raspberry Pi GPIO connectors + // // NC, // RPI_1 - 3V3 + // // NC, // RPI_2 - 5V + // PA_12, //D16 - RPI_3 - GPIO2 / I2C5_SDA + // // NC, // PRI_4 - 5V + // PA_11, //D17 - RPI_5 - GPIO3 / I2C5_SCL + // // NC, // RPI_6 - GND + // PA_8, //D18 - RPI_7 - GPIO4 / MCO1 + // PB_10, //D19 - RPI_8 - GPIO14 / USART3_TX + // // NC, // RPI_9 - GND + // PB_12, //D20 - RPI_10 - GPIO15 / USART3_RX + // PG_8, //D21 - RPI_11 - GPIO17 / USART3_RTS + // PI_5, //D22 - RPI_12 - GPIO18 / SAI2_SCKA + // PD_7, //D23 - RPI_13 - GPIO27 / SDMMC3_D3 + // // NC, // RPI_14 - GND + // PG_15, //D24 - RPI_15 - GPIO22 / SDMMC3_CK + // PF_1, //D25 - RPI_16 - GPIO23 / SDMMC3_CMD + // // NC, // RPI_17 - 3V3 + // PF_0, //D26 - RPI_18 - GPIO24 / SDMMC3_D0 + // PF_9, //D27 - RPI_19 - GPIO10 / SPI5_MOSI + // // NC, // RPI_20 - GND + // PF_8, //D28 - RPI_21 - GPIO9 / SPI5_MISO + // PF_4, //D29 - RPI_22 - GPIO25 / SDMMC3_D1 + // PF_7, //D30 - RPI_23 - GPIO11 / SPI5_SCK + // PF_6, //D31 - RPI_24 - GPIO8 / SPI5_NSS + // // NC, // RPI_25 - GND + // PF_3, //D32 - RPI_26 - GPIO7 + // PF_15, //D33 - RPI_27 - I2C1_SDA + // PD_12, //D34 - RPI_28 - I2C1_SCL + // PG_2, //D35 - RPI_29 - GPIO5 / MCO2 + // // NC, // RPI_30 - GND + // PH_11, //D36 - RPI_31 - GPIO6 / TIM5_CH2 + // PD_13, //D37 - RPI_32 - GPIO12 / TIM4_CH2 + // PC_7, //D38 - RPI_33 - GPIO13 /TIM3_CH2 + // // NC, // RPI_34 - GND + // PI_7, //D39 - RPI_35 - GPIO19 / SAI2_FSA + // PB_13, //D40 - RPI_36 - GPIO16 / USART3_CTS + // PF_5, //D41 - RPI_37 - GPIO26 / SDMMC3_D2 + // PI_6, //D42 - RPI_38 - GPIO20 / SAI2_SDA + // // NC, // RPI_39 - GND + // PF_11, //D43 - RPI_40 - GPIO21 / SAI2_SDB + // Built-In LEDs + PA_14, //D16, D44 - LED LD5, Green, Active Low, Connected to B3 (USER1 Button) + PA_13, //D17, D45 - LED LD6, Red, Active Low, Connected to B4 (USER2 Button) + PH_7, //D18, D46 - LED LD7, Orange, Active High + // NC, // PD_11, LED LD8, Blue, but Used in Linux heartbeat signal. Active High + // CN17 Left Arduino Analog Pins + PF_14, //A0 - D19, D47 - ADC2_INP6 + PF_13, //A1 - D20, D48 - ADC2_INP2 + ANA_0, //A2 - D21, D49 - ADC1_INP0 + ANA_1, //A3 - D22, D50 - ADC1_INP1 + PC_3, //A4 - D23, D51 - ADC1_INP13, or PA_12 (D14) with SB23 ON / SB24 OFF + PF_12 //A5 - D24, D52 - ADC1_INP6, or PA_11 (D15) with SB25 ON / SB26 OFF + // // Duplicated pins in order to be aligned with PinMap_ADC +}; + +#ifdef __cplusplus +} +#endif + +// ---------------------------------------------------------------------------- + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief System Clock Configuration + * @param None + * @retval None + */ +void SystemClock_Config(void) +{ + /** + * NOTE: Because of the limitation of STM32MP1xx, unlike other MCUs this is + * NOT a WEAK function, preventing being overriden. + * In STM32MP1 series, SystemClock_Config()) is "done" by running the FSBL + * (First Stage Boot Loader) on Cortex-A. This function call shall NOT be + * executed in production mode. SystemClock_Config() shall be under + * if(IS_ENGINEERING_BOOT_MODE()). + * + * NOTE: + * * Production mode: Both CA7 and CM4 core running, BOOT0 and BOOT2 are ON. + * * Engineering mode: Only CM4 running, BOOT0 = OFF, BOOT2 = ON. + * See: + * https://wiki.st.com/stm32mpu/wiki/STM32CubeMP1_development_guidelines + */ + if (!IS_ENGINEERING_BOOT_MODE()) { + return; + } + + RCC_OscInitTypeDef RCC_OscInitStruct = {}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + + /**Configure LSE Drive Capability + */ + HAL_PWR_EnableBkUpAccess(); + __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_MEDIUMHIGH); + + /**Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE + | RCC_OSCILLATORTYPE_LSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.LSEState = RCC_LSE_ON; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = 16; + RCC_OscInitStruct.HSIDivValue = RCC_HSI_DIV1; + + /**PLL1 Config + */ + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLL12SOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = 3; + RCC_OscInitStruct.PLL.PLLN = 81; + RCC_OscInitStruct.PLL.PLLP = 1; + RCC_OscInitStruct.PLL.PLLQ = 1; + RCC_OscInitStruct.PLL.PLLR = 1; + RCC_OscInitStruct.PLL.PLLFRACV = 0x800; + RCC_OscInitStruct.PLL.PLLMODE = RCC_PLL_FRACTIONAL; + RCC_OscInitStruct.PLL.RPDFN_DIS = RCC_RPDFN_DIS_DISABLED; + RCC_OscInitStruct.PLL.TPDFN_DIS = RCC_TPDFN_DIS_DISABLED; + + /**PLL2 Config + */ + RCC_OscInitStruct.PLL2.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL2.PLLSource = RCC_PLL12SOURCE_HSE; + RCC_OscInitStruct.PLL2.PLLM = 3; + RCC_OscInitStruct.PLL2.PLLN = 66; + RCC_OscInitStruct.PLL2.PLLP = 2; + RCC_OscInitStruct.PLL2.PLLQ = 1; + RCC_OscInitStruct.PLL2.PLLR = 1; + RCC_OscInitStruct.PLL2.PLLFRACV = 0x1400; + RCC_OscInitStruct.PLL2.PLLMODE = RCC_PLL_FRACTIONAL; + RCC_OscInitStruct.PLL2.RPDFN_DIS = RCC_RPDFN_DIS_DISABLED; + RCC_OscInitStruct.PLL2.TPDFN_DIS = RCC_TPDFN_DIS_DISABLED; + + /**PLL3 Config + */ + RCC_OscInitStruct.PLL3.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL3.PLLSource = RCC_PLL3SOURCE_HSE; + RCC_OscInitStruct.PLL3.PLLM = 2; + RCC_OscInitStruct.PLL3.PLLN = 34; + RCC_OscInitStruct.PLL3.PLLP = 2; + RCC_OscInitStruct.PLL3.PLLQ = 17; + RCC_OscInitStruct.PLL3.PLLR = 37; + RCC_OscInitStruct.PLL3.PLLRGE = RCC_PLL3IFRANGE_1; + RCC_OscInitStruct.PLL3.PLLFRACV = 0x1A04; + RCC_OscInitStruct.PLL3.PLLMODE = RCC_PLL_FRACTIONAL; + RCC_OscInitStruct.PLL3.RPDFN_DIS = RCC_RPDFN_DIS_DISABLED; + RCC_OscInitStruct.PLL3.TPDFN_DIS = RCC_TPDFN_DIS_DISABLED; + + /**PLL4 Config + */ + RCC_OscInitStruct.PLL4.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL4.PLLSource = RCC_PLL4SOURCE_HSE; + RCC_OscInitStruct.PLL4.PLLM = 4; + RCC_OscInitStruct.PLL4.PLLN = 99; + RCC_OscInitStruct.PLL4.PLLP = 6; + RCC_OscInitStruct.PLL4.PLLQ = 8; + RCC_OscInitStruct.PLL4.PLLR = 8; + RCC_OscInitStruct.PLL4.PLLRGE = RCC_PLL4IFRANGE_0; + RCC_OscInitStruct.PLL4.PLLFRACV = 0; + RCC_OscInitStruct.PLL4.PLLMODE = RCC_PLL_INTEGER; + RCC_OscInitStruct.PLL4.RPDFN_DIS = RCC_RPDFN_DIS_DISABLED; + RCC_OscInitStruct.PLL4.TPDFN_DIS = RCC_TPDFN_DIS_DISABLED; + + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + /* Initialization Error */ + while (1); + } + /**RCC Clock Config + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_ACLK + | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 + | RCC_CLOCKTYPE_PCLK3 | RCC_CLOCKTYPE_PCLK4 + | RCC_CLOCKTYPE_PCLK5 | RCC_CLOCKTYPE_MPU; + RCC_ClkInitStruct.MPUInit.MPU_Clock = RCC_MPUSOURCE_PLL1; + RCC_ClkInitStruct.MPUInit.MPU_Div = RCC_MPU_DIV2; + RCC_ClkInitStruct.AXISSInit.AXI_Clock = RCC_AXISSOURCE_PLL2; + RCC_ClkInitStruct.AXISSInit.AXI_Div = RCC_AXI_DIV1; + RCC_ClkInitStruct.MCUInit.MCU_Clock = RCC_MCUSSOURCE_PLL3; + RCC_ClkInitStruct.MCUInit.MCU_Div = RCC_MCU_DIV1; + RCC_ClkInitStruct.APB4_Div = RCC_APB4_DIV2; + RCC_ClkInitStruct.APB5_Div = RCC_APB5_DIV4; + RCC_ClkInitStruct.APB1_Div = RCC_APB1_DIV2; + RCC_ClkInitStruct.APB2_Div = RCC_APB2_DIV2; + RCC_ClkInitStruct.APB3_Div = RCC_APB3_DIV2; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct) != HAL_OK) { + /* Initialization Error */ + while (1); + } + + /**Set the HSE division factor for RTC clock + */ + __HAL_RCC_RTC_HSEDIV(24); +} + +#ifdef __cplusplus +} +#endif diff --git a/variants/STM32MP157_DK/variant.h b/variants/STM32MP157_DK/variant.h new file mode 100644 index 0000000000..8acc778e07 --- /dev/null +++ b/variants/STM32MP157_DK/variant.h @@ -0,0 +1,183 @@ +/* + ******************************************************************************* + * Copyright (c) 2017, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + */ + +#ifndef _VARIANT_ARDUINO_STM32_ +#define _VARIANT_ARDUINO_STM32_ + +#ifdef __cplusplus +extern "C" { +#endif // __cplusplus + +/*---------------------------------------------------------------------------- + * Pins + *----------------------------------------------------------------------------*/ + +#define PE7 0 // - USART7_RX +#define PE8 1 // - USART7_TX and TIM1_CH1N +#define PE1 2 +#define PD14 3 // - TIM4_CH3 +#define PE10 4 // - TIM1_CH2N +#define PD15 5 // - TIM4_CH4 +#define PE9 6 // - TIM1_CH1 +#define PD1 7 +#define PG3 8 +#define PH6 9 // - TIM12_CH1 +#define PE11 10 // - SPI4_NSS and TIM1_CH2 +#define PE14 11 // - SPI4_MOSI and TIM1_CH4 +#define PE13 12 // - SPI4_MISO and TIM1_CH3 +#define PE12 13 // - SPI4_SCK and TIM1_CH3N +#define PA12 14 // - I2C5_SDA +#define PA11 15 // - I2C5_SCL and TIM1_CH4 +// CN2 Raspberry Pi GPIO connectors +// #define PA12 16 // RPI_3 - GPIO2 / I2C5_SDA +// #define PA11 17 // RPI_5 - GPIO3 / I2C5_SCL +// #define PA8 18 // RPI_7 - GPIO4 / MCO1 +// #define PB10 19 // RPI_8 - GPIO14 / USART3_TX +// #define PB12 20 // RPI_10 - GPIO15 / USART3_RX +// #define PG8 21 // RPI_11 - GPIO17 / USART3_RTS +// #define PI5 22 // RPI_12 - GPIO18 / SAI2_SCKA +// #define PD7 23 // RPI_13 - GPIO27 / SDMMC3_D3 +// #define PG15 24 // RPI_15 - GPIO22 / SDMMC3_CK +// #define PF1 25 // RPI_16 - GPIO23 / SDMMC3_CMD +// #define PF0 26 // RPI_18 - GPIO24 / SDMMC3_D0 +// #define PF9 27 // RPI_19 - GPIO10 / SPI5_MOSI +// #define PF8 28 // RPI_21 - GPIO9 / SPI5_MISO +// #define PF4 29 // RPI_22 - GPIO25 / SDMMC3_D1 +// #define PF7 30 // RPI_23 - GPIO11 / SPI5_SCK +// #define PF6 31 // RPI_24 - GPIO8 / SPI5_NSS +// #define PF3 32 // RPI_26 - GPIO7 +// #define PF15 33 // RPI_27 - I2C1_SDA +// #define PD12 34 // RPI_28 - I2C1_SCL +// #define PG2 35 // RPI_29 - GPIO5 / MCO2 +// #define PH11 36 // RPI_31 - GPIO6 / TIM5_CH2 +// #define PD13 37 // RPI_32 - GPIO12 / TIM4_CH2 +// #define PC7 38 // RPI_33 - GPIO13 /TIM3_CH2 +// #define PI7 39 // RPI_35 - GPIO19 / SAI2_FSA +// #define PB13 40 // RPI_36 - GPIO16 / USART3_CTS +// #define PF5 41 // RPI_37 - GPIO26 / SDMMC3_D2 +// #define PI6 42 // RPI_38 - GPIO20 / SAI2_SDA +// #define PF11 43 // RPI_40 - GPIO21 / SAI2_SDB +#define PA14 16 // 44 // LED LD5, Green, Active Low, Connected to B3 (USER1 Button) +#define PA13 17 // 45 // LED LD6, Red, Active Low, Connected to B4 (USER2 Button) +#define PH7 18 // 46 // LED LD7, Orange, Active High +// CN17 CN17 Left Arduino Analog Pins +#define PF14 19 // 47 // A0 - ADC1_IN0 +#define PF13 20 // 48 // A1 - ADC1_IN1 +#define ANA0 21 // 49 // A2 - ADC1_IN6 +#define ANA1 22 // 50 // A3 - ADC1_IN2 +#define PC3 23 // 51 // A4 - ADC1_IN13, or PA_12 (D14) with SB23 ON / SB24 OFF +#define PF12 24 // 52 // A5 - ADC1_IN14, or PA_11 (D15) with SB25 ON / SB26 OFF + +// This must be a literal +#define NUM_DIGITAL_PINS 25 // 53 +#define NUM_ANALOG_INPUTS 6 +#define NUM_ANALOG_FIRST 19 // 47 + +// On-board LED pin number +#define LED_GREEN PA14 +#define LED_RED PA13 +#define LED_ORANGE PH7 +#define LED_BUILTIN LED_ORANGE + +// On-board user button +// The STM32MP157A-DK1 and STM32MP157C-DK2 Discovery kits provide four types of buttons: +// * Wake-up button (B1) +// – Allows the platform to be woken up from any low-power mode +// – Connected to STPMIC1 PONKEY, which generates a wake up signal on STM32MP157x PA0 +// * Reset button (B2) +// – Used to reset the Discovery kit +// * USER1 button (B3) +// – Used at boot time by U-Boot to enter the USB programming mode +// * USER2 button (B4) +// – Used at boot time by U-Boot to enter the Android® Fastboot mode +#define USER1_BTN LED_GREEN +#define USER2_BTN LED_RED +#define USER_BTN USER1_BTN + +// Timer Definitions (optional) +//Do not use timer used by PWM pins when possible. See PinMap_PWM in PeripheralPins.c +// Unused Timers: TIM6, TIM7 (Those are basic timers usually for DACs, not capable to PWM) +// LPTIM[1:5] +#define TIMER_TONE TIM7 + +// Do not use basic timer: OC is required +// Basic timers are TIM6 and TIM7 +#define TIMER_SERVO TIM2 + +// UART Definitions +// Define here Serial instance number to map on Serial generic name +#define SERIAL_UART_INSTANCE 7 // Arduino TX/RX pins +// DEBUG_UART could be redefined to print on another instance than 'Serial' +// #define DEBUG_UART ((USART_TypeDef *) USART3) // ex: USART3 +// DEBUG_UART baudrate, default: 9600 if not defined +// #define DEBUG_UART_BAUDRATE 115200 +// DEBUG_UART Tx pin name, default: the first one found in PinMap_UART_TX for DEBUG_UART +// #define DEBUG_PINNAME_TX PB10 // This is RPi_8 pin + +// Default pin used for 'Serial' instance (ex: ST-Link) +// Mandatory for Firmata +#define PIN_SERIAL_RX PE7 // USART7_RX +#define PIN_SERIAL_TX PE8 // USART7_TX + +// Optional PIN_SERIALn_RX and PIN_SERIALn_TX where 'n' is the U(S)ART number +// Used when user instanciate a hardware Serial using its peripheral name. +// Example: HardwareSerial mySerial(USART3); +// will use PIN_SERIAL3_RX and PIN_SERIAL3_TX if defined. +// #define PIN_SERIAL3_RX PB10 // RPi Serial RX +// #define PIN_SERIAL3_TX PB12 // RPi Serial TX + +#ifdef __cplusplus +} // extern "C" +#endif +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus +// These serial port names are intended to allow libraries and architecture-neutral +// sketches to automatically default to the correct port name for a particular type +// of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, +// the first hardware serial port whose RX/TX pins are not dedicated to another use. +// +// SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor +// +// SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial +// +// SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library +// +// SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. +// +// SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX +// pins are NOT connected to anything by default. +#define SERIAL_PORT_MONITOR Serial +#define SERIAL_PORT_HARDWARE Serial +#endif + +#endif /* _VARIANT_ARDUINO_STM32_ */