std_detect: Support run-time detection on riscv64 FreeBSD

Values are the same as Linux, but only a subset of them is supported.
https://github.com/freebsd/freebsd-src/blob/8923de59054358980102ea5acda6c6dd58273957/sys/riscv/include/elf.h#L77-L86

Author: taiki-e

ci/build-std-detect.sh

@@ -19,6 +19,7 @@ targets=(
     armv6-unknown-freebsd
     powerpc-unknown-freebsd
     powerpc64-unknown-freebsd
+    riscv64gc-unknown-freebsd
 
     # OpenBSD
     aarch64-unknown-openbsd

crates/std_detect/README.md

@@ -60,7 +60,7 @@ crate from working on applications in which `std` is not available.
     querying `mrs` is implemented for Linux >= 4.11, but not enabled by default.
 
 * FreeBSD:
-  * `arm32`, `powerpc64`: `std_detect` supports these on FreeBSD by querying ELF
+  * `arm32`, `powerpc64{,le}`, `riscv64`: `std_detect` supports these on FreeBSD by querying ELF
     auxiliary vectors using `sysctl`.
   * `arm64`: run-time feature detection is implemented by directly querying `mrs`.
 

crates/std_detect/src/detect/os/freebsd/auxvec.rs

@@ -4,7 +4,7 @@
         target_arch = "aarch64",
         target_arch = "arm",
         target_arch = "powerpc64",
-        target_arch = "riscv64"
+        target_arch = "riscv64",
     ),
     allow(dead_code)
 )]
@@ -16,6 +16,11 @@
 #[derive(Debug, Copy, Clone)]
 pub(crate) struct AuxVec {
     pub hwcap: usize,
+    #[cfg(any(
+        target_arch = "aarch64",
+        target_arch = "arm",
+        target_arch = "powerpc64",
+    ))]
     pub hwcap2: usize,
 }
 
@@ -34,12 +39,29 @@ pub(crate) struct AuxVec {
 /// [elf_common.h]: https://svnweb.freebsd.org/base/release/12.0.0/sys/sys/elf_common.h?revision=341707
 pub(crate) fn auxv() -> Result<AuxVec, ()> {
     let hwcap = archauxv(libc::AT_HWCAP);
-    let hwcap2 = archauxv(libc::AT_HWCAP2);
-    // Zero could indicate that no features were detected, but it's also used to
-    // indicate an error. In particular, on many platforms AT_HWCAP2 will be
-    // legitimately zero, since it contains the most recent feature flags.
-    if hwcap != 0 || hwcap2 != 0 {
-        return Ok(AuxVec { hwcap, hwcap2 });
+    // Targets with only AT_HWCAP:
+    #[cfg(any(target_arch = "riscv64"))]
+    {
+        // Zero could indicate that no features were detected, but it's also used to
+        // indicate an error.
+        if hwcap != 0 {
+            return Ok(AuxVec { hwcap });
+        }
+    }
+    // Targets with AT_HWCAP and AT_HWCAP2:
+    #[cfg(any(
+        target_arch = "aarch64",
+        target_arch = "arm",
+        target_arch = "powerpc64",
+    ))]
+    {
+        let hwcap2 = archauxv(libc::AT_HWCAP2);
+        // Zero could indicate that no features were detected, but it's also used to
+        // indicate an error. In particular, on many platforms AT_HWCAP2 will be
+        // legitimately zero, since it contains the most recent feature flags.
+        if hwcap != 0 || hwcap2 != 0 {
+            return Ok(AuxVec { hwcap, hwcap2 });
+        }
     }
     Err(())
 }

crates/std_detect/src/detect/os/freebsd/mod.rs

@@ -9,6 +9,9 @@ cfg_if::cfg_if! {
     } else if #[cfg(target_arch = "arm")] {
         mod arm;
         pub(crate) use self::arm::detect_features;
+    } else if #[cfg(target_arch = "riscv64")] {
+        mod riscv;
+        pub(crate) use self::riscv::detect_features;
     } else if #[cfg(target_arch = "powerpc64")] {
         mod powerpc;
         pub(crate) use self::powerpc::detect_features;

crates/std_detect/src/detect/os/freebsd/riscv.rs

@@ -0,0 +1,60 @@
+//! Run-time feature detection for RISC-V on FreeBSD.
+
+use super::auxvec;
+use crate::detect::{bit, cache, Feature};
+
+/// Read list of supported features from the auxiliary vector.
+pub(crate) fn detect_features() -> cache::Initializer {
+    let mut value = cache::Initializer::default();
+    let enable_feature = |value: &mut cache::Initializer, feature, enable| {
+        if enable {
+            value.set(feature as u32);
+        }
+    };
+    let enable_features = |value: &mut cache::Initializer, feature_slice: &[Feature], enable| {
+        if enable {
+            for feature in feature_slice {
+                value.set(*feature as u32);
+            }
+        }
+    };
+
+    // The values are defined in machine/elf.h.
+    // https://github.com/freebsd/freebsd-src/blob/release/14.1.0/sys/riscv/include/elf.h
+    // TODO: https://github.com/freebsd/freebsd-src/commit/228a3e73e16983bc7f985b24ef20909500792d3c
+    if let Ok(auxv) = auxvec::auxv() {
+        enable_feature(
+            &mut value,
+            Feature::a,
+            bit::test(auxv.hwcap, (b'a' - b'a').into()),
+        );
+        enable_feature(
+            &mut value,
+            Feature::c,
+            bit::test(auxv.hwcap, (b'c' - b'a').into()),
+        );
+        enable_features(
+            &mut value,
+            &[Feature::d, Feature::f, Feature::zicsr],
+            bit::test(auxv.hwcap, (b'd' - b'a').into()),
+        );
+        enable_features(
+            &mut value,
+            &[Feature::f, Feature::zicsr],
+            bit::test(auxv.hwcap, (b'f' - b'a').into()),
+        );
+        let has_i = bit::test(auxv.hwcap, (b'i' - b'a').into());
+        // If future RV128I is supported, implement with `enable_feature` here
+        #[cfg(target_pointer_width = "64")]
+        enable_feature(&mut value, Feature::rv64i, has_i);
+        #[cfg(target_pointer_width = "32")]
+        enable_feature(&mut value, Feature::rv32i, has_i);
+        enable_feature(
+            &mut value,
+            Feature::m,
+            bit::test(auxv.hwcap, (b'm' - b'a').into()),
+        );
+    }
+
+    value
+}

crates/std_detect/src/detect/os/linux/riscv.rs

@@ -21,7 +21,7 @@ pub(crate) fn detect_features() -> cache::Initializer {
 
     // The values are part of the platform-specific [asm/hwcap.h][hwcap]
     //
-    // [hwcap]: https://github.com/torvalds/linux/blob/master/arch/riscv/include/asm/hwcap.h
+    // [hwcap]: https://github.com/torvalds/linux/blob/master/arch/riscv/include/uapi/asm/hwcap.h
     let auxv = auxvec::auxv().expect("read auxvec"); // should not fail on RISC-V platform
     enable_feature(
         &mut value,
@@ -49,25 +49,23 @@ pub(crate) fn detect_features() -> cache::Initializer {
     enable_feature(&mut value, Feature::rv64i, has_i);
     #[cfg(target_pointer_width = "32")]
     enable_feature(&mut value, Feature::rv32i, has_i);
-    #[cfg(target_pointer_width = "32")]
     enable_feature(
         &mut value,
-        Feature::rv32e,
-        bit::test(auxv.hwcap, (b'e' - b'a').into()),
-    );
-    enable_feature(
-        &mut value,
-        Feature::h,
-        bit::test(auxv.hwcap, (b'h' - b'a').into()),
+        Feature::m,
+        bit::test(auxv.hwcap, (b'm' - b'a').into()),
     );
     enable_feature(
         &mut value,
-        Feature::m,
-        bit::test(auxv.hwcap, (b'm' - b'a').into()),
+        Feature::v,
+        bit::test(auxv.hwcap, (b'v' - b'a').into()),
     );
     // FIXME: Auxvec does not show supervisor feature support, but this mode may be useful
     // to detect when Rust is used to write Linux kernel modules.
     // These should be more than Auxvec way to detect supervisor features.
 
+    // FIXME: Auxv only supports single-letter extensions.
+    // We can use riscv_hwprobe for multi-letter extensions.
+    // https://github.com/torvalds/linux/blob/master/Documentation/arch/riscv/hwprobe.rst
+
     value
 }

crates/std_detect/tests/cpu-detection.rs

@@ -187,6 +187,8 @@ fn aarch64_bsd() {
     println!("sha2: {:?}", is_aarch64_feature_detected!("sha2"));
 }
 
+// TODO: add test for riscv_{linux,freebsd}
+
 #[test]
 #[cfg(all(target_arch = "aarch64", target_vendor = "apple"))]
 fn aarch64_darwin() {