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| 1 | +/* |
| 2 | + * Copyright (C) 2015 Broadcom |
| 3 | + * |
| 4 | + * This program is free software; you can redistribute it and/or modify |
| 5 | + * it under the terms of the GNU General Public License as published by |
| 6 | + * the Free Software Foundation; either version 2 of the License, or |
| 7 | + * (at your option) any later version. |
| 8 | + * |
| 9 | + * This program is distributed in the hope that it will be useful, |
| 10 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | + * GNU General Public License for more details. |
| 13 | + */ |
| 14 | + |
| 15 | +#include <linux/clk.h> |
| 16 | +#include <linux/clk-provider.h> |
| 17 | +#include <linux/clk/bcm2835.h> |
| 18 | +#include <linux/module.h> |
| 19 | +#include <linux/platform_device.h> |
| 20 | +#include <dt-bindings/clock/bcm2835-aux.h> |
| 21 | + |
| 22 | +#define BCM2835_AUXIRQ 0x00 |
| 23 | +#define BCM2835_AUXENB 0x04 |
| 24 | + |
| 25 | +static int bcm2835_aux_clk_probe(struct platform_device *pdev) |
| 26 | +{ |
| 27 | + struct device *dev = &pdev->dev; |
| 28 | + struct clk_onecell_data *onecell; |
| 29 | + const char *parent; |
| 30 | + struct clk *parent_clk; |
| 31 | + struct resource *res; |
| 32 | + void __iomem *reg, *gate; |
| 33 | + |
| 34 | + parent_clk = devm_clk_get(dev, NULL); |
| 35 | + if (IS_ERR(parent_clk)) |
| 36 | + return PTR_ERR(parent_clk); |
| 37 | + parent = __clk_get_name(parent_clk); |
| 38 | + |
| 39 | + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 40 | + reg = devm_ioremap_resource(dev, res); |
| 41 | + if (!reg) |
| 42 | + return -ENODEV; |
| 43 | + |
| 44 | + onecell = devm_kmalloc(dev, sizeof(*onecell), GFP_KERNEL); |
| 45 | + if (!onecell) |
| 46 | + return -ENOMEM; |
| 47 | + onecell->clk_num = BCM2835_AUX_CLOCK_COUNT; |
| 48 | + onecell->clks = devm_kcalloc(dev, BCM2835_AUX_CLOCK_COUNT, |
| 49 | + sizeof(*onecell->clks), GFP_KERNEL); |
| 50 | + if (!onecell->clks) |
| 51 | + return -ENOMEM; |
| 52 | + |
| 53 | + gate = reg + BCM2835_AUXENB; |
| 54 | + onecell->clks[BCM2835_AUX_CLOCK_UART] = |
| 55 | + clk_register_gate(dev, "aux_uart", parent, 0, gate, 0, 0, NULL); |
| 56 | + |
| 57 | + onecell->clks[BCM2835_AUX_CLOCK_SPI1] = |
| 58 | + clk_register_gate(dev, "aux_spi1", parent, 0, gate, 1, 0, NULL); |
| 59 | + |
| 60 | + onecell->clks[BCM2835_AUX_CLOCK_SPI2] = |
| 61 | + clk_register_gate(dev, "aux_spi2", parent, 0, gate, 2, 0, NULL); |
| 62 | + |
| 63 | + of_clk_add_provider(pdev->dev.of_node, of_clk_src_onecell_get, onecell); |
| 64 | + |
| 65 | + return 0; |
| 66 | +} |
| 67 | + |
| 68 | +static const struct of_device_id bcm2835_aux_clk_of_match[] = { |
| 69 | + { .compatible = "brcm,bcm2835-aux", }, |
| 70 | + {}, |
| 71 | +}; |
| 72 | +MODULE_DEVICE_TABLE(of, bcm2835_aux_clk_of_match); |
| 73 | + |
| 74 | +static struct platform_driver bcm2835_aux_clk_driver = { |
| 75 | + .driver = { |
| 76 | + .name = "bcm2835-aux-clk", |
| 77 | + .of_match_table = bcm2835_aux_clk_of_match, |
| 78 | + }, |
| 79 | + .probe = bcm2835_aux_clk_probe, |
| 80 | +}; |
| 81 | +builtin_platform_driver(bcm2835_aux_clk_driver); |
| 82 | + |
| 83 | +MODULE_AUTHOR( "Eric Anholt <[email protected]>"); |
| 84 | +MODULE_DESCRIPTION("BCM2835 auxiliary peripheral clock driver"); |
| 85 | +MODULE_LICENSE("GPL v2"); |
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