|
1 |
| -/* bpf_jit.h: BPF JIT compiler for PPC64 |
| 1 | +/* |
| 2 | + * bpf_jit.h: BPF JIT compiler for PPC |
2 | 3 | *
|
3 | 4 | * Copyright 2011 Matt Evans <[email protected]>, IBM Corporation
|
4 | 5 | *
|
|
10 | 11 | #ifndef _BPF_JIT_H
|
11 | 12 | #define _BPF_JIT_H
|
12 | 13 |
|
13 |
| -#ifdef CONFIG_PPC64 |
14 |
| -#define BPF_PPC_STACK_R3_OFF 48 |
15 |
| -#define BPF_PPC_STACK_LOCALS 32 |
16 |
| -#define BPF_PPC_STACK_BASIC (48+64) |
17 |
| -#define BPF_PPC_STACK_SAVE (18*8) |
18 |
| -#define BPF_PPC_STACKFRAME (BPF_PPC_STACK_BASIC+BPF_PPC_STACK_LOCALS+ \ |
19 |
| - BPF_PPC_STACK_SAVE) |
20 |
| -#define BPF_PPC_SLOWPATH_FRAME (48+64) |
21 |
| -#else |
22 |
| -#define BPF_PPC_STACK_R3_OFF 24 |
23 |
| -#define BPF_PPC_STACK_LOCALS 16 |
24 |
| -#define BPF_PPC_STACK_BASIC (24+32) |
25 |
| -#define BPF_PPC_STACK_SAVE (18*4) |
26 |
| -#define BPF_PPC_STACKFRAME (BPF_PPC_STACK_BASIC+BPF_PPC_STACK_LOCALS+ \ |
27 |
| - BPF_PPC_STACK_SAVE) |
28 |
| -#define BPF_PPC_SLOWPATH_FRAME (24+32) |
29 |
| -#endif |
30 |
| - |
31 |
| -#define REG_SZ (BITS_PER_LONG/8) |
32 |
| - |
33 |
| -/* |
34 |
| - * Generated code register usage: |
35 |
| - * |
36 |
| - * As normal PPC C ABI (e.g. r1=sp, r2=TOC), with: |
37 |
| - * |
38 |
| - * skb r3 (Entry parameter) |
39 |
| - * A register r4 |
40 |
| - * X register r5 |
41 |
| - * addr param r6 |
42 |
| - * r7-r10 scratch |
43 |
| - * skb->data r14 |
44 |
| - * skb headlen r15 (skb->len - skb->data_len) |
45 |
| - * m[0] r16 |
46 |
| - * m[...] ... |
47 |
| - * m[15] r31 |
48 |
| - */ |
49 |
| -#define r_skb 3 |
50 |
| -#define r_ret 3 |
51 |
| -#define r_A 4 |
52 |
| -#define r_X 5 |
53 |
| -#define r_addr 6 |
54 |
| -#define r_scratch1 7 |
55 |
| -#define r_scratch2 8 |
56 |
| -#define r_D 14 |
57 |
| -#define r_HL 15 |
58 |
| -#define r_M 16 |
59 |
| - |
60 | 14 | #ifndef __ASSEMBLY__
|
61 | 15 |
|
62 |
| -/* |
63 |
| - * Assembly helpers from arch/powerpc/net/bpf_jit.S: |
64 |
| - */ |
65 |
| -#define DECLARE_LOAD_FUNC(func) \ |
66 |
| - extern u8 func[], func##_negative_offset[], func##_positive_offset[] |
67 |
| - |
68 |
| -DECLARE_LOAD_FUNC(sk_load_word); |
69 |
| -DECLARE_LOAD_FUNC(sk_load_half); |
70 |
| -DECLARE_LOAD_FUNC(sk_load_byte); |
71 |
| -DECLARE_LOAD_FUNC(sk_load_byte_msh); |
72 |
| - |
73 | 16 | #ifdef CONFIG_PPC64
|
74 | 17 | #define FUNCTION_DESCR_SIZE 24
|
75 | 18 | #else
|
@@ -131,46 +74,6 @@ DECLARE_LOAD_FUNC(sk_load_byte_msh);
|
131 | 74 | #define PPC_BPF_STLU(r, base, i) do { PPC_STWU(r, base, i); } while(0)
|
132 | 75 | #endif
|
133 | 76 |
|
134 |
| -/* Convenience helpers for the above with 'far' offsets: */ |
135 |
| -#define PPC_LBZ_OFFS(r, base, i) do { if ((i) < 32768) PPC_LBZ(r, base, i); \ |
136 |
| - else { PPC_ADDIS(r, base, IMM_HA(i)); \ |
137 |
| - PPC_LBZ(r, r, IMM_L(i)); } } while(0) |
138 |
| - |
139 |
| -#define PPC_LD_OFFS(r, base, i) do { if ((i) < 32768) PPC_LD(r, base, i); \ |
140 |
| - else { PPC_ADDIS(r, base, IMM_HA(i)); \ |
141 |
| - PPC_LD(r, r, IMM_L(i)); } } while(0) |
142 |
| - |
143 |
| -#define PPC_LWZ_OFFS(r, base, i) do { if ((i) < 32768) PPC_LWZ(r, base, i); \ |
144 |
| - else { PPC_ADDIS(r, base, IMM_HA(i)); \ |
145 |
| - PPC_LWZ(r, r, IMM_L(i)); } } while(0) |
146 |
| - |
147 |
| -#define PPC_LHZ_OFFS(r, base, i) do { if ((i) < 32768) PPC_LHZ(r, base, i); \ |
148 |
| - else { PPC_ADDIS(r, base, IMM_HA(i)); \ |
149 |
| - PPC_LHZ(r, r, IMM_L(i)); } } while(0) |
150 |
| - |
151 |
| -#ifdef CONFIG_PPC64 |
152 |
| -#define PPC_LL_OFFS(r, base, i) do { PPC_LD_OFFS(r, base, i); } while(0) |
153 |
| -#else |
154 |
| -#define PPC_LL_OFFS(r, base, i) do { PPC_LWZ_OFFS(r, base, i); } while(0) |
155 |
| -#endif |
156 |
| - |
157 |
| -#ifdef CONFIG_SMP |
158 |
| -#ifdef CONFIG_PPC64 |
159 |
| -#define PPC_BPF_LOAD_CPU(r) \ |
160 |
| - do { BUILD_BUG_ON(FIELD_SIZEOF(struct paca_struct, paca_index) != 2); \ |
161 |
| - PPC_LHZ_OFFS(r, 13, offsetof(struct paca_struct, paca_index)); \ |
162 |
| - } while (0) |
163 |
| -#else |
164 |
| -#define PPC_BPF_LOAD_CPU(r) \ |
165 |
| - do { BUILD_BUG_ON(FIELD_SIZEOF(struct thread_info, cpu) != 4); \ |
166 |
| - PPC_LHZ_OFFS(r, (1 & ~(THREAD_SIZE - 1)), \ |
167 |
| - offsetof(struct thread_info, cpu)); \ |
168 |
| - } while(0) |
169 |
| -#endif |
170 |
| -#else |
171 |
| -#define PPC_BPF_LOAD_CPU(r) do { PPC_LI(r, 0); } while(0) |
172 |
| -#endif |
173 |
| - |
174 | 77 | #define PPC_CMPWI(a, i) EMIT(PPC_INST_CMPWI | ___PPC_RA(a) | IMM_L(i))
|
175 | 78 | #define PPC_CMPDI(a, i) EMIT(PPC_INST_CMPDI | ___PPC_RA(a) | IMM_L(i))
|
176 | 79 | #define PPC_CMPLWI(a, i) EMIT(PPC_INST_CMPLWI | ___PPC_RA(a) | IMM_L(i))
|
@@ -273,14 +176,6 @@ DECLARE_LOAD_FUNC(sk_load_byte_msh);
|
273 | 176 | #define PPC_FUNC_ADDR(d,i) do { PPC_LI32(d, i); } while(0)
|
274 | 177 | #endif
|
275 | 178 |
|
276 |
| -#define PPC_LHBRX_OFFS(r, base, i) \ |
277 |
| - do { PPC_LI32(r, i); PPC_LHBRX(r, r, base); } while(0) |
278 |
| -#ifdef __LITTLE_ENDIAN__ |
279 |
| -#define PPC_NTOHS_OFFS(r, base, i) PPC_LHBRX_OFFS(r, base, i) |
280 |
| -#else |
281 |
| -#define PPC_NTOHS_OFFS(r, base, i) PPC_LHZ_OFFS(r, base, i) |
282 |
| -#endif |
283 |
| - |
284 | 179 | static inline bool is_nearbranch(int offset)
|
285 | 180 | {
|
286 | 181 | return (offset < 32768) && (offset >= -32768);
|
@@ -317,18 +212,6 @@ static inline bool is_nearbranch(int offset)
|
317 | 212 | #define COND_NE (CR0_EQ | COND_CMP_FALSE)
|
318 | 213 | #define COND_LT (CR0_LT | COND_CMP_TRUE)
|
319 | 214 |
|
320 |
| -#define SEEN_DATAREF 0x10000 /* might call external helpers */ |
321 |
| -#define SEEN_XREG 0x20000 /* X reg is used */ |
322 |
| -#define SEEN_MEM 0x40000 /* SEEN_MEM+(1<<n) = use mem[n] for temporary |
323 |
| - * storage */ |
324 |
| -#define SEEN_MEM_MSK 0x0ffff |
325 |
| - |
326 |
| -struct codegen_context { |
327 |
| - unsigned int seen; |
328 |
| - unsigned int idx; |
329 |
| - int pc_ret0; /* bpf index of first RET #0 instruction (if any) */ |
330 |
| -}; |
331 |
| - |
332 | 215 | #endif
|
333 | 216 |
|
334 | 217 | #endif
|
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