@@ -6717,22 +6717,19 @@ bool CombinerHelper::tryFoldBoolSelectToLogic(GSelect *Select,
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return false ;
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}
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- bool CombinerHelper::tryFoldSelectToIntMinMax (GSelect *Select,
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- BuildFnTy &MatchInfo) {
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+ bool CombinerHelper::matchSelectIMinMax (const MachineOperand &MO,
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+ BuildFnTy &MatchInfo) {
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+ GSelect *Select = cast<GSelect>(MRI.getVRegDef (MO.getReg ()));
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+ GICmp *Cmp = cast<GICmp>(MRI.getVRegDef (Select->getCondReg ()));
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+
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Register DstReg = Select->getReg (0 );
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- Register Cond = Select->getCondReg ();
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Register True = Select->getTrueReg ();
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Register False = Select->getFalseReg ();
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LLT DstTy = MRI.getType (DstReg);
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if (DstTy.isPointer ())
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return false ;
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- // We need an G_ICMP on the condition register.
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- GICmp *Cmp = getOpcodeDef<GICmp>(Cond, MRI);
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- if (!Cmp)
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- return false ;
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-
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// We want to fold the icmp and replace the select.
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if (!MRI.hasOneNonDBGUse (Cmp->getReg (0 )))
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return false ;
@@ -6743,62 +6740,46 @@ bool CombinerHelper::tryFoldSelectToIntMinMax(GSelect *Select,
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if (CmpInst::isEquality (Pred))
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return false ;
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- Register CmpLHS = Cmp->getLHSReg ();
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- Register CmpRHS = Cmp->getRHSReg ();
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-
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- // We can swap CmpLHS and CmpRHS for higher hitrate.
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- if (True == CmpRHS && False == CmpLHS) {
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- std::swap (CmpLHS, CmpRHS);
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- Pred = CmpInst::getSwappedPredicate (Pred);
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- }
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+ [[maybe_unused]] Register CmpLHS = Cmp->getLHSReg ();
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+ [[maybe_unused]] Register CmpRHS = Cmp->getRHSReg ();
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// (icmp X, Y) ? X : Y -> integer minmax.
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// see matchSelectPattern in ValueTracking.
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// Legality between G_SELECT and integer minmax can differ.
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- if (True == CmpLHS && False == CmpRHS) {
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- switch (Pred) {
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- case ICmpInst::ICMP_UGT:
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- case ICmpInst::ICMP_UGE: {
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- if (!isLegalOrBeforeLegalizer ({TargetOpcode::G_UMAX, DstTy}))
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- return false ;
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- MatchInfo = [=](MachineIRBuilder &B) {
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- B.buildUMax (DstReg, True, False);
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- };
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- return true ;
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- }
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- case ICmpInst::ICMP_SGT:
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- case ICmpInst::ICMP_SGE: {
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- if (!isLegalOrBeforeLegalizer ({TargetOpcode::G_SMAX, DstTy}))
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- return false ;
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- MatchInfo = [=](MachineIRBuilder &B) {
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- B.buildSMax (DstReg, True, False);
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- };
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- return true ;
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- }
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- case ICmpInst::ICMP_ULT:
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- case ICmpInst::ICMP_ULE: {
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- if (!isLegalOrBeforeLegalizer ({TargetOpcode::G_UMIN, DstTy}))
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- return false ;
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- MatchInfo = [=](MachineIRBuilder &B) {
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- B.buildUMin (DstReg, True, False);
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- };
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- return true ;
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- }
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- case ICmpInst::ICMP_SLT:
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- case ICmpInst::ICMP_SLE: {
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- if (!isLegalOrBeforeLegalizer ({TargetOpcode::G_SMIN, DstTy}))
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- return false ;
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- MatchInfo = [=](MachineIRBuilder &B) {
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- B.buildSMin (DstReg, True, False);
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- };
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- return true ;
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- }
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- default :
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+ assert (True == CmpLHS && False == CmpRHS && " unexpected MIR pattern" );
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+
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+ switch (Pred) {
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+ case ICmpInst::ICMP_UGT:
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+ case ICmpInst::ICMP_UGE: {
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+ if (!isLegalOrBeforeLegalizer ({TargetOpcode::G_UMAX, DstTy}))
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return false ;
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- }
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+ MatchInfo = [=](MachineIRBuilder &B) { B.buildUMax (DstReg, True, False); };
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+ return true ;
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+ }
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+ case ICmpInst::ICMP_SGT:
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+ case ICmpInst::ICMP_SGE: {
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+ if (!isLegalOrBeforeLegalizer ({TargetOpcode::G_SMAX, DstTy}))
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+ return false ;
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+ MatchInfo = [=](MachineIRBuilder &B) { B.buildSMax (DstReg, True, False); };
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+ return true ;
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+ }
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+ case ICmpInst::ICMP_ULT:
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+ case ICmpInst::ICMP_ULE: {
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+ if (!isLegalOrBeforeLegalizer ({TargetOpcode::G_UMIN, DstTy}))
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+ return false ;
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+ MatchInfo = [=](MachineIRBuilder &B) { B.buildUMin (DstReg, True, False); };
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+ return true ;
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+ }
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+ case ICmpInst::ICMP_SLT:
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+ case ICmpInst::ICMP_SLE: {
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+ if (!isLegalOrBeforeLegalizer ({TargetOpcode::G_SMIN, DstTy}))
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+ return false ;
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+ MatchInfo = [=](MachineIRBuilder &B) { B.buildSMin (DstReg, True, False); };
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+ return true ;
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+ }
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+ default :
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+ return false ;
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}
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-
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- return false ;
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}
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bool CombinerHelper::matchSelect (MachineInstr &MI, BuildFnTy &MatchInfo) {
@@ -6810,9 +6791,6 @@ bool CombinerHelper::matchSelect(MachineInstr &MI, BuildFnTy &MatchInfo) {
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if (tryFoldBoolSelectToLogic (Select, MatchInfo))
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return true ;
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- if (tryFoldSelectToIntMinMax (Select, MatchInfo))
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- return true ;
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-
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return false ;
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}
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